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Notes For V3.0-1
RESTRICTION: The FP15 and XVM features of the PDP-15 are only partially debugged. Do NOT enable these features for normal operations. 1. New Features in 3.0-1 1.1 PDP-1 - Added block loader format support to LOAD. - Changed BOOT PTR to allow loading of all of the first bank of memory. 1.2 PDP-18b Family - Added PDP-4 EAE support. - Added PDP-15 FP15 support. - Added PDP-15 XVM support. - Added PDP-15 "re-entrancy ECO". - Added PDP-7, PDP-9, PDP-15 hardware RIM loader support in BOOT PTR. 2. Bugs Fixed in 3.0-1 2.1 PDP-11/VAX - Fixed bug in user disk size (found by Chaskiel M Grundman). 2.2 PDP-1 - Updated CPU, line printer, standard devices to detect indefinite I/O wait. - Fixed incorrect logical, missing activate, break in drum simulator. - Fixed bugs in instruction decoding, overprinting for line printer. 2.3 PDP-10 - Fixed bug in RP read header. 2.4 PDP-18b Family - Fixed bug in PDP-4 line printer overprinting. - Fixed bug in PDP-15 memory protect/skip interaction. - Fixed bug in RF set size routine. - Increased PTP TIME for PDP-15 operating systems. 2.5 PDP-8 - Fixed bug in DF, RF set size routine. 2.6 Nova - Fixed bug in DSK set size routine. 2.7 1401 - Revised fetch to model hardware more closely. 2.8 Ibm1130 - Fixed bugs found by APL 1130. 2.9 Altairz80 - Fixed bug in real-time clock on Windows host. 2.10 HP2100 -- Fixed DR drum sizes. -- Fixed DR variable capacity interaction with SAVE/RESTORE. 3. New Features in 3.0 vs prior releases 3.1 SCP and Libraries - Added ASSIGN/DEASSIGN (logical name) commands. - Changed RESTORE to unconditionally detach files. - Added E11 and TPC format support to magtape library. - Fixed bug in SHOW CONNECTIONS. - Added USE_ADDR64 support 3.2 All magtapes - Magtapes support SIMH format, E11 format, and TPC format (read only). - SET <tape_unit> FORMAT=format sets the specified tape unit's format. - SHOW <tape_unit> FORMAT displays the specified tape unit's format. - Tape format can also be set as part of the ATTACH command, using the -F switch. 3.3 VAX - VAX can be compiled without USE_INT64. - If compiled with USE_INT64 and USE_ADDR64, RQ and TQ controllers support files > 2GB. - VAX ROM has speed control (SET ROM DELAY/NODELAY). 4. Bugs Fixed in 3.0 vs prior releases 4.1 VAX - Fixed CVTfi bug: integer overflow not set if exponent out of range - Fixed EMODx bugs: o First and second operands reversed o Separated fraction received wrong exponent o Overflow calculation on separated integer incorrect o Fraction not set to zero if exponent out of range - Fixed interval timer and ROM access to pass power-up self-test even on very fast host processors (fixes from Mark Pizzolato). 4.2 1401 - Fixed mnemonic, instruction lengths, and reverse scan length check bug for MCS. - Fixed MCE bug, BS off by 1 if zero suppress. - Fixed chaining bug, D lost if return to SCP. - Fixed H branch, branch occurs after continue. - Added check for invalid 8 character MCW, LCA. - Fixed magtape load-mode end of record response. 4.3 Nova - Fixed DSK variable size interaction with restore. 4.4 PDP-1 - Fixed DT variable size interaction with restore. 4.5 PDP-11 - Fixed DT variable size interaction with restore. - Fixed bug in MMR1 update (found by Tim Stark). - Added XQ features and fixed bugs: o Corrected XQ interrupts on IE state transition (code by Tom Evans). o Added XQ interrupt clear on soft reset. o Removed XQ interrupt when setting XL or RL (multiple people). o Added SET/SHOW XQ STATS. o Added SHOW XQ FILTERS. o Added ability to split received packet into multiple buffers. o Added explicit runt and giant packet processing. 4.6 PDP-18B - Fixed DT, RF variable size interaction with restore. - Fixed MT bug in MTTR. 4.7 PDP-8 - Fixed DT, DF, RF, RX variable size interaction with restore. - Fixed MT bug in SKTR. 4.8 HP2100 - Fixed bug in DP (13210A controller only), DQ read status. - Fixed bug in DP, DQ seek complete. 4.9 GRI - Fixed bug in SC queue pointer management.
This commit is contained in:
committed by
Mark Pizzolato
parent
4ffd3be790
commit
f9564b81b9
@@ -1,7 +1,7 @@
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To: Users
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From: Bob Supnik
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Subj: 18b PDP Simulator Usage
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Date: 01-Feb-2003
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Date: 25-Jul-2003
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COPYRIGHT NOTICE
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@@ -44,29 +44,33 @@ PDP-7/ PDP7
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PDP-9/ PDP9
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PDP-15/ PDP15
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If no model is specified, the default is the PDP-9.
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If no model is specified, the default is the PDP-15.
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sim/ sim_defs.h
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sim_rev.h
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sim_sock.h
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sim_tmxr.h
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scp.c
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scp_tty.c
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sim_sock.c
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sim_tmxr.c
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PDP-4 PDP-7 PDP-9 PDP-15
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sim/ sim_defs.h x x x x
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sim_rev.h x x x x
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sim_sock.h x x x x
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sim_tape.h x x
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sim_tmxr.h x x x x
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scp.c x x x x
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scp_tty.c x x x x
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sim_sock.c x x x x
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sim_tape.c x x
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sim_tmxr.c x x x x
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sim/pdp18b/ pdp18b_defs.h
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pdp18b_cpu.c
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pdp18b_drm.c
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pdp18b_dt.c
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pdp18b_lp.c
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pdp18b_mt.c
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pdp18b_rb.c
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pdp18b_rf.c
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pdp18b_rp.c
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pdp18b_stddev.c
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pdp18b_sys.c
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pdp18b_tt1.c
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sim/pdp18b/ pdp18b_defs.h x x x x
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pdp18b_cpu.c x x x x
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pdp18b_drm.c x x
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pdp18b_dt.c x x x x
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pdp18b_fpp.c x
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pdp18b_lp.c x x x x
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pdp18b_mt.c x x
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pdp18b_rb.c x
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pdp18b_rf.c x x
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pdp18b_rp.c x
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pdp18b_stddev.c x x x x
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pdp18b_sys.c x x x x
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pdp18b_tt1.c x x
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2. 18b PDP Features
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@@ -77,6 +81,7 @@ system device simulates
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name(s)
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PDP-4 CPU PDP-4 CPU with 8KW of memory
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- Type 18 extended arithmetic element (EAE)
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PTR,PTP integral paper tape/Type 75 punch
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TTI,TTO KSR28 console terminal (Baudot code)
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LPT Type 62 line printer (Hollerith code)
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@@ -116,6 +121,9 @@ PDP-15 CPU PDP-15 CPU with 32KW of memory
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- KA15 automatic priority interrupt (API)
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- KF15 power detection
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- KM15 memory protection
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- KT15 memory relocation and protection
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- XVM memory relocation and protection
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FPP FP15 floating point processor
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PTR,PTP PC15 paper tape reader/punch
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TTI,TTO KSR 35 console terminal
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TTI1,TTO1 LT15 second console terminal
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@@ -145,36 +153,58 @@ The 18b PDP simulators implement several unique stop conditions:
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- more than XCTMAX nested executes are detected during
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instruction execution
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The PDP-4 and PDP-7 loaders support only RIM format tapes. The PDP-9
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and PDP-15 support both RIM and BIN format tapes. If the file extension
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is .RIM, or the -r switch is specified with LOAD, the file is assumed to
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be RIM format; if the file extension is not .RIM, or if the -b switch is
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specified, the file is assumed to be BIN format. RIM loading requires
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that the loading address be specified on the command line.
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The PDP-4 and PDP-7 LOAD command supports only "second stage" RIM format
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files (alternating DAC address instructions and data):
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LOAD file load PDP-4/PDP-7 RIM format file
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The PDP-9 and PDP-15 LOAD commands upports hardware RIM format (data only),
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PDP-4/PDP-7 RIM loader format (for compatability with Macro7), and BIN
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loader format:
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LOAD -S file load PDP-4/PDP-7 RIM format file
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LOAD -R file address load PDP-9/PDP-15 RIM format
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file starting at address
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LOAD file.RIM address assume file is PDP-9/PDP-15
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RIM format
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LOAD -B file load PDP-9/PDP-15 BIN format file
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LOAD file.BIN assume file is PDP-9/PDP-15
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BIN format
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If no address is given for a RIM format load, a starting address of 200
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(octal) is assumed. If no switch is specified, and the file extension is
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neither RIM nor BIN, the file format is assumed to be BIN.
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2.1 CPU
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The CPU options are the presence of the EAE, the presense of the API (for
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the PDP-9 and PDP-15), and the size of main memory.
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The CPU options are the presence of the EAE, the presense of the API and
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memory protection (for the PDP-9 and PDP-15), the presense of relocation
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or XVM (PDP-15 only), and the size of main memory.
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SET CPU EAE enable EAE
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SET CPU NOEAE disable EAE
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SET CPU API enable API
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SET CPU NOAPI disable API
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SET CPU 4K set memory size = 4K
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SET CPU 8K set memory size = 8K
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SET CPU 12K set memory size = 12K
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SET CPU 16K set memory size = 16K
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SET CPU 20K set memory size = 20K
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SET CPU 24K set memory size = 24K
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SET CPU 28K set memory size = 28K
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SET CPU 32K set memory size = 32K
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SET CPU 48K set memory size = 48K
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SET CPU 64K set memory size = 64K
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SET CPU 80K set memory size = 80K
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SET CPU 96K set memory size = 96K
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SET CPU 112K set memory size = 112K
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SET CPU 128K set memory size = 128K
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system option comment
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all SET CPU EAE enable EAE
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all SET CPU NOEAE disable EAE
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9,15 SET CPU API enable API
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9,15 SET CPU NOAPI disable API
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9,15 SET CPU PROT enable memory protection
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15 SET CPU RELOC enable memory relocation
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15 SET CPU XVM enable XVM relocation
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9,15 SET CPU NOPROT disable protection, relocation, XVM
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4 SET CPU 4K set memory size = 4K
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all SET CPU 8K set memory size = 8K
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all SET CPU 12K set memory size = 12K
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all SET CPU 16K set memory size = 16K
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all SET CPU 20K set memory size = 20K
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all SET CPU 24K set memory size = 24K
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all SET CPU 28K set memory size = 28K
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all SET CPU 32K set memory size = 32K
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15 SET CPU 48K set memory size = 48K
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15 SET CPU 64K set memory size = 64K
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15 SET CPU 80K set memory size = 80K
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15 SET CPU 96K set memory size = 96K
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15 SET CPU 112K set memory size = 112K
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15 SET CPU 128K set memory size = 128K
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Memory sizes greater than 8K are only available on the PDP-7, PDP-9, and
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PDP-15; memory sizes greater than 32KW are only available on the PDP-15.
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@@ -183,6 +213,12 @@ non-zero data, the simulator asks for confirmation. Data in the truncated
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portion of memory is lost. Initial memory size is 8K for the PDP-4, 32K
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for the PDP-7 and PDP-9, and 128K for the PDP-15.
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The PROT option corresponds to the KX09A on the PDP-9 and the KM15 for the
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PDP-15. The PROT option is required to run the Foreground/Background
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Monitor. The RELOC option corresponds to the KT15 on the PDP-15, and the
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XVM option corresponds to the XM15 on the PDP-15. ADSS-15, ADSS-15 Foreground/
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Background, and standard DOS-15 will <not> run if these options are enabled.
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CPU registers include the visible state of the processor as well as the
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control registers for the interrupt system.
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@@ -191,10 +227,11 @@ control registers for the interrupt system.
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all PC addr program counter
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all AC 18 accumulator
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all L 1 link
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7,9,15 MQ 18 multiplier-quotient
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7,9,15 SC 6 shift counter
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7,9,15 EAE_AC_SIGN 1 EAE AC sign
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all MQ 18 multiplier-quotient
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all SC 6 shift counter
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all EAE_AC_SIGN 1 EAE AC sign
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all SR 18 front panel switches
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all ASW addr address switches for RIM load
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all INT[0:4] 32 interrupt requests,
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0:3 = API levels 0-3
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4 = PI level
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@@ -204,12 +241,15 @@ control registers for the interrupt system.
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9,15 APIENB 1 API enable
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9,15 APIREQ 8 API requesting levels
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9,15 APIACT 8 API active levels
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9,15 BR addr memory protection bounds
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9,15 BR 18 memory protection bounds
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15 XR 18 index register
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15 LR 18 limit register
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15 BR 17 memory protection bounds
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9,15 BR 18 memory protection bounds
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15 RR 18 memory protection relocation
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15 MMR 18 memory protection control
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9,15 USMD 1 user mode
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9,15 USMDBUF 1 user mode buffer
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9,15 USMDDEF 1 user mode load defer
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9,15 NEXM 1 non-existent memory violation
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9,15 PRVN 1 privilege violation
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7,9 EXTM 1 extend mode
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@@ -229,18 +269,49 @@ control registers for the interrupt system.
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"addr" signifies the address width of the system (13b for the PDP-4, 15b for
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the PDP-7 and PDP-9, 17b for the PDP-15).
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2.2 Programmed I/O Devices
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2.2 Floating Point Processor (FPP)
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2.2.1 Paper Tape Reader (PTR)
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The PDP-15 features an optional floating point processor, the FP15 (FPP).
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The FPP can be enabled and disabled; by default it is disabled.
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The FPP implements these registers:
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name size comments
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FIR 12 floating instruction register
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EPA 18 EPA (A exponent)
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FMAS 1 FMA sign
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FMAH 17 FMA<1:17>
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FMAL 18 FMA<18:35>
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EPB 18 EPB (B exponent)
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FMBS 1 FMB sign
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FMBH 17 FMB<1:17>
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FMBL 18 FMB<18:35>
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FGUARD 1 guard bit
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FMQH 17 FMQ<1:17>
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FMQL 18 FMQ<18:35>
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JEA 18 exception address register
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2.3 Programmed I/O Devices
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2.3.1 Paper Tape Reader (PTR)
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The paper tape reader (PTR) reads data from a disk file. The POS
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register specifies the number of the next data item to be read. Thus,
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by changing POS, the user can backspace or advance the reader.
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On the PDP-4 and PDP-7, the paper tape reader supports the BOOT command.
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BOOT PTR copies the RIM loader into memory and starts it running, while
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BOOT -F PTR copies the funny format binary loader into memory and starts
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it running.
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The paper tape reader supports the BOOT command. The specific forms
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recognized vary from system to system:
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BOOT PTR PDP-4, PDP-7: load RIM loader and start it running
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BOOT -F PTR PDP-4, PDP-7: load funny format loader and start
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it running
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BOOT -H PTR PDP-7: start hardware RIM load at address given
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by address switches (ASW)
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BOOT {-H} PTR PDP-9, PDP-15: start hardware RIM load at addrss
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given by address switches (ASW)
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The PDP-4 did not have a hardware read-in mode load capability.
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The PTR ATTACH command recognizes one switch, -A for ASCII mode. In
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ASCII mode, data returned by the read alphabetic command has even parity.
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@@ -270,7 +341,7 @@ Error handling is as follows:
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OS I/O error x report error and stop
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2.2.2 Paper Tape Punch (PTP)
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2.3.2 Paper Tape Punch (PTP)
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The paper tape punch (PTP) writes data to a disk file. The POS
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register specifies the number of the next data item to be written.
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@@ -302,7 +373,7 @@ Error handling is as follows:
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OS I/O error x report error and stop
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2.2.3 Terminal Input (TTI)
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2.3.3 Terminal Input (TTI)
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On the PDP-7, PDP-9, and PDP-15, the terminal interfaces (TTI, TTO)
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can be set to one of three modes: KSR, 7B, or 8B. In KSR mode, lower
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@@ -333,7 +404,7 @@ to simulate typing ^C:
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SET TTI CTRL-C
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2.2.4 Terminal Output (TTO)
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2.3.4 Terminal Output (TTO)
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The terminal output (TTO) writes to the simulator console window. It
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implements these registers:
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@@ -346,7 +417,7 @@ implements these registers:
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POS 32 number of chararacters output
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TIME 24 time from I/O initiation to interrupt
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2.2.5 Line Printers (LPT, LP9)
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2.3.5 Line Printers (LPT, LP9)
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The line printers (LPT, LP9) write data to a disk file. The POS
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register specifies the number of the next data item to be written.
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@@ -423,7 +494,7 @@ For all printers, error handling is as follows:
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OS I/O error x report error and stop
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2.2.6 Real-Time Clock (CLK)
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2.3.6 Real-Time Clock (CLK)
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The real-time clock (CLK) frequency can be adjusted as follows:
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@@ -444,7 +515,7 @@ The clock implements these registers:
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The real-time clock autocalibrates; the clock interval is adjusted up or
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down so that the clock tracks actual elapsed time.
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2.2.7 Second Terminal (TTI1, TTO1)
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2.3.7 Second Terminal (TTI1, TTO1)
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The second terminal consists of two independent devices, TTI1 and TTO1.
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The second terminal performs input and output through a Telnet session
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@@ -491,7 +562,7 @@ The second terminal output implements these registers:
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DONE 1 device done flag
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TIME 24 time from I/O initiation to interrupt
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2.3 RP15/RP02 Disk Pack (RP)
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2.4 RP15/RP02 Disk Pack (RP)
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RP15 options include the ability to make units write enabled or write locked:
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@@ -526,7 +597,7 @@ Error handling is as follows:
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OS I/O error x report error and stop
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2.4 Type 24 Serial Drum (DRM)
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2.5 Type 24 Serial Drum (DRM)
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The serial drum (DRM) implements these registers:
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@@ -551,7 +622,7 @@ Error handling is as follows:
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Drum data files are buffered in memory; therefore, end of file and OS
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I/O errors cannot occur.
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2.5 RB09 Fixed Head Disk (RB)
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2.6 RB09 Fixed Head Disk (RB)
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The RB09 was an early fixed-head disk for the PDP-9. It was superceded
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by the RF09/RS09. It is disabled by default.
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@@ -585,7 +656,7 @@ Error handling is as follows:
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RB09 data files are buffered in memory; therefore, end of file and OS
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I/O errors cannot occur.
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2.5 RF09/RF15/RS09 Fixed Head Disk (RF)
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2.7 RF09/RF15/RS09 Fixed Head Disk (RF)
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RF09/RF15 options include the ability to set the number of platters
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to a fixed value between 1 and 8, or to autosize the number of platters
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@@ -632,7 +703,7 @@ Error handling is as follows:
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RF15/RF09 data files are buffered in memory; therefore, end of file and OS
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I/O errors cannot occur.
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2.6 Type 550/555, TC02/TU55, and TC15/TU56 DECtape (DT)
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2.8 Type 550/555, TC02/TU55, and TC15/TU56 DECtape (DT)
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The PDP-4 and PDP-7 use the Type 550 DECtape, a programmed I/O controller.
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The PDP-9 uses the TC02, and the PDP-15 uses the TC15. The TC02 and TC15
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@@ -693,7 +764,7 @@ operate correctly.
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- ACTIME must be less than DCTIME, and both need to be at
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least 100 times LTIME
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2.7 TC59/TU10 Magnetic Tape (MT)
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||||
2.9 TC59/TU10 Magnetic Tape (MT)
|
||||
|
||||
Magnetic tape options include the ability to make units write enabled or
|
||||
or write locked.
|
||||
@@ -727,7 +798,7 @@ Error handling is as follows:
|
||||
|
||||
OS I/O error parity error; if STOP_IOE, stop
|
||||
|
||||
2.8 Symbolic Display and Input
|
||||
2.10 Symbolic Display and Input
|
||||
|
||||
The 18b PDP simulators implement symbolic display and input. Display is
|
||||
controlled by command line switches:
|
||||
@@ -754,15 +825,18 @@ The PDP-15 also recognizes an additional input mode:
|
||||
# or -p five character packed ASCII string in
|
||||
two 18b words
|
||||
|
||||
Instruction input uses standard 18b PDP assembler syntax. There are six
|
||||
Instruction input uses standard 18b PDP assembler syntax. There are eight
|
||||
instruction classes: memory reference, EAE, index (PDP-15 only), IOT,
|
||||
operate, and LAW.
|
||||
operate, LAW, FP15 memory reference (PDP-15 only), and FP15 no operand
|
||||
(PDP-15 only).
|
||||
|
||||
Memory reference instructions have the format
|
||||
|
||||
memref {I/@} address{,X}
|
||||
PDP-4, PDP-7: memref {I} address
|
||||
PDP-9: memref{*} address
|
||||
PDP-15: memref{*} address{,X}
|
||||
|
||||
where I (PDP-4, PDP-7, PDP-9) /@ (PDP-15) signifies indirect reference,
|
||||
where I (PDP-4, PDP-7) /* (PDP-9, PDP-15) signifies indirect reference,
|
||||
and X signifies indexing (PDP-15 in page mode only). The address is an
|
||||
octal number in the range 0 - 017777 (PDP-4, PDP-7, PDP-9, and PDP-15 in
|
||||
bank mode) or 0 - 07777 (PDP-15 in page mode).
|
||||
@@ -805,13 +879,27 @@ Operate instructions have the format
|
||||
The simulator does not check the legality of the proposed combination. The
|
||||
operands for MUY and DVI must be deposited explicitly.
|
||||
|
||||
Finally, the LAW instruction has the format
|
||||
The LAW instruction has the format
|
||||
|
||||
LAW immediate
|
||||
|
||||
where immediate is in the range of 0 to 017777.
|
||||
|
||||
2.9 Character Sets
|
||||
FP15 memory reference instructions occupy two successive words and have
|
||||
the format
|
||||
|
||||
fpmem{*} address
|
||||
|
||||
where * signifies indirect addressing. The address is a number in the range
|
||||
0 - 0377777.
|
||||
|
||||
FP15 no operand instructions occupy two successive words and have the format
|
||||
|
||||
fpop
|
||||
|
||||
The second word is ignored on output and set to 0 on input.
|
||||
|
||||
2.11 Character Sets
|
||||
|
||||
The PDP-4's console was an ASR-28 Teletype; its character encoding was
|
||||
Baudot. The PDP-4's line printer used a modified Hollerith character
|
||||
|
||||
Reference in New Issue
Block a user