mirror of
https://github.com/open-simh/simtools.git
synced 2026-01-14 07:39:37 +00:00
0ab2a4fa16
while also adding some consistency. All listings now list . (dot) as defined so they need updating.
211 lines
15 KiB
Plaintext
211 lines
15 KiB
Plaintext
1 ;;;;;
|
|
2 ;
|
|
3 ; Test floating point numbers.
|
|
4 ;
|
|
5 ; The values in the comments are the reference values from MACRO V05.05.
|
|
6 ;
|
|
7 000000 040200 .word ^F 1.0 ; 040200
|
|
8 000002 140200 .word ^F-1.0 ; 140200
|
|
9 000004 137600 .word -^F 1.0 ; 137600
|
|
10 000006 037600 .word -^F-1.0 ; 037600
|
|
11
|
|
12 000010 040706 .word ^F6.2 ; 040706
|
|
13 000012 137071 .word ^C^F6.2 ; 137071
|
|
14 000014 137071 .word ^C<^F6.2> ; 137071
|
|
15
|
|
16 000016 040706 063146 .flt2 6.2 ; 040706 063146
|
|
17 000022 040706 063146 063146 .flt4 6.2 ; 040706 063146 063146 063146
|
|
000030 063146
|
|
18
|
|
19 000032 040300 000000 .flt2 1.5 ; 040300 000000
|
|
20 000036 040300 000000 000000 .flt4 1.5 ; 040300 000000 000000 000000
|
|
000044 000000
|
|
21
|
|
22 000046 040511 .word ^F 3.1415926535897932384626433 ; 040511
|
|
23 000050 040511 007733 .flt2 3.1415926535897932384626433 ; 040511 007733
|
|
24 000054 040511 007732 121041 .flt4 3.1415926535897932384626433 ; 040511 007732 121041 064302
|
|
000062 064302
|
|
25
|
|
26 ; Test some large numbers at the edge of the exactly representable
|
|
27 ; integers.
|
|
28 ; 1 << 56 just barely fits: it uses 57 bits but the lsb is 0 so
|
|
29 ; when it is cut off, we don't notice.
|
|
30 ; 1 << 56 + 1 R the lsb are 01 and is cut off.
|
|
31 ; 1 << 56 + 2 the lsb are 10 and the missing 0 goes unnoticed.
|
|
32
|
|
33 ; 1 << 56 - 1 consists of 56 1 bits. This value and all smaller ints
|
|
34 ; 1 << 56 - 2 get represented exactly.
|
|
35
|
|
36 ; Going up, to rounding steps of 4:
|
|
37 ;
|
|
38 ; 1 << 57
|
|
39 ; 1 << 57 + 4 next higher available representation
|
|
40 ; 1 << 57 + 8 next higher available representation
|
|
41
|
|
42 ; 1 << 56 - 3
|
|
43 000064 056177 177777 177777 .flt4 72057594037927933 ; 056177 177777 177777 177775
|
|
000072 177775
|
|
44 ; 1 << 56 - 2
|
|
45 000074 056177 177777 177777 .flt4 72057594037927934 ; 056177 177777 177777 177776
|
|
000102 177776
|
|
46
|
|
47 ; 1 << 56 - 1
|
|
48 000104 056200 .word ^F 72057594037927935 ; 056200 (rounded up!)
|
|
49 000106 056200 000000 .flt2 72057594037927935 ; 056200 000000 (rounded up!)
|
|
50 000112 056177 177777 177777 .flt4 72057594037927935 ; 056177 177777 177777 177777
|
|
000120 177777
|
|
51
|
|
52 ; 1 << 56
|
|
53 000122 056200 .word ^F 72057594037927936 ; 056200
|
|
54 000124 056200 000000 .flt2 72057594037927936 ; 056200 000000
|
|
55 000130 056200 000000 000000 .flt4 72057594037927936 ; 056200 000000 000000 000000
|
|
000136 000000
|
|
56
|
|
57 000140 056200 000000 000000 .flt4 72057594037927938 ; 1 << 56 + 2
|
|
000146 000001
|
|
58 ; 056200 000000 000000 000001
|
|
59
|
|
60 000150 056400 000000 000000 .flt4 144115188075855872 ; 1 << 57
|
|
000156 000000
|
|
61 ; 056400 000000 000000 000000
|
|
62 000160 056400 000000 000000 .flt4 144115188075855873 ; 1 << 57 + 1
|
|
000166 000000
|
|
63 ; 056400 000000 000000 000000 (inexact)
|
|
64 000170 056400 000000 000000 .flt4 144115188075855874 ; 1 << 57 + 2
|
|
000176 000001
|
|
65 ; 056400 000000 000000 000001 (inexact)
|
|
66 000200 056400 000000 000000 .flt4 144115188075855875 ; 1 << 57 + 3
|
|
000206 000001
|
|
67 ; 056400 000000 000000 000001 (inexact)
|
|
68 000210 056400 000000 000000 .flt4 144115188075855876 ; 1 << 57 + 4
|
|
000216 000001
|
|
69 ; 056400 000000 000000 000001 (exact!)
|
|
70 000220 056400 000000 000000 .flt4 144115188075855880 ; 1 << 57 + 8
|
|
000226 000002
|
|
71 ; 056400 000000 000000 000002 (exact!)
|
|
72
|
|
73 ; This one triggers rounding up (round == 1)
|
|
74 000230 040725 052507 055061 .flt4 6.66666 ; 040725 052507 055061 122276
|
|
000236 122276
|
|
75
|
|
76 ; MACRO-11 truncates these ^F values despite what the manual says.
|
|
77 ; On the other hand, it does round up some of the test values above.
|
|
78 ; We stick to the manual since the result is more consistent.
|
|
79
|
|
80 ; Expression RT-11 this
|
|
81 ; MACRO-11 version
|
|
82 ; V05.06
|
|
83
|
|
84 000240 040177 .word ^F 0.994140625 ; (2**9-3)/2**9 040176 040177
|
|
85 000242 040176 100000 000000 .flt4 0.994140625
|
|
000250 000000
|
|
86
|
|
87 000252 040200 .word ^F 0.998046875 ; (2**9-1)/2**9 040177 040200
|
|
88 000254 040177 100000 000000 .flt4 0.998046875
|
|
000262 000000
|
|
89
|
|
90 000264 040201 .word ^F 1.00390625 ; (2**8+1)/2**8 040200 040201
|
|
91 000266 040200 100000 000000 .flt4 1.00390625
|
|
000274 000000
|
|
92
|
|
93 000276 040202 .word ^F 1.01171875 ; (2**8+3)/2**8 040201 040202
|
|
94 000300 040201 100000 000000 .flt4 1.01171875
|
|
000306 000000
|
|
95
|
|
96 000310 077777 177777 177777 .flt4 1.701411834604692307e+38 ; 077777 177777 177777 177777
|
|
000316 177777
|
|
97 000320 077777 177777 177777 .FLT4 170141183460469230551095682998472802304 ; 2**127-2**70
|
|
000326 177777
|
|
98 000330 077777 177777 177777 .FLT4 170141183460469230564930741053754966015 ; 2**127-(2**70-2**64+2**62+1)
|
|
000336 177777
|
|
99 000340 077777 177777 177777 .FLT4 170141183460469230564930741053754966016 ; 2**127-(2**70-2**64+2**62+2)
|
|
000346 177777
|
|
100
|
|
101 ; Several ways to define a name for the fpp registers
|
|
102
|
|
103 000000 ac0 = r0
|
|
104 000001 ac1 = %1
|
|
105 000002 f2 = %2
|
|
106
|
|
107 000350 171003 mulf r3,ac0
|
|
108 000352 171102 mulf r2,ac1
|
|
109 000354 172227 041040 ADDF #^O41040,F2
|
|
110 000360 172127 040200 addf #1,ac1
|
|
111
|
|
112 000364 171003 mulf r3,ac0
|
|
113 000366 171102 mulf r2,ac1
|
|
114 000370 172227 041040 addf #^O41040,F2 ; taken literally
|
|
115 000374 172127 040200 addf #1,ac1 ; as float
|
|
116 000400 172127 040200 addf #1.,ac1 ; as float
|
|
117 000404 172127 040200 addf #1.0,ac1 ; as float
|
|
118 000410 172127 000001 addf #^D1,ac1 ; literally
|
|
119 000414 173027 000001 subf #<1>,ac0 ; literally
|
|
120 000420 172127 000002 addf #<1+1>,ac1 ; literally
|
|
test-float.mac:121: ***ERROR Invalid addressing mode (1st operand, fsrc: Invalid expression after '#')
|
|
121 subf #<1.0>,ac0 ; error
|
|
122 000424 172127 040300 addf #1.5,ac1 ; as float
|
|
123 000430 172127 140263 addd #-1.4,ac1 ; as float
|
|
124 000434 173027 040200 subf #<^F 1.0>,ac0 ; as float
|
|
test-float.mac:125: ***ERROR Invalid addressing mode (1st operand, fsrc: Invalid expression after '#')
|
|
125 subf #<^D 1.0>,ac0 ; error
|
|
126 000440 173027 000001 subf #<^D 1>,ac0 ; literally
|
|
127 000444 173027 000002 subf #^D<1+1>,ac0 ; literally
|
|
128 000450 173027 000002 subf #^D 1+1 ,ac0 ; literally
|
|
129 000454 173027 042572 subf #1e3,ac0 ; as float
|
|
test-float.mac:130: ***ERROR Invalid syntax (comma expected)
|
|
130 subf #1e 3,ac0 ; TODO: accepted by MACRO11 as 1E3 (but not 1 e3, 1 e 3)
|
|
131 000001 a = 1
|
|
132 000003 e3 = 3
|
|
133 000460 173027 000001 subf #a,ac0 ; a interpreted as bit pattern
|
|
134 000464 173027 000001 subf #<a>,ac0 ; a interpreted as bit pattern
|
|
135 000470 173027 000003 subf #e3,ac0 ; e3 is the label
|
|
test-float.mac:136: ***ERROR Invalid addressing mode (1st operand, fsrc: Invalid expression after '#')
|
|
136 subf #<1e3>,ac0 ; error N
|
|
137
|
|
test-float.mac:138: ***ERROR Junk at end of line ('5 ; bad: ')
|
|
138 000474 170627 000002 absf #2.5 ; bad: operand is destination
|
|
test-float.mac:139: ***ERROR Junk at end of line ('5 ; bad: ')
|
|
139 000500 170527 000002 tstd #2.5 ; bad: operand is considered FDST by the arch handbook
|
|
test-float.mac:140: ***ERROR Junk at end of line ('5 ; bad: junk')
|
|
140 000504 174027 000002 stf ac0,#2.5 ; bad: junk at end of line
|
|
141 000510 174027 000002 stf ac0,#2 ; doesn't makes sense but MACRO11 allows it
|
|
142
|
|
143 ; Test immediate source argument for instructions that have one (src or fsrc)
|
|
144
|
|
145 000514 172027 040200 addd #1,ac0 ; float
|
|
146 000520 172027 040200 addf #1,ac0 ; float
|
|
147 000524 173427 040200 cmpd #1,ac0 ; float
|
|
148 000530 173427 040200 cmpf #1,ac0 ; float
|
|
149 000534 174427 040200 divd #1,ac0 ; float
|
|
150 000540 174427 040200 divf #1,ac0 ; float
|
|
151 000544 177427 040200 ldcdf #1,ac0 ; float
|
|
152 000550 177427 040200 ldcfd #1,ac0 ; float
|
|
153 000554 177027 000001 ldcid #1,ac0 ; integer
|
|
154 000560 177027 000001 ldcif #1,ac0 ; integer
|
|
155 000564 177027 000001 ldcld #1,ac0 ; integer
|
|
156 000570 177027 000001 ldclf #1,ac0 ; integer
|
|
157 000574 172427 040200 ldd #1,ac0 ; float
|
|
158 000600 172427 040200 ldf #1,ac0 ; float
|
|
159 000604 176427 000001 ldexp #1,ac0 ; integer
|
|
160 000610 171427 040200 modd #1,ac0 ; float
|
|
161 000614 171427 040200 modf #1,ac0 ; float
|
|
162 000620 171027 040200 muld #1,ac0 ; float
|
|
163 000624 171027 040200 mulf #1,ac0 ; float
|
|
164 000630 173027 040200 subd #1,ac0 ; float
|
|
165 000634 173027 040200 subf #1,ac0 ; float
|
|
166
|
|
167 .end
|
|
167
|
|
|
|
|
|
Symbol table
|
|
|
|
. 000640R 001 AC0 =%000000 E3 = 000003
|
|
A = 000001 AC1 =%000001 F2 =%000002
|
|
|
|
|
|
Program sections:
|
|
|
|
. ABS. 000000 000 (RW,I,GBL,ABS,OVR,NOSAV)
|
|
000640 001 (RW,I,LCL,REL,CON,NOSAV)
|