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while also adding some consistency. All listings now list . (dot) as defined so they need updating.
305 lines
18 KiB
Plaintext
305 lines
18 KiB
Plaintext
1 ;;;;;
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2 ;
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3 ; Use all opcodes once
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4 ;
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5
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6 000000 000000 halt
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7 000002 000001 wait
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8 000004 000002 rti
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9 000006 000003 bpt
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10 000010 000004 iot
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11 000012 000005 reset
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12 000014 000006 rtt
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13 000016 000007 mfpt
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14
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15 ; 00 00 10 ... 00 00 77 unused
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16
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17 000020 000167 177774 jmp .
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18 000024 000207 rts pc
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19
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20 ; 00 02 10 ... 00 02 27 unused
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21
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22 000026 000233 spl 3
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23 000030 000240 nop ; = clear NO condition codes
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24
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25 000032 000241 clc
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26 000034 000242 clv
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27 000036 000244 clz
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28 000040 000250 cln
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29 000042 000257 ccc
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30
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31 000044 000261 sec
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32 000046 000262 sev
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33 000050 000264 sez
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34 000052 000270 sen
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35 000054 000277 scc
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36
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37 000056 000333 swab @(r3)+
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38
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39 000060 000777 br .
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40 000062 001377 bne .
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41 000064 001777 beq .
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42 000066 002377 bge .
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43 000070 002777 blt .
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44 000072 003377 bgt .
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45 000074 003777 ble .
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46
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47 000076 004767 177774 jsr pc,.
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48
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49 000102 005033 clr @(r3)+
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50 000104 005133 com @(r3)+
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51 000106 005233 inc @(r3)+
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52 000110 005333 dec @(r3)+
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53 000112 005433 neg @(r3)+
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54 000114 005533 adc @(r3)+
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55 000116 005633 sbc @(r3)+
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56 000120 005733 tst @(r3)+
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57
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58 000122 006033 ror @(r3)+
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59 000124 006133 rol @(r3)+
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60 000126 006233 asr @(r3)+
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61 000130 006333 asl @(r3)+
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62 000132 006433 mark #33
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63 000134 006533 mfpi @(r3)+
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64 000136 006633 mtpi @(r3)+
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65 000140 006733 sxt @(r3)+
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66
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67 000142 007033 csm @(r3)+ ; only some models
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68 ; 00 71 00 ... 00 71 77 unused
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69 000144 007233 tstset @(r3)+ ; only some models
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70 000146 007333 wrtlck @(r3)+ ; only some models
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71
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72 ; 00 74 00 ... 00 77 77 unused
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73
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74 000150 011122 mov (r1),(r2)+
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75 000152 021122 cmp (r1),(r2)+
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76 000154 031122 bit (r1),(r2)+
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77 000156 041122 bic (r1),(r2)+
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78 000160 051122 bis (r1),(r2)+
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79 000162 061122 add (r1),(r2)+
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80
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81 000164 070211 mul (r1),r2
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82 000166 071211 div (r1),r2
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83 000170 072211 ash (r1),r2
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84 000172 073211 ashc (r1),r2
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85 000174 074122 xor r1,(r2)+
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86
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87 000176 075001 fadd r1 ; PDP-11/35, 11/40 floating point unit (FIS)
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88 000200 075011 fsub r1
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89 000202 075021 fmul r1
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90 000204 075031 fdiv r1
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91
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92 ; 07 50 40 ... 07 60 17 unused
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93
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94 ; 07 60 20 ... 07 61 77 CIS Commercial Instruction Set
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95
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96 ; 07600x unused
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97 ; 07601x unused
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98 000206 076020 l2d0 ; 07602x
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99 000210 076021 l2d1
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100 000212 076022 l2d2
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101 000214 076023 l2d3
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102 000216 076024 l2d4
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103 000220 076025 l2d5
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104 000222 076026 l2d6
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105 000224 076027 l2d7
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106
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107 000226 076030 movc ; 07603x
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108 000230 076031 movrc
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109 000232 076032 movtc
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110 ; 3..7?
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111
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112 000234 076040 locc ;07604x
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113 000236 076041 skpc
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114 000240 076042 scanc
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115 000242 076043 spanc
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116 000244 076044 cmpc
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117 000246 076045 matc
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118 ; 6..7?
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119
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120 000250 076050 addn ; 07605x
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121 000252 076051 subn
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122 000254 076052 cmpn
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123 000256 076053 cvtnl
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124 000260 076054 cvtpn
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125 000262 076055 cvtnp
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126 000264 076056 ashn
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127 000266 076057 cvtln
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128
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129 000270 076060 l3d0 ; 07606x
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130 000272 076061 l3d1
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131 000274 076062 l3d2
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132 000276 076063 l3d3
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133 000300 076064 l3d4
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134 000302 076065 l3d5
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135 000304 076066 l3d6
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136 000306 076067 l3d7
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137
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138 000310 076070 addp ; 07607x
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139 000312 076071 subp
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140 000314 076072 cmpp
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141 000316 076073 cvtlp
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142 000320 076073 cvtpl
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143 000322 076074 mulp
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144 000324 076075 divp
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145 000326 076076 ashp
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146 ; 7?
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147 ; 07610x unused
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148 ; 07611x unused
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149 ; 07612x unused: would be L2D0I
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150
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151 ; All the *I instructions need inline operands, which are omitted in this test.
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152 ; This Macro11 (as an extension) allows to specify them as arguments
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153 ; following the opcode, so you don't have to use inline .word directives.
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154
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155 000330 076130 movci ; 07613x
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156 000332 076131 movrci
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157 000334 076132 movtci
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158 ; 3..7?
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159
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160 000336 076140 locci ; 07614x
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161 000340 076141 skpci
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162 000342 076142 scanci
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163 000344 076143 spanci
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164 000346 076144 cmpci
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165 000350 076145 matci
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166 ; 6..7?
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167
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168 000352 076150 addni ; 07615x
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169 000354 076151 subni
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170 000356 076152 cmpni
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171 000360 076153 cvtnli
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172 000362 076154 cvtpni
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173 000364 076155 cvtnpi
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174 000366 076156 ashni
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175 000370 076157 cvtlni
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176
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177 ; 07616x unused: would be L3D0I
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178
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179 000372 076170 addpi ; 07617x
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180 000374 076171 subpi
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181 000376 076172 cmppi
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182 000400 076177 cvtlpi
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183 000402 076173 cvtpli
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184 000404 076174 mulpi
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185 000406 076175 divpi
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186 000410 076176 ashpi
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187 ; 7?
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188
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189 ; 07 62 00 ... 07 67 77 unused
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190
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191 000412 077101 sob r1,.
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192
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193 000414 100377 bpl .
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194 000416 100777 bmi .
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195 000420 101377 bhi .
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196 000422 101777 blos .
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197 000424 102377 bvc .
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198 000426 103377 bcc .
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199 000430 103377 bhis . ; same
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200 000432 103777 bcs .
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201 000434 103777 blo . ; same
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202
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203 000436 104000 emt #0 ; ...
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204 000440 104377 emt #255.
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205 000442 104400 trap #0 ; ...
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206 000444 104777 trap #255.
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207
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208 000446 105033 clrb @(r3)+
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209 000450 105133 comb @(r3)+
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210 000452 105233 incb @(r3)+
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211 000454 105333 decb @(r3)+
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212 000456 105433 negb @(r3)+
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213 000460 105533 adcb @(r3)+
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214 000462 105633 sbcb @(r3)+
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215 000464 105733 tstb @(r3)+
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216
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217 000466 106033 rorb @(r3)+
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218 000470 106133 rolb @(r3)+
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219 000472 106233 asrb @(r3)+
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220 000474 106333 aslb @(r3)+
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221
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222 000476 106433 mtps @(r3)+
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223 000500 106511 mfpd (r1)
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224 000502 106611 mtpd (r1)
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225 000504 106733 mfps @(r3)+
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226
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227 000506 111122 movb (r1),(r2)+
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228 000510 121122 cmpb (r1),(r2)+
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229 000512 131122 bitb (r1),(r2)+
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230 000514 141122 bicb (r1),(r2)+
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231 000516 151122 bisb (r1),(r2)+
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232 000520 161122 sub (r1),(r2)+
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233
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234 ; 17 00 00 ... 17 77 77 Floating Point Processor (FPP) floating point
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235
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236 000522 170000 cfcc
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237 000524 170001 setf
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238 000526 170002 seti
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239 000530 170011 setd
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240 000532 170012 setl
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241
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242 000534 170131 ldfps @(r1)+
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243 000536 170231 stfps @(r1)+
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244 000540 170331 stst @(r1)+
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245
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246 000001 ac1 = %1
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247 000005 ac5 = %5
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248
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249 000542 170405 clrf ac5 ; fdst: fpp register or general mode (not register)
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250 000544 170435 clrd @(r5)+ ; same opcode
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251 000546 170505 tstf ac5
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252 000550 170535 tstd @(r5)+ ; same opcode
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253 000552 170605 absf ac5
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254 000554 170635 absd @(r5)+ ; same opcode
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255 000556 170705 negf ac5
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256 000560 170735 negd @(r5)+ ; same opcode
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257
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258 000562 171135 mulf @(r5)+,ac1
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259 000564 171105 muld ac5,ac1 ; same opcode
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260 000566 171535 modf @(r5)+,ac1
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261 000570 171505 modd ac5,ac1 ; same opcode
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262 000572 172135 addf @(r5)+,ac1
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263 000574 172105 addd r5,ac1 ; same opcode
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264 000576 172535 ldf @(r5)+,ac1
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265 000600 172505 ldd r5,ac1 ; same opcode
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266 000602 173135 subf @(r5)+,ac1
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267 000604 173105 subd r5,ac1 ; same opcode
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268
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269 000606 173535 cmpf @(r5)+,ac1
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270 000610 173505 cmpd r5,ac1 ; same opcode
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271 000612 174135 stf ac1,@(r5)+
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272 000614 174105 std ac1,r5 ; same opcode
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273 000616 174535 divf @(r5)+,ac1
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274 000620 174505 divd r5,ac1 ; same opcode
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275
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276 000622 175135 stexp ac1,@(r5)+
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277 000624 175535 stcfi ac1,@(r5)+
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278 000626 175535 stcfl ac1,@(r5)+ ; same opcode
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279 000630 175535 stcdi ac1,@(r5)+ ; same opcode
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280 000632 175535 stcdl ac1,@(r5)+ ; same opcode
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281 000634 176135 stcfd ac1,@(r5)+
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282 000636 176135 stcdf ac1,@(r5)+ ; same opcode
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283
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284 000640 176535 ldexp @(r5)+,ac1
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285 000642 177135 ldcif @(r5)+,ac1 ; same opcode
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286 000644 177135 ldcid @(r5)+,ac1 ; same opcode
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287 000646 177135 ldclf @(r5)+,ac1 ; same opcode
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288 000650 177135 ldcld @(r5)+,ac1 ; same opcode
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289 000652 177535 ldcdf @(r5)+,ac1
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290 000654 177535 ldcfd @(r5)+,ac1 ; same opcode
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291
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292 .end
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292
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Symbol table
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. 000656R 001 AC1 =%000001 AC5 =%000005
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Program sections:
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. ABS. 000000 000 (RW,I,GBL,ABS,OVR,NOSAV)
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000656 001 (RW,I,LCL,REL,CON,NOSAV)
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