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mirror of https://github.com/openpower-cores/a2i.git synced 2026-01-11 23:53:05 +00:00

Relax GHDL compile errors to warnings. Closes #53.

Signed-off-by: Lars Asplund <lars.anders.asplund@gmail.com>
This commit is contained in:
Lars Asplund 2022-08-12 08:07:24 +02:00
parent 96299300ab
commit 2483331025

4
run.py
View File

@ -18,4 +18,8 @@ prj.add_library("top").add_source_files(_rel / "src" / "vhdl" / "work" / "*.vhdl
# Simulation only library containing VHDL mocks for Verilog UNIMACROs
prj.add_library("unimacro").add_source_files(_rel / "sim" / "unimacro" / "*.vhdl")
# The code isn't strictly compliant with the VHDL standard which causes some simulators
# to fail compilation. In GHDL these errors can be relaxed to warnings.
prj.set_compile_option("ghdl.a_flags", ["-frelaxed"])
prj.main()