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0f2949dd2b
2. Make frequency measurement better for integral modem case. 3. New test mode: raw waveform (for integral modem).
337 lines
11 KiB
Plaintext
337 lines
11 KiB
Plaintext
// DDCMP sync framer PIO state machines
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//
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// Copyright (C) 2021 by Paul Koning
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// Global defines
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// irqs
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.define rxbit 4
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.define txbit 5
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/* The three configuration cases, and the state machines used for
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each case, are:
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1. RS232 signaling, modem supplied clocks
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modem_clk_xmit, modem_clk_recv
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2. RS232 signaling, local clock source
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local_clk_xmit, local_clk_recv
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3. Integral modem
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inmodem_xmit, inmodem_rxbit, local_clk_recv
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4. Integral modem, raw waveforms
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inmodem_rawxmit, inmodem_rxbit, local_clk_recv
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Note that these state machines all have to be in the same PIO,
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because they communicate via an IRQ. While that is documented
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as working across all state machines, in reality it seems to be
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local to a given PIO.
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In all cases, if an activity LED is wanted, the pulse_stretcher
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state machine is also used.
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*/
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/* Transmit for use with modem sourced clock
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This is the transmit pin driver for the case where the modem
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supplies the bit clocks, i.e., for use along with the modem_clk
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state machine.
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in_base is the transmit clock pin (from modem)
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out_base is the transmit data pin
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out_count is 1
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state machine clock: fast (minimally 8x the bit rate).
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output fifo threshold is 8 or 32, joined output fifos
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Initialization:
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Before starting this state machine, use the execute register to
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force the execution of these two instructions:
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pull
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mov x, osr
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The data pushed into the output FIFO by the controlling program is
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the sync pattern, 0x96969696.
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*/
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.program modem_clk_xmit
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.wrap_target
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wait 0 pin 0
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wait 1 pin 0
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out pins 1
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pull ifempty noblock
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.wrap
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/* Sync search and data receive
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This is the receive byte framer, modem clock case
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The bit clock used here is the one supplied by the modem.
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When searching for sync, no data is sent to the FIFO. But
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when sync is found, the sync pattern seen (4 bytes of 0x96)
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is pushed to the receive FIFO as a marker. This allows the
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mainline code to flush data in the FIFO preceding a resync
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without having to stop the state machine to do so. It depends
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on the assumption that 4 SYN bytes aren't found in the packet
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data past the point where the main code decided to resync; that
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is admittedly possible but the probability is low enough not
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to worry about it.
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in_base is the receive data pin; the receive bit clock
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pin must be the next higher pin number.
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sideset_base is the "in sync" LED pin
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sideset_count is 1 (optional side set)
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state machine clock: fast (minimally 8x the bit rate)
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input fifo threshold is 32
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Initialization:
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Before starting this state machine, use the execute register to
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force the execution of these three instructions:
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pull
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mov y, osr
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mov isr, null
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then set the fifo configuration to joined input fifos. The data
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pushed into the output FIFO by the controlling program is the sync
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pattern, 0x96969696.
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To go back to sync search, jump this state machine back to its
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beginning address.
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*/
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.program modem_clk_recv
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.side_set 1 opt
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search: wait 1 pin 1 side 0 // indicate not in sync
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wait 0 pin 1
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in pins, 1
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mov x, isr
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jmp x!=y, search
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push side 1 // indicate in sync
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.wrap_target
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wait 1 pin 1
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wait 0 pin 1
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in pins, 1
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push iffull noblock
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.wrap
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/* Transmit for use with locally generated clock (DCE case)
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This is a combination clock and transmit data engine.
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It generates the bit clock, which is an output here, along
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with the transmit data. It also provides that bit clock
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to the receive state machine
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out_base is the transmit data pin
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out_count is 1
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sideset_base is the clock output pin
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sideset_count is 1 (with optional side set)
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state machine clock: 4x the required bit rate.
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output fifo threshold is 8 or 32, joined output fifos
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Initialization:
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Before starting this state machine, use the execute register to
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force the execution of these two instructions:
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pull
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mov x, osr
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The data pushed into the output FIFO by the controlling program is
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the sync pattern, 0x96969696.
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*/
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.program local_clk_xmit
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.side_set 1 opt
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.wrap_target
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irq rxbit side 1 [1]
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out pins 1 side 0
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pull ifempty noblock
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.wrap
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/* Transmit, integral modem case
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This generates the transmit data stream modulated in integral
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modem form.
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out_base is the transmit data pin. side_set also assigned this.
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out_count is 1
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state machine clock: 4x the required bit rate.
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output fifo threshold is 8 or 32, joined output fifos
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Initialization:
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Before starting this state machine, use the execute register to
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force the execution of these two instructions:
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pull
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mov x, osr
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The data pushed into the output FIFO by the controlling program is
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the sync pattern, 0x96969696.
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*/
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.program inmodem_xmit
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.side_set 1 opt
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.wrap_target
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loop1: pull ifempty noblock side 1 // start of bit cell, rising edge
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out y, 1
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mov pins, y // if 0, falling edge
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jmp !y, loop1 // stay in this block if zero
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loop2: pull ifempty noblock side 0 // start of bit cell, falling edge
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out y, 1
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mov pins, !y // if 0, rising edge
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jmp !y, loop2 // stay in this block if zero
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.wrap
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/* Transmit, integral modem case, raw waveforms
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This sends the transmit data stream supplied by the higher
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layer code (no modulation function). When no data is supplied,
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the transmit pin idles in whatever state it was last set to.
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out_base is the transmit data pin. side_set also assigned this.
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out_count is 1
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state machine clock: 4x the required data rate (so the state machine
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runs in 2 cycles because there are two bauds per bit)
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output fifo threshold is 8 or 32, joined output fifos
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*/
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.program inmodem_rawxmit
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.side_set 1 opt
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.wrap_target
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loop: pull ifempty // get data if needed
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out pins 1
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.wrap
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/* Sync search and data receive
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This is the receive byte framer, local clock or integral modem.
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The bit clock used here is the one generated by the local
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transmit or recovered by the integral modem receive bit recovery.
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Apart from waiting for an irq rather than a falling edge on the
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clock pin, this code is identical to that of modem_clk_recv above.
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in_base is the receive data pin
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sideset_base is the "in sync" LED pin
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sideset_count is 1 (optional side set)
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state machine clock: fast (minimally 8x the bit rate)
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input fifo threshold is 32
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Initialization:
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Before starting this state machine, use the execute register to
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force the execution of these three instructions:
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pull
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mov y, osr
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mov isr, null
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then set the fifo configuration to joined input fifos. The data
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pushed into the output FIFO by the controlling program is the sync
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pattern, 0x96969696.
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To go back to sync search, jump this state machine back to its
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beginning address.
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*/
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.program local_clk_recv
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.side_set 1 opt
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search: wait 1 irq rxbit side 0 // indicate not in sync
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in pins, 1
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mov x, isr
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jmp x!=y, search
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push side 1 // indicate in sync
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.wrap_target
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wait 1 irq rxbit
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in pins, 1
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push iffull noblock
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.wrap
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/* Integral modem bit recovery
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This is the bit clock and data recovery for the integral modem. It
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sends the recovered bit stream to a pin which is output here but is
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the input pin of the "local_clk_recv" state machine program.
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Availability of the recovered bit is signaled by IRQ "rxbit"; this
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doesn't happen until the edge that marks the start of the next bit
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cell.
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The strobe signal (on the next pin) is for test, to allow
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observation of the receive eye pattern and the point at which the
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state machine strobes the received data. The leading edge
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indicates the strobe point. It is also the pin watched by the
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frequency measurement state machine for the integral modem case.
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in_base is the modulated receive data pin
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jmp_pin is that same pin
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set_base is the strobe pin
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set_count is 1
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sideset_base is the recovered data pin (for "local_clk_recv" to use
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as input) and strobe pin.
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state machine clock is 12x the bit rate.
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*/
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.program inmodem_rxbit
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.side_set 2 opt
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wait1: wait 1 pin 0 // wait for rising edge
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irq rxbit [2] // signal receive SM
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set pins, 0 [3] // drop strobe signal
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jmp pin, wait0 side 3 // recovered a 1, strobe
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jmp wait1 side 2 // recovered a zero
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wait0: wait 0 pin 0 // wait for falling edge
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irq rxbit [2] // signal receive SM
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set pins, 0 [3] // drop strobe signal
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jmp pin, wait0 side 2 // recovered a zero, strobe
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jmp wait1 side 3 // recovered a 1
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/* Pulse stretcher
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This generates a 50 ms pulse on the output pin to produce
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an adequately visible flash of light from the connected LED.
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To generate a flash, jump this state machine back to its
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beginning address. Note that a flash is generated when
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this SM first starts, that's used as the device startup
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indication.
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set_base is the LED pin (e.g., 25 for the built-in LED)
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set_count is 1
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state machine clock is 2000 Hz.
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*/
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.program pulse_stretch
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set pins, 1 [31] // LED on
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nop [31]
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.wrap_target
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set pins, 0
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.wrap
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/* Frequency counter
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This counts down while watching for 32 periods of the input
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pin, and sends the resulting count to the FIFO.
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in_base is the clock_ok pin
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jmp_base is the pin to monitor
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state machine clock is max.
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output fifo threshold is 32, joined output fifos.
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*/
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.program freq
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.wrap_target
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wait 1 pin 0 // wait for clock ok
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set x, 31 // period counter
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set y, 0 // tick counter
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waitl: jmp y--, wl2 // count a tick
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wl2: jmp pin, waitl // loop if not low yet
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waith: jmp pin, cycle // exit loop if high
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jmp y--, waith // count a tick
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cycle: jmp x--, waitl // count cycles
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mov isr, y // get the measured tick count
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push noblock // send it to the main CPU
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.wrap
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/* Bit clock watchdog
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This watches the bit clock (same pin that the frequency counter
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watches), expecting to see a period no greater than N times through
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the loop (roughly 2 * N state machine cycles). If the bit clock
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stops or slows down more than that, it sets the clock_ok pin to 0.
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in_base is the pin to monitor
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jmp_base is the pin to monitor
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sideset_base is the clock_ok pin
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sideset_count is 1
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state machine clock is max.
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output fifo is used to send a new period value to the watchdog;
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this can be used after the frequence measurement SM has measured
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the external modem data rate.
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Initialization:
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Before starting this state machine, use the execute register to
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force the execution of these two instructions:
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pull
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mov x, osr
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The value sent is the initial value of the period to use.
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*/
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.program watchdog
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.side_set 1 opt
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.wrap_target
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top: wait 1 pin 0 side 0 // wait for rising edge, clear clock_ok
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wait 0 pin 0 // wait for falling edge
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cycle: pull noblock // update x with new period if supplied
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mov x, osr // set new x if any
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mov y, x
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waitl: jmp y--, wl2 // count a tick
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jmp top // hit the limit, clear ok, start over
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wl2: jmp pin, waitl // loop if not low yet
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waith: jmp pin, cycle side 1 // repeat if high, set clock_ok
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jmp y--, waith // count a tick
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.wrap
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