mirror of
https://github.com/prirun/p50em.git
synced 2026-01-20 01:25:11 +00:00
distinguish live register access in SR modes vs VI modes
Primos load map handling to enhance traces more PX/interrupt work device initialization feature standard/vectored interrupt handling device polling more C/L bit changes work on BMxx instructions lots of stupid work on JMP/JST - older DIAG routines are broken
This commit is contained in:
Jim
parent
bdae5dede9
commit
7e68427b90
556
emdev.h
556
emdev.h
@ -179,15 +179,19 @@ void devnull (short class, short func, short device) {
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void devasr (short class, short func, short device) {
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static int ttydev=-1;
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static int ttydev;
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static int ttyflags;
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static int needflush; /* true if data has been written but not flushed */
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fd_set readfds;
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struct timeval timeout;
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unsigned char ch;
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int newflags;
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int n;
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if (ttydev < 0) {
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switch (class) {
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case -1:
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ttydev = open("/dev/tty", O_RDWR, 0);
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if (ttydev < 0) {
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perror(" error opening /dev/tty");
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@ -199,9 +203,7 @@ void devasr (short class, short func, short device) {
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}
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FD_ZERO(&readfds);
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FD_SET(ttydev, &readfds);
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}
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switch (class) {
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break;
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case 0:
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if (T_INST) fprintf(stderr," OCP '%02o%02o\n", func, device);
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@ -209,6 +211,11 @@ void devasr (short class, short func, short device) {
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case 1:
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if (T_INST) fprintf(stderr," SKS '%02o%02o\n", func, device);
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if (needflush) {
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fflush(stdout);
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needflush = 0;
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devpoll[device] = 0;
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}
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if (func == 7) { /* skip if received a char */
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timeout.tv_sec = 0;
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timeout.tv_usec = 100000;
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@ -220,6 +227,11 @@ void devasr (short class, short func, short device) {
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case 2:
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if (T_INST) fprintf(stderr," INA '%02o%02o\n", func, device);
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if (needflush) {
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fflush(stdout);
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needflush = 0;
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devpoll[device] = 0;
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}
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if (func == 0 || func == 010) {
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if (BLOCKIO)
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newflags = ttyflags & ~O_NONBLOCK;
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@ -239,12 +251,15 @@ readasr:
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}
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} else if (n == 1) {
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if (ch == '') {
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traceflags = ~TB_MAP;
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traceflags = -1;
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traceflags = ~TB_MAP;
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fprintf(stderr,"\nTRACE ENABLED:\n\n");
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memdump(0, 0xFFFF);
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goto readasr;
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}
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if (func >= 010)
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crs[A] = 0;
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/* NOTE: probably don't need 0x80 here... */
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crs[A] = crs[A] | ch | 0x80;
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if (T_INST) fprintf(stderr," character read=%o: %c\n", crs[A], crs[A]);
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IOSKIP;
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@ -261,6 +276,9 @@ readasr:
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} else if (func == 012) { /* read control word */
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crs[A] = 04110;
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IOSKIP;
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} else if (func == 017) { /* read xmit interrupt vector */
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crs[A] = 0;
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IOSKIP;
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} else {
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printf("Unimplemented INA '04 function '%02o\n", func);
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fatal(NULL);
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@ -274,16 +292,26 @@ readasr:
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if (T_INST) fprintf(stderr," char to write=%o: %c\n", crs[A], ch);
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if (ch > 0) {
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putchar(crs[A] & 0x7f);
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fflush(stdout);
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needflush = 1;
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devpoll[device] = instpermsec*100;
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}
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IOSKIP; /* OTA '0004 always works on Unix */
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} else if (func == 1) { /* write control word */
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IOSKIP;
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} else if (04 <= func && func <= 07) { /* write control register 1/2 */
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IOSKIP;
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} else {
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printf("Unimplemented OTA '04 function '%02o\n", func);
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fatal(NULL);
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}
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break;
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case 4:
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if (needflush) {
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fflush(stdout);
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needflush = 0;
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devpoll[device] = 0;
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}
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}
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}
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@ -358,14 +386,45 @@ void devmt (short class, short func, short device) {
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*/
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void devcp (short class, short func, short device) {
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static short enabled = 0;
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static unsigned short clkvec;
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static short clkpic;
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#if 1
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/* NOTE: setting this to 64,000 causes pointer faults when doing console
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I/O during coldstart:
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OCP '1520
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C Pointer fault, ea_s=6, ea_w=42266, [ea]=100015
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Pointer fault, ea_s=6, ea_w=42266, [ea]=100015
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Setting it to 300,000 causes:
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CUnimplemented INA device '26 function '06
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Fatal error: instruction #75661720 at 6/54305: 71404 101100
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keys = 14000, modals=137
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Setting it to 600,000 works, but console output is very slow
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*/
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#define SETCLKPOLL devpoll[device] = 600000;
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#else
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#define SETCLKPOLL devpoll[device] = instpermsec*3.3*-clkpic;
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#endif
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switch (class) {
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case 0:
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if (T_INST) fprintf(stderr," OCP '%02o%02o\n", func, device);
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printf("OCP '%02o%02o\n", func, device);
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//printf("Unimplemented OCP device '%02o function '%02o\n", device, func);
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//fatal(NULL);
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if (func == 015) {
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enabled = 1;
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SETCLKPOLL;
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} else if (func == 016) {
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enabled = 0;
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devpoll[device] = 0;
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} else {
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printf("Unimplemented OCP device '%02o function '%02o\n", device, func);
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fatal(NULL);
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}
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break;
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case 1:
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@ -391,18 +450,31 @@ void devcp (short class, short func, short device) {
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case 3:
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if (T_INST) fprintf(stderr," OTA '%02o%02o\n", func, device);
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if (func == 02) { /* set PIC interval */
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printf("Clock PIC interval set to %d\n", *(short *)(crs+A));
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clkpic = *(short *)(crs+A);
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SETCLKPOLL;
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printf("Clock PIC interval set to %d\n", clkpic);
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} else if (func == 07) {
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printf("Clock control register set to '%o\n", crs[A]);
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} else if (func == 013) {
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printf("Clock interrupt vector address = '%o\n", crs[A]);
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clkvec = crs[A];
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printf("Clock interrupt vector address = '%o\n", clkvec);
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} else if (func == 017) { /* write lights */
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IOSKIP;
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//IOSKIP;
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} else {
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printf("Unimplemented OTA device '%02o function '%02o\n", device, func);
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fatal(NULL);
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}
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break;
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case 4:
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#if 1
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if (enabled) {
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if (intvec == -1)
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intvec = clkvec;
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SETCLKPOLL;
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}
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#endif
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break;
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}
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}
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@ -421,15 +493,15 @@ void devcp (short class, short func, short device) {
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OCP '1726 = reset controller
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INA '1126 = input ID, don't clear A first, fails if no controller
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- bits 1,2,9-16 are significant
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- 4004 controller responds '26
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- 4005 controller responds '126
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- 2382 controller responds '040100
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- LCDTC controller responds '226
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- 10019 controller responds '040100
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- 6590 controller responds '040100
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- bits 1,2,8-16 are significant, bits 8-9 are type, 10-16 are ID
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- 4004 controller responds '26 (type=0)
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- 4005 controller responds '126 (type=1)
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- 2382 controller responds '040100 (type=1)
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- LCDTC controller responds '226 (type=2)
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- 10019 controller responds '040100 (type=1)
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- 6590 controller responds '040100 (type=1)
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INA '1726 = read status (or something), fails if controller busy
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INA '1726 = read oar, fails if controller is not halted
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OTA '1726 = load OAR (Order Address Register), ie, run channel
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program, address is in A
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@ -437,28 +509,61 @@ void devcp (short class, short func, short device) {
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*/
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void devdisk (short class, short func, short device) {
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unsigned short oar;
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unsigned short status; /* actual status */
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unsigned short teststatus; /* status for order testing */
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#define S_HALT 0
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#define S_RUN 1
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#define S_STALL 2
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static struct {
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unsigned short oar;
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unsigned short state; /* channel program state: S_XXXX */
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unsigned short status; /* controller status */
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short unit; /* unit selected */
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short dmachan; /* dma channel selected */
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short dmanch; /* number of dma channels-1 */
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/* these should be per-unit! */
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char devopened[8]; /* device file that is open on devfd */
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int rtfd; /* read trace file descriptor */
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unsigned short theads; /* total heads (cfg file) */
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unsigned short spt; /* sectors per track */
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int devfd; /* Unix device file descriptor */
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int readnum; /* increments on each read */
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} dc[64];
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short i;
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/* temps for running channel programs */
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unsigned short order;
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unsigned short m,m1,m2;
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short halt;
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short unit;
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short head, track, rec, recsize, nwords;
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unsigned short dmachan, dmaaddr, dmareg;
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short dmanw, dmanch;
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unsigned short dmareg, dmaaddr;
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short iobuf[4096]; /* local I/O buf, before mapped I/O */
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short *iobufp;
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short dmanw, dmanw1, dmanw2;
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unsigned int utempl;
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char ordertext[8];
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char devfile[8];
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char devopened[8]; /* device file that is open on devfd */
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static int devfd=-1; /* device file descriptor */
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int theads, spt, phyra;
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static int readnum=0; /* increments on each read */
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int rtfd; /* read trace file descriptor */
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char devfile[8];
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char rtfile[16]; /* read trace file name */
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int rtnw; /* total number of words read (all channels) */
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switch (class) {
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case -1:
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for (i=0; i<64; i++) {
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dc[i].oar = 0;
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dc[i].state = S_HALT;
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dc[i].status = 0100000;
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dc[i].unit = -1;
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strcpy(dc[i].devopened," ");
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dc[i].rtfd = -1;
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dc[i].theads = 40;
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dc[i].spt = 9;
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dc[i].devfd = -1;
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}
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break;
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case 0:
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if (T_INST || T_DIO) fprintf(stderr," OCP '%2o%2o\n", func, device);
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break;
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@ -467,15 +572,22 @@ void devdisk (short class, short func, short device) {
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if (T_INST || T_DIO) fprintf(stderr," SKS '%2o%2o\n", func, device);
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break;
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#define CID4005 0100
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case 2:
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/* this turns tracing on when the Primos disk processes initialize */
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//traceflags = ~TB_MAP;
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if (T_INST || T_DIO) fprintf(stderr," INA '%2o%2o\n", func, device);
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if (func == 01) /* read device id, clear A first */
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crs[A] = 0100 + device;
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crs[A] = CID4005 + device;
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else if (func == 011) /* read device id, don't clear A */
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crs[A] |= (0100 + device);
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else if (func == 017) /* read status */
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crs[A] = 0100000;
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else {
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crs[A] |= (CID4005 + device);
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else if (func == 017) { /* read OAR */
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if (dc[device].state != S_HALT)
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return;
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crs[A] = dc[device].oar;
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} else {
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printf("Unimplemented INA device '%02o function '%02o\n", device, func);
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fatal(NULL);
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}
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@ -485,183 +597,207 @@ void devdisk (short class, short func, short device) {
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case 3:
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if (T_INST || T_DIO) fprintf(stderr," OTA '%02o%02o\n", func, device);
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if (func == 017) { /* set OAR (order address register) */
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oar = crs[A];
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halt = 0;
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status = 0100000;
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unit = -1;
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while (!halt) {
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m = get16(oar);
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order = m>>12;
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if (T_INST || T_DIO) fprintf(stderr,"\n %o: %o %o %o\n", oar, m, get16(oar+1), get16(oar+2));
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if (m & 04000) { /* "execute if ..." */
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if (order == 2 || order == 5 || order == 6)
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oar += 3;
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else
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oar += 2;
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continue;
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}
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switch (order) {
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case 0: /* DHLT = Halt */
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halt = 1;
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if (T_INST || T_DIO) fprintf(stderr," channel program halt at '%o\n", oar);
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break;
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case 2: /* SFORM = Format */
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case 5: /* SREAD = Read */
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case 6: /* SWRITE = Write */
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m1 = get16(oar+1);
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m2 = get16(oar+2);
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recsize = m & 017;
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track = m1 & 01777;
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rec = m2 >> 8; /* # records for format, rec # for R/W */
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head = m2 & 077;
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if (order == 2)
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strcpy(ordertext,"Format");
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else if (order == 5)
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strcpy(ordertext,"Read");
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else if (order == 6)
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strcpy(ordertext,"Write");
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if (T_INST || T_DIO) fprintf(stderr," %s, head=%d, track=%d, rec=%d, recsize=%d\n", ordertext, head, track, rec, recsize);
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if (devfd == -1) {
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if (T_INST || T_DIO) fprintf(stderr," Unit not selected or not ready\n");
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status = 0100001;
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} else if (order == 2) {
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if (T_INST || T_DIO) fprintf(stderr," Format order\n");
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fatal("DFORMAT channel order not implemented");
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} else if (order == 5) {
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/* translate head/track/sector to drive record address */
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theads = 40; /* should get total heads from a config file */
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spt = 9; /* and sectors per track too */
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phyra = (track*theads*spt) + head*9 + rec;
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#if 0
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if (phyra == 106987) traceflags = -1;
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#endif
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if (T_INST || T_DIO) fprintf(stderr, " phyra=%d, byte offset=%d\n", phyra, phyra*2080);
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if (lseek(devfd, phyra*2080, SEEK_SET) == -1) {
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perror("Unable to seek drive file");
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fatal(NULL);
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}
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readnum++;
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rtnw = 0;
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while (dmanch >= 0) {
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dmareg = ((dmachan & 036) << 1) | (dmachan & 1);
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dmanw = regs.sym.regdmx[dmareg];
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dmanw = -(dmanw>>4);
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dmaaddr = regs.sym.regdmx[dmareg+1];
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if (T_INST || T_DIO) fprintf(stderr, " DMA channels: nch-1=%d, ['%o]='%o, ['%o]='%o, nwords=%d\n", dmanch, dmachan, regs.sym.regdmx[dmareg], dmachan+1, dmaaddr, dmanw);
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/* ACK!! Need to use put16 to store the data! */
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if (crs[MODALS] & 020)
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fatal("emdev: I/O must be mapped!");
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if (read(devfd, mem+dmaaddr, dmanw*2) != dmanw*2) {
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perror("Unable to read drive file");
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fatal(NULL);
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}
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if (T_DIO) {
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fprintf(stderr, "\nRT: Read #%d.%d, RA=%d, numwords=%d, memaddr=%o, Unix pos=%d\n", readnum, dmanch, phyra, dmanw, dmaaddr, phyra*2080+rtnw*2);
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snprintf(rtfile,sizeof(rtfile),"rt/rt%d.%d", readnum, dmanch);
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if ((rtfd = open(rtfile, O_WRONLY+O_CREAT, 0777)) == -1) {
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printf("Read trace filename: %s\n", rtfile);
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perror("Read trace file open");
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fatal(NULL);
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}
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/* NEEDS HELP! */
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if (write(rtfd, mem+dmaaddr, dmanw*2) != dmanw*2) {
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perror("Unable to write read trace file");
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fatal(NULL);
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}
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close(rtfd);
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rtnw += dmanw;
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if (dmanw == 16)
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fprintf(stderr, "RT: cra=%d, bra=%d, cnt=%d, type=%d, next=%d, prev=%d\n", *(int *)(mem+dmaaddr), *(int *)(mem+dmaaddr+2), mem[dmaaddr+4], mem[dmaaddr+5], *(int *)(mem+dmaaddr+6), *(int *)(mem+dmaaddr+8));
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}
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regs.sym.regdmx[dmareg] = 0;
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regs.sym.regdmx[dmareg+1] += dmanw;
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dmachan += 2;
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dmanch--;
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}
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} else if (order == 6) {
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fatal("DWRITE channel order not implemented");
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}
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oar += 3;
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break;
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case 3: /* SSEEK = Seek */
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m1 = get16(oar+1);
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track = m1 & 01777;
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if (T_INST || T_DIO) fprintf(stderr," seek track %d, restore=%d, clear=%d\n", track, (m1 & 0100000) != 0, (m1 & 040000) != 0);
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oar += 2;
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break;
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case 4: /* DSEL = Select unit */
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m1 = get16(oar+1);
|
||||
unit = (m1 & 017) >> 1; /* unit = 0/1/2/4 */
|
||||
if (unit == 4) unit = 3; /* unit = 0/1/2/3 */
|
||||
snprintf(devfile,sizeof(devfile),"dev%ou%d", device, unit);
|
||||
if (T_INST || T_DIO) fprintf(stderr," select unit %d, filename %s\n", unit, devfile);
|
||||
if (strcmp(devfile,devopened) != 0 || devfd == -1) {
|
||||
if (devfd != -1) {
|
||||
close(devfd);
|
||||
devfd = -1;
|
||||
}
|
||||
if ((devfd = open(devfile, O_RDONLY, 0)) == -1)
|
||||
status = 0100001; /* not ready */
|
||||
else
|
||||
strcpy(devopened, devfile);
|
||||
}
|
||||
oar += 2;
|
||||
break;
|
||||
case 7: /* DSTALL = Stall */
|
||||
if (T_INST || T_DIO) fprintf(stderr," stall\n");
|
||||
oar += 2;
|
||||
break;
|
||||
case 9: /* DSTAT = Store status to memory */
|
||||
m1 = get16(oar+1);
|
||||
if (T_INST || T_DIO) fprintf(stderr, " store status='%o to '%o\n", status, m1);
|
||||
put16(status,m1);
|
||||
oar += 2;
|
||||
break;
|
||||
case 11: /* DOAR = Store OAR to memory (2 words) */
|
||||
m1 = get16(oar+1);
|
||||
if (T_INST || T_DIO) fprintf(stderr, " store OAR='%o to '%o\n", oar, m1);
|
||||
put16(oar,m1);
|
||||
oar += 2;
|
||||
break;
|
||||
case 13: /* SDMA = select DMA channel(s) to use */
|
||||
m1 = get16(oar+1);
|
||||
dmanch = m & 017;
|
||||
dmachan = m1;
|
||||
if (T_INST || T_DIO) fprintf(stderr, " set DMA channels, nch-1=%d, channel='%o\n", dmanch, dmachan);
|
||||
oar += 2;
|
||||
break;
|
||||
case 14: /* DINT = generate interrupt through vector address */
|
||||
m1 = get16(oar+1);
|
||||
m2 = get16(oar+2);
|
||||
if ((m2 >> 12) != 0)
|
||||
fatal("DINT not followed by DHALT");
|
||||
if (T_INST || T_DIO) fprintf(stderr, " interrupt through '%o\n", m1);
|
||||
if (intvec != 0)
|
||||
fatal("DINT while intvec non-zero");
|
||||
intvec = m1;
|
||||
oar += 2;
|
||||
traceflags = ~TB_MAP;
|
||||
break;
|
||||
case 15: /* DTRAN = channel program jump */
|
||||
m1 = get16(oar+1);
|
||||
oar = m1;
|
||||
if (T_INST || T_DIO) fprintf(stderr, " jump to '%o\n", oar);
|
||||
break;
|
||||
default:
|
||||
printf("Unrecognized channel order = %d\n", order);
|
||||
fatal(NULL);
|
||||
}
|
||||
}
|
||||
IOSKIP;
|
||||
dc[device].state = S_RUN;
|
||||
dc[device].oar = crs[A];
|
||||
devpoll[device] = 1;
|
||||
} else {
|
||||
printf("Unimplemented OTA device '%02o function '%02o\n", device, func);
|
||||
fatal(NULL);
|
||||
}
|
||||
IOSKIP;
|
||||
break;
|
||||
|
||||
case 4: /* poll (run channel program) */
|
||||
|
||||
while (dc[device].state != S_HALT) {
|
||||
m = get16(dc[device].oar);
|
||||
m1 = get16(dc[device].oar+1);
|
||||
order = m>>12;
|
||||
if (T_INST || T_DIO) fprintf(stderr,"\nDIOC %o: %o %o %o\n", dc[device].oar, m, m1, get16(dc[device].oar+2));
|
||||
dc[device].oar += 2;
|
||||
if (m & 04000) { /* "execute if ..." */
|
||||
if (order == 2 || order == 5 || order == 6)
|
||||
dc[device].oar++;
|
||||
continue;
|
||||
}
|
||||
|
||||
switch (order) {
|
||||
|
||||
case 0: /* DHLT = Halt */
|
||||
dc[device].state = S_HALT;
|
||||
devpoll[device] = 0;
|
||||
if (T_INST || T_DIO) fprintf(stderr," channel halted at '%o\n", dc[device].oar);
|
||||
break;
|
||||
|
||||
case 2: /* SFORM = Format */
|
||||
case 5: /* SREAD = Read */
|
||||
case 6: /* SWRITE = Write */
|
||||
m2 = get16(dc[device].oar++);
|
||||
recsize = m & 017;
|
||||
track = m1 & 01777;
|
||||
rec = m2 >> 8; /* # records for format, rec # for R/W */
|
||||
head = m2 & 077;
|
||||
if (order == 2)
|
||||
strcpy(ordertext,"Format");
|
||||
else if (order == 5)
|
||||
strcpy(ordertext,"Read");
|
||||
else if (order == 6)
|
||||
strcpy(ordertext,"Write");
|
||||
if (T_INST || T_DIO) fprintf(stderr," %s, head=%d, track=%d, rec=%d, recsize=%d\n", ordertext, head, track, rec, recsize);
|
||||
if (dc[device].devfd == -1) {
|
||||
if (T_INST || T_DIO) fprintf(stderr," Unit not selected or not ready\n");
|
||||
dc[device].status = 0100001;
|
||||
} else if (order == 2) {
|
||||
if (T_INST || T_DIO) fprintf(stderr," Format order\n");
|
||||
fatal("DFORMAT channel order not implemented");
|
||||
} else if (order == 5) {
|
||||
|
||||
/* translate head/track/sector to drive record address */
|
||||
|
||||
phyra = (track*dc[device].theads*dc[device].spt) + head*9 + rec;
|
||||
if (T_INST || T_DIO) fprintf(stderr, " Unix ra=%d, byte offset=%d\n", phyra, phyra*2080);
|
||||
if (lseek(dc[device].devfd, phyra*2080, SEEK_SET) == -1) {
|
||||
perror("Unable to seek drive file");
|
||||
fatal(NULL);
|
||||
}
|
||||
dc[device].readnum++;
|
||||
rtnw = 0;
|
||||
while (dc[device].dmanch >= 0) {
|
||||
dmareg = ((dc[device].dmachan & 036) << 1) | (dc[device].dmachan & 1);
|
||||
dmanw = regs.sym.regdmx[dmareg];
|
||||
dmanw = -(dmanw>>4);
|
||||
dmaaddr = regs.sym.regdmx[dmareg+1];
|
||||
if (T_INST || T_DIO) fprintf(stderr, " DMA channels: nch-1=%d, ['%o]='%o, ['%o]='%o, nwords=%d\n", dc[device].dmanch, dc[device].dmachan, regs.sym.regdmx[dmareg], dc[device].dmachan+1, dmaaddr, dmanw);
|
||||
|
||||
/* later, use mapva to do page-based mapped I/O in pieces */
|
||||
|
||||
if (crs[MODALS] & 020)
|
||||
iobufp = iobuf;
|
||||
else
|
||||
iobufp = mem+dmaaddr;
|
||||
if (read(dc[device].devfd, (char *)iobufp, dmanw*2) != dmanw*2) {
|
||||
perror("Unable to read drive file");
|
||||
fatal(NULL);
|
||||
}
|
||||
if (crs[MODALS] & 020)
|
||||
for (i=0; i<dmanw; i++)
|
||||
put16(iobuf[i], dmaaddr+i);
|
||||
|
||||
#if 0
|
||||
if (T_DIO) {
|
||||
fprintf(stderr, "\nRT: Read #%d.%d, RA=%d, numwords=%d, memaddr=%o, Unix pos=%d\n", readnum, dmanch, phyra, dmanw, dmaaddr, phyra*2080+rtnw*2);
|
||||
snprintf(rtfile,sizeof(rtfile),"rt/rt%d.%d", readnum, dmanch);
|
||||
if ((rtfd = open(rtfile, O_WRONLY+O_CREAT, 0777)) == -1) {
|
||||
printf("Read trace filename: %s\n", rtfile);
|
||||
perror("Read trace file open");
|
||||
fatal(NULL);
|
||||
}
|
||||
/* NEEDS HELP! */
|
||||
if (write(rtfd, mem+dmaaddr, dmanw*2) != dmanw*2) {
|
||||
perror("Unable to write read trace file");
|
||||
fatal(NULL);
|
||||
}
|
||||
close(rtfd);
|
||||
rtnw += dmanw;
|
||||
if (dmanw == 16)
|
||||
fprintf(stderr, "RT: cra=%d, bra=%d, cnt=%d, type=%d, next=%d, prev=%d\n", *(int *)(mem+dmaaddr), *(int *)(mem+dmaaddr+2), mem[dmaaddr+4], mem[dmaaddr+5], *(int *)(mem+dmaaddr+6), *(int *)(mem+dmaaddr+8));
|
||||
}
|
||||
#endif
|
||||
regs.sym.regdmx[dmareg] = 0;
|
||||
regs.sym.regdmx[dmareg+1] += dmanw;
|
||||
dc[device].dmachan += 2;
|
||||
dc[device].dmanch--;
|
||||
}
|
||||
|
||||
} else if (order == 6) {
|
||||
fatal("DWRITE channel order not implemented");
|
||||
}
|
||||
break;
|
||||
|
||||
case 3: /* SSEEK = Seek */
|
||||
track = m1 & 01777;
|
||||
if (T_INST || T_DIO) fprintf(stderr," seek track %d, restore=%d, clear=%d\n", track, (m1 & 0100000) != 0, (m1 & 040000) != 0);
|
||||
break;
|
||||
|
||||
case 4: /* DSEL = Select unit */
|
||||
dc[device].unit = (m1 & 017) >> 1; /* unit = 0/1/2/4 */
|
||||
if (dc[device].unit == 4) dc[device].unit = 3; /* unit = 0/1/2/3 */
|
||||
snprintf(devfile,sizeof(devfile),"dev%ou%d", device, dc[device].unit);
|
||||
if (T_INST || T_DIO) fprintf(stderr," select unit %d, filename %s\n", dc[device].unit, devfile);
|
||||
if (strcmp(devfile,dc[device].devopened) != 0 || dc[device].devfd == -1) {
|
||||
if (dc[device].devfd != -1) {
|
||||
close(dc[device].devfd);
|
||||
dc[device].devfd = -1;
|
||||
}
|
||||
if ((dc[device].devfd = open(devfile, O_RDONLY, 0)) == -1)
|
||||
dc[device].status = 0100001; /* not ready */
|
||||
else
|
||||
strcpy(dc[device].devopened, devfile);
|
||||
}
|
||||
break;
|
||||
|
||||
case 7: /* DSTALL = Stall */
|
||||
if (T_INST || T_DIO) fprintf(stderr," stall\n");
|
||||
#if 0
|
||||
devpoll[device] = instpermsec*10;
|
||||
#else
|
||||
devpoll[device] = 100;
|
||||
#endif
|
||||
dc[device].state = S_STALL;
|
||||
return;
|
||||
|
||||
case 9: /* DSTAT = Store status to memory */
|
||||
if (T_INST || T_DIO) fprintf(stderr, " store status='%o to '%o\n", dc[device].status, m1);
|
||||
put16(dc[device].status,m1);
|
||||
break;
|
||||
|
||||
case 11: /* DOAR = Store OAR to memory (2 words) */
|
||||
if (T_INST || T_DIO) fprintf(stderr, " store OAR='%o to '%o\n", dc[device].oar, m1);
|
||||
put16(dc[device].oar,m1);
|
||||
break;
|
||||
|
||||
case 13: /* SDMA = select DMA channel(s) to use */
|
||||
dc[device].dmanch = m & 017;
|
||||
dc[device].dmachan = m1;
|
||||
if (T_INST || T_DIO) fprintf(stderr, " set DMA channels, nch-1=%d, channel='%o\n", dc[device].dmanch, dc[device].dmachan);
|
||||
#if 0
|
||||
dmareg = ((m1 & 036) << 1) | (m1 & 1);
|
||||
//for (i=0; i<4; i++)
|
||||
//fprintf(stderr, " dmareg+%d = %o ", i, regs.sym.regdmx[dmareg+i]);
|
||||
//fprintf(stderr, "\n");
|
||||
|
||||
dmanw1 = regs.sym.regdmx[dmareg];
|
||||
dmanw1 = -(dmanw1>>4);
|
||||
dmanw2 = regs.sym.regdmx[dmareg+4];
|
||||
dmanw2 = -(dmanw2>>4);
|
||||
if (T_INST || T_DIO) fprintf(stderr, " dmareg=%d, nch=%d, dmanw1=%d, dmanw2=%d\n", dmareg, dc[device].dmanch, dmanw1, dmanw2);
|
||||
if (dc[device].dmanch == 1 && dmanw1 == 1024 && dmanw2 == 16) {
|
||||
if (T_INST || T_DIO) fprintf(stderr, " swapped DMA channels!\n");
|
||||
utempl = *(int *)(regs.sym.regdmx+dmareg);
|
||||
*(int *)(regs.sym.regdmx+dmareg) = *(int *)(regs.sym.regdmx+dmareg+4);
|
||||
*(int *)(regs.sym.regdmx+dmareg+4) = utempl;
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
|
||||
case 14: /* DINT = generate interrupt through vector address */
|
||||
if (T_INST || T_DIO) fprintf(stderr, " interrupt through '%o\n", m1);
|
||||
if (intvec >= 0)
|
||||
fatal("DINT while intvec active");
|
||||
intvec = m1;
|
||||
//traceflags = ~TB_MAP;
|
||||
devpoll[device] = 100;
|
||||
return;
|
||||
|
||||
case 15: /* DTRAN = channel program jump */
|
||||
dc[device].oar = m1;
|
||||
if (T_INST || T_DIO) fprintf(stderr, " jump to '%o\n", m1);
|
||||
break;
|
||||
|
||||
default:
|
||||
printf("Unrecognized channel order = %d\n", order);
|
||||
fatal(NULL);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user