Previously iget16 was used for all instruction fetches, with the
assumption that any could trap. But actually, only the first word of
the instruction stream can trap in V mode, which is why these
instructions must be short. Both words of a long R-mode instruction
can trap.
Tested change by booting R19 with and without -DFAST, all other revs
with -DFAST, and basic with trace on in R19 (this executes code from
the DFAC)
In slow mode (compiled without -DFAST), Rev. 19 would crash during
boot. On investigation, the code was branching to '4 after setting
up an instruction there. However, instruction fetch found a '0
instead of the expected instruction.
Instructions might be fetched from registers via trap. Fast iget16()
checks for fault. Slow iget16() does not, and just calls get16() which
does not check.
The initial estimate for instructions per millisec (instpermses) was
much too low for modern CPUs, and was also only updated every 5
seconds. Combined, these were causing the clock to be erratic during
the first 5-15 seconds of system boot.
This was easily noticed by running the MIPS benchmark program right
after a system boot, where instead of delaying 5 seconds, it might
only delay 2 seconds, and then would report a bogus MIPS rating.
Waiting a minute and running it again would give an accurate rating.
Adjusting the instpermsec initial value from 2000 to 40000 and
IPMSTIME time from 5000 ms to 1000 ms (every second vs 5 seconds)
fixes the problem.
The emulator reads SEG load maps for Primos and displays symbolic
names and offsets during tracing. But when running in S/R modes
during initial startup, there is no point in doing a load map lookup
and it's somewhat confusing to see segment 0 symbol names printed for
all effective addresses. A blank name was already printed for
user-mode S/R traces because the segment number is > 01777, usually
04000.
Removed comment about memory needing to be a power of 2. Testing
-mem 9 worked fine with rev 20:
OK, stat sys
System is currently running PRIMOS rev. 20.2.8
Copyright (c) Prime Computer, Inc. 1985
9216K bytes memory in use
It was confusing that MAXMB is the default memory size, so renamed it
to DEFMB. MEMSIZE was not necessary (half of MAXMB) and MEMMASK was
used only in mapva to limit physcal addresses when segmentation was
not enabled. However, this appears to be a bug, because it would
cause memory addresses larger than physical memory to wrap and succeed
rather than generate a missing memory check.
History: when the emulator was first developed on OSX 10.4 (PowerPC),
the inline keyword was added by profiling with Apple's pretty
fantastic Shark profiler. Apple's version of gcc had an -fobey-inline
switch that the makefile used to force gcc to obey the inline keyword.
This macro does the same thing
37.5 Prime MIPS on Linode VM to 42.5 MIPS. gvp-> was faster on the
PowerPC architecture when gvp was kept in a dedicated register, but
that does not apply to Intel.
Old:
Timing CPU, 20.0 ticks per second...
35.3 Prime MIPS for 16-bit ADD loop
40.0 Prime MIPS for 16-bit MPY loop
42.1 Prime MIPS for 16-bit DIV loop
21.4 Prime MIPS for 32-bit ADD loop
30.8 Prime MIPS for 32-bit MPY loop
28.6 Prime MIPS for 32-bit DIV loop
57.1 Prime MIPS for 16-bit X=0 loop
44.4 Prime MIPS for 32-bit X=0 loop
37.5 average Prime MIPS
New:
Timing CPU, 20.0 ticks per second...
42.9 Prime MIPS for 16-bit ADD loop
53.3 Prime MIPS for 16-bit MPY loop
47.1 Prime MIPS for 16-bit DIV loop
24.0 Prime MIPS for 32-bit ADD loop
38.1 Prime MIPS for 32-bit MPY loop
32.0 Prime MIPS for 32-bit DIV loop
57.1 Prime MIPS for 16-bit X=0 loop
44.4 Prime MIPS for 32-bit X=0 loop
42.4 average Prime MIPS
- Remove long integers so x86_64, where long is 8 bytes, is like i686
compile, where long is 4 bytes.
- Dont' handle xon/xoff on sys console in full duplex
- Add geom hash for DEMO emulator
- Add -mmacosx-version-min=10.4 option for DEMO emulator
- Add 1-line AMLC and 2-node PNC to DEMO emulator
