mirror of
https://github.com/rcornwell/sims.git
synced 2026-01-13 07:19:26 +00:00
KA10: Fix second interrupt instruction on KA10.
This commit is contained in:
parent
68defe86c8
commit
047beb0e3e
@ -843,10 +843,10 @@ void set_interrupt(int dev, int lvl) {
|
||||
if (lvl) {
|
||||
dev_irq[dev>>2] = 0200 >> lvl;
|
||||
pi_pending = 1;
|
||||
//#if DEBUG
|
||||
#if DEBUG
|
||||
sim_debug(DEBUG_IRQ, &cpu_dev, "set irq %o %o %03o %03o %03o\n",
|
||||
dev & 0774, lvl, PIE, PIR, PIH);
|
||||
//#endif
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
@ -871,10 +871,10 @@ void set_interrupt_mpx(int dev, int lvl, int mpx) {
|
||||
*/
|
||||
void clr_interrupt(int dev) {
|
||||
dev_irq[dev>>2] = 0;
|
||||
//#if DEBUG
|
||||
#if DEBUG
|
||||
if (dev > 4)
|
||||
sim_debug(DEBUG_IRQ, &cpu_dev, "clear irq %o\n", dev & 0774);
|
||||
//#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
@ -955,9 +955,9 @@ void restore_pi_hold() {
|
||||
for(lvl = 0100; lvl != 0; lvl >>= 1) {
|
||||
if (lvl & PIH) {
|
||||
PIR &= ~lvl;
|
||||
//#if DEBUG
|
||||
#if DEBUG
|
||||
sim_debug(DEBUG_IRQ, &cpu_dev, "restore irq %o %03o\n", lvl, PIH);
|
||||
//#endif
|
||||
#endif
|
||||
PIH &= ~lvl;
|
||||
#if KS_ITS
|
||||
pi_act &= ~lvl;
|
||||
@ -4646,10 +4646,10 @@ in_loop:
|
||||
#if KA | PDP6
|
||||
st_pi:
|
||||
#endif
|
||||
//#if DEBUG
|
||||
#if DEBUG
|
||||
sim_debug(DEBUG_IRQ, &cpu_dev, "trap irq %o %03o %03o \n",
|
||||
pi_enc, PIR, PIH);
|
||||
//#endif
|
||||
#endif
|
||||
pi_cycle = 1;
|
||||
pi_rq = 0;
|
||||
pi_hold = 0;
|
||||
@ -4704,6 +4704,7 @@ st_pi:
|
||||
Mem_read_nopage();
|
||||
goto no_fetch;
|
||||
#elif PDP6 | KA
|
||||
pi_vect = AB;
|
||||
goto fetch;
|
||||
#endif
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user