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I7000: Fixed channel issues to allow I7090 to run Stress.
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127e6157e1
@ -376,11 +376,10 @@ chan_proc()
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if ((chan_flags[chan] & DEV_SEL) == 0
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&& (chan_flags[chan] & STA_TWAIT)) {
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if (chan_dev.dctrl & cmask)
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sim_debug(DEBUG_TRAP, &chan_dev, "chan %d Trap\n",
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chan);
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sim_debug(DEBUG_TRAP, &chan_dev, "chan %d Trap IC=%06o\n",
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chan, IC);
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iotraps |= 1 << chan;
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chan_flags[chan] &=
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~(STA_START | STA_ACTIVE | STA_WAIT | STA_TWAIT);
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chan_flags[chan] &= ~(STA_START | STA_ACTIVE | STA_WAIT | STA_TWAIT);
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chan_info[chan] = 0;
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continue;
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}
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@ -441,7 +440,7 @@ chan_proc()
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/* Device has given us a dataword */
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case DEV_FULL:
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/* If we are not waiting EOR save it in memory */
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if ((cmd[chan] & 1) == 0) {
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if (/*(chan_flags[chan] & CHS_ERR) == 0 &&*/ (cmd[chan] & 1) == 0) {
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if (chan_dev.dctrl & cmask)
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sim_debug(DEBUG_DATA, &chan_dev, "chan %d data < %012llo\n",
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chan, assembly[chan]);
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@ -1569,6 +1568,7 @@ chan_write_char(int chan, uint8 * data, int flags)
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} else {
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int cnt = --bcnt[chan];
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t_uint64 wd;
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if (CHAN_G_TYPE(chan_unit[chan].flags) == CHAN_PIO)
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wd = MQ;
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else
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@ -815,6 +815,8 @@ sim_instr(void)
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MA = 012;
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f = 0;
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sim_debug(DEBUG_TRAP, &cpu_dev,
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"Checking trap chan IC=%06o %06o\n", IC, iotraps);
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for (shiftcnt = 1; shiftcnt < NUM_CHAN; shiftcnt++) {
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/* CRC *//* Trap *//* EOF */
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/* Wait until channel stops to trigger interupts */
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@ -828,10 +830,12 @@ sim_instr(void)
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iotraps &= ~(1 << shiftcnt);
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}
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}
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if (mask & DMASK & ioflags && chan_stat(shiftcnt, CHS_ERR))
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if (mask & DMASK & ioflags && chan_stat(shiftcnt, CHS_ERR)) {
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f |= 2; /* We have device error */
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}
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/* check if we need to perform a trap */
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if (f) {
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// iotraps &= ~(1 << (shiftcnt + 18));
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/* HTR/HPR behave like wait if protected */
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if (hltinst)
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temp = (((t_uint64) bcore & 3) << 31) |
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@ -854,8 +858,8 @@ sim_instr(void)
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sim_interval = sim_interval - 1; /* count down */
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SR = ReadP(MA);
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sim_debug(DEBUG_TRAP, &cpu_dev,
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"Doing trap chan %c %o >%012llo loc %o %012llo IC=%06o\n",
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shiftcnt + 'A' - 1, f, temp, MA, SR, IC);
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"Doing trap chan %c %o >%012llo loc %o %012llo IC=%06o %06o\n",
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shiftcnt + 'A' - 1, f, temp, MA, SR, IC, iotraps);
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if (hst_lnt) { /* history enabled? */
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hst_p = (hst_p + 1); /* next entry */
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if (hst_p >= hst_lnt)
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@ -1329,10 +1333,12 @@ prottrap:
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if ((bcore & 4) || STM)
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goto seltrap;
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itrap = 1;
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// iotraps &= ~(AMASK & (ioflags << 1));
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if (CPU_MODEL == CPU_709)
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ihold = 1;
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else
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ihold = 2;
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sim_debug(DEBUG_TRAP, &cpu_dev, "rxt %06o\n", iotraps);
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}
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break;
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case OP_LMTM:
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@ -1481,7 +1487,7 @@ prottrap:
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hltinst = 1;
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ihold = 0; /* Kill any hold on traps now */
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if (opcode == OP_HTR) {
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fptemp = IC-1;
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fptemp = IC;
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IC = MA;
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} else
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fptemp = IC;
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@ -3339,14 +3345,16 @@ prottrap:
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itrap = 1;
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else
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itrap = 0;
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sim_debug(DEBUG_TRAP, &cpu_dev, "ENB %012llo\n", ioflags);
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ihold = 1;
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sim_debug(DEBUG_TRAP, &cpu_dev, "ENB %012llo %06o\n", ioflags, iotraps);
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/*
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* IBSYS can't have an trap right after ENB or it will hang
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* on a TTR * in IBNUC.
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*/
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if (CPU_MODEL >= CPU_7090)
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if (CPU_MODEL >= CPU_7090) {
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ihold = 1;
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break;
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}
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#if 0
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temp = 00000001000001LL;
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for (shiftcnt = 1; shiftcnt < NUM_CHAN; shiftcnt++) {
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@ -3360,6 +3368,7 @@ prottrap:
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ihold = 0;
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temp <<= 1;
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}
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#endif
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break;
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#endif
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@ -3393,15 +3402,19 @@ prottrap:
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switch (chan_cmd(MA, opcode)) {
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case SCPE_BUSY:
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iowait = 1; /* Channel is active, hold */
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ihold = 1; /* Hold interupts for one cycle */
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break;
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case SCPE_OK:
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if (((MA >> 9) & 017) == 0) {
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temp = (MA >> 9) & 017;
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if (temp == 0) {
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if (opcode==IO_RDS)
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MQ = 0;
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chan_clear(0, CHS_EOF|CHS_EOT|DEV_REOR);
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} else {
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iotraps &= ~(1 << temp);
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chan_clear(temp, CHS_EOF|CHS_EOT|DEV_REOR);
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}
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ihold = 1; /* Hold interupts for one cycle */
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iotraps &= ~(1 << ((MA >> 9) & 017));
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break;
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case SCPE_IOERR:
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iocheck = 1;
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@ -4183,7 +4196,7 @@ cpu_reset(DEVICE * dptr)
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interval_irq = dcheck = acoflag = mqoflag = iocheck = 0;
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sim_brk_types = sim_brk_dflt = SWMASK('E');
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limitaddr = 077777;
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memmask = MEMMASK;
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memmask = MEMSIZE-1;
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if (cpu_unit.flags & OPTION_TIMER) {
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sim_rtcn_init_unit (&cpu_unit, cpu_unit.wait, TMR_RTC);
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sim_activate(&cpu_unit, cpu_unit.wait);
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