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mirror of https://github.com/rcornwell/sims.git synced 2026-01-13 15:27:04 +00:00

SEL32: Correct interrupt processing during blocked mode.

SEL32: Coverity errors.
SEL32: Change UDP/DPII support.
This commit is contained in:
AZBevier 2020-03-09 19:47:47 -07:00
parent 632a6e8d4b
commit 18eb91cd6d
8 changed files with 437 additions and 320 deletions

View File

@ -391,7 +391,7 @@ int readbuff(CHANP *chp)
sim_debug(DEBUG_DETAIL, &cpu_dev,
"readbuff read memory chsa %04x into buffer %06x %06x %04x [",
chp->chan_dev, chp->ccw_addr & 0xFFFFFC, chp->chan_buf, chp->ccw_count);
for(k = 24; k >= 0; k -= 8) {
for (k = 24; k >= 0; k -= 8) {
char ch = (chp->chan_buf >> k) & 0xFF;
if (!isprint(ch))
ch = '.';
@ -424,7 +424,7 @@ int writebuff(CHANP *chp)
"writebuff WRITE addr %06x DATA %08x status %04x\n",
addr, chp->chan_buf, chp->chan_status);
#ifdef TEST
M[addr>>2] = chp->chan_buf;
M[addr>>2] = chp->chan_buf; /* write byte to memory */
#else
WMB(addr, chp->chan_buf); /* write byte to memory */
#endif
@ -610,6 +610,7 @@ loop:
/* see if command completed */
if (chp->chan_status & (STATUS_DEND|STATUS_CEND)) {
#ifdef NO_WORK
chp->chan_status |= STATUS_CEND; /* set channel end status */
chp->chan_byte = BUFF_NEWCMD; /* ready for new cmd */
chp->ccw_cmd = 0; /* stop IOCD processing */
@ -620,6 +621,13 @@ loop:
/* we want to terminate if command is complete */
/* go store status and return CC2 */
/*NEW*/ return 1; /* return cmd complete */
#else
uint16 chsa = GET_UADDR(uptr->u3); /* get channel & sub address */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* show I/O complete */
sim_debug(DEBUG_XIO, &cpu_dev,
"load_ccw cmd complete chan %04x status %04x count %04x\n",
chan, chp->chan_status, chp->ccw_count);
#endif
}
}
sim_debug(DEBUG_XIO, &cpu_dev,
@ -909,7 +917,8 @@ void chan_end(uint16 chsa, uint16 flags) {
sim_debug(DEBUG_XIO, &cpu_dev,
"chan_end IOCL done chsa %04x ccw_flags %04x status %04x\n",
chsa, chp->ccw_flags, chp->chan_status);
#ifndef NEW_METHOD
//#define NEW_METHOD
#ifdef NEW_METHOD
/* If channel end, check if we should continue */
if (chp->chan_status & STATUS_CEND) { /* do we have channel end */
sim_debug(DEBUG_XIO, &cpu_dev,
@ -925,15 +934,15 @@ void chan_end(uint16 chsa, uint16 flags) {
"chan_end dev end & CC chsa %04x status %04x\n",
chsa, chp->chan_status);
(void)load_ccw(chp, 1); /* go load the next IOCB */
} else
irq_pend = 1; /* still pending int */
}
/* just return */
} else {
/* we have channel end and no CC flag, end command */
chsa = chp->chan_dev; /* get the chan/sa */
sim_debug(DEBUG_XIO, &cpu_dev,
"chan_end chan end & no CC chsa %04x status %04x\n",
chsa, chp->chan_status);
dev_status[chsa] = 0; /* no device status anymore */
//?? dev_status[chsa] = 0; /* no device status anymore */
/* we have completed channel program */
/* handle case where we are loading the O/S on boot */
/* if loading, leave status to be discovered by scan_chan */
@ -956,7 +965,7 @@ void chan_end(uint16 chsa, uint16 flags) {
chsa, chp->ccw_flags, chp->chan_status);
#endif
}
//XXX irq_pend = 1; /* flag to test for int condition */
//XXX irq_pend = 1; /* flag to test for int condition */
}
/* store the device status into the status DW in memory */
@ -1179,14 +1188,18 @@ t_stat startxio(uint16 lchsa, uint32 *status) {
if (chp->chan_status & STATUS_PCHK) {
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* show I/O complete */
chp->chan_status &= ~STATUS_LENGTH; /* clear incorrect length */
//XXX store_csw(chp); /* store the status in the inch status dw */
#ifndef NEW_METHOD
/*XXX*/ store_csw(chp); /* store the status in the inch status dw */
#endif
dev_status[chsa] = 0; /* no device status */
//DIAG *status = CC2BIT; /* status stored, so CC2 */
*status = CC1BIT; /* CCs = 1, SIO accepted & queued, no echo status */
irq_pend = 1; /* still pending int */
return SCPE_OK; /* CC2 (0x20) status stored */
}
store_csw(chp); /* store the status in the inch status dw */
#ifndef NEW_METHOD
/*XXX*/ store_csw(chp); /* store the status in the inch status dw */
#endif
chp->chan_status &= ~STATUS_PCI; /* remove PCI status bit */
dev_status[chsa] = 0; /* no device status */
*status = CC2BIT; /* status stored, so CC2 */
@ -1257,17 +1270,6 @@ t_stat testxio(uint16 lchsa, uint32 *status) { /* test XIO */
*status = CC4BIT; /* busy, so CC4 */
goto tioret; /* just busy CC4 */
}
//#define NEW_LOOK
#ifdef NEW_LOOK
/* see if status already posted and requesting interrupt */
if (INTS[inta] & INTS_REQ) {
/* we have status and a request, tell caller */
*status = CC2BIT; /* status stored from SIO, so CC2 */
INTS[inta] &= ~INTS_REQ; /* turn off request bit */
goto tioret; /* CC2 and OK */
}
#endif
/* the channel is not busy, see if any status to post */
/* see if the FIFO is empty */
if (dibp->chan_fifo_in != dibp->chan_fifo_out) {
@ -1493,7 +1495,9 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */
chsa, chan, chp->ccw_cmd, chp->ccw_flags, *status);
dev_status[chsa] |= STATUS_ECHO; /* show we stopped the cmd */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* show I/O complete */
//XXX store_csw(chp); /* store the status in the inch status dw */
#ifndef NEW_METHOD
/*XXX*/ store_csw(chp); /* store the status in the inch status dw */
#endif
dev_status[chsa] = 0; /* no device status */
irq_pend = 1; /* still pending int */
// *status = CC2BIT; /* sub channel status posted, CC2BIT */
@ -1527,7 +1531,9 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */
chp->chan_status &= ~STATUS_PCI; /* remove PCI status bit */
//TUE dev_status[chsa] |= STATUS_ECHO; /* show we stopped the cmd */
/* chan_end called in hio device service routine */
//XXX store_csw(chp); /* store the status in the inch status dw */
#ifndef NEW_METHOD
/*XXX*/ store_csw(chp); /* store the status in the inch status dw */
#endif
chp->ccw_count = 0; /* force zero count */
dev_status[chsa] = 0; /* no device status */
@ -1543,7 +1549,7 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */
sim_debug(DEBUG_IRQ, &cpu_dev,
"haltxio 0 FIFO status stored OK, sw1 %08x sw2 %08x\n", sw1, sw2);
/*TUE*/ sw2 &= ~STATUS_LENGTH; /* remove SLI status bit */
sw2 |= STATUS_ECHO; /* show we stopped the cmd */
/*XXX*/ sw2 |= STATUS_ECHO; /* show we stopped the cmd */
/* we have status to return, do it now */
tempa = pchp->chan_inch_addr; /* get inch status buffer address */
M[tempa >> 2] = sw1; /* save sa & IOCD address in status WD 1 loc */
@ -1597,7 +1603,9 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */
/*ADD*/ chp->ccw_count = 0; /* clear remaining count */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* show I/O complete */
/*ADD*/ chp->chan_status &= ~STATUS_LENGTH; /* remove SLI status bit */
//XXX store_csw(chp); /* store the status in the inch status dw */
#ifndef NEW_METHOD
/*XXX*/ store_csw(chp); /* store the status in the inch status dw */
#endif
chp->chan_status &= ~STATUS_PCI; /* remove PCI status bit */
dev_status[chsa] = 0; /* no device status */
irq_pend = 1; /* still pending int */
@ -1751,8 +1759,7 @@ t_stat chan_boot(uint16 chsa, DEVICE *dptr) {
interrupt pending. Return icb address and interrupt level
*/
uint32 scan_chan(int *ilev) {
int i;
//XXint j;
int i,j;
uint32 chsa = 0; /* No device */
uint32 chan; /* channel num 0-7f */
uint32 tempa; /* icb address */
@ -1761,9 +1768,8 @@ uint32 scan_chan(int *ilev) {
CHANP *chp; /* channel prog pointer */
DIB *dibp; /* DIB pointer */
#ifdef OLD_METHOD
//WAS if (irq_pend == 1) { /* pending int? */
if ((irq_pend == 1) && loading) { /* pending int? */
#ifndef NEW_METHOD
if (irq_pend == 1) { /* pending int? */
/* see if we have a channel completed */
/* loop through all the channels/units for channel with pending I/O completion */
for (i = 0; sim_devices[i] != NULL; i++) {
@ -1784,16 +1790,16 @@ uint32 scan_chan(int *ilev) {
/* If channel end, check if we should continue */
if (chp->chan_status & STATUS_CEND) { /* do we have channel end */
sim_debug(DEBUG_XIO, &cpu_dev,
sim_debug(DEBUG_DETAIL, &cpu_dev,
"scan_chan loading %02x chan end chsa %04x flags %04x status %04x\n",
loading, chsa, chp->ccw_flags, chp->chan_status);
if (chp->ccw_flags & FLAG_CC) { /* command chain flag */
/* we have channel end and CC flag, continue channel prog */
sim_debug(DEBUG_XIO, &cpu_dev,
sim_debug(DEBUG_DETAIL, &cpu_dev,
"scan_chan loading %02x chan end & CC chsa %04x status %04x\n",
loading, chsa, chp->chan_status);
if (chp->chan_status & STATUS_DEND) { /* device end? */
sim_debug(DEBUG_XIO, &cpu_dev,
sim_debug(DEBUG_DETAIL, &cpu_dev,
"scan_chan loading %02x dev end & CC chsa %04x status %04x\n",
loading, chsa, chp->chan_status);
(void)load_ccw(chp, 1); /* go load the next IOCB */
@ -1802,7 +1808,7 @@ uint32 scan_chan(int *ilev) {
} else {
/* we have channel end and no CC flag, end command */
chsa = chp->chan_dev; /* get the chan/sa */
sim_debug(DEBUG_XIO, &cpu_dev,
sim_debug(DEBUG_DETAIL, &cpu_dev,
"scan_chan loading %02x chan end & no CC chsa %04x status %04x\n",
loading, chsa, chp->chan_status);
dev_status[chsa] = 0; /* no device status anymore */
@ -1870,66 +1876,6 @@ uint32 scan_chan(int *ilev) {
}
}
#endif
//#define NEW_LOOK
#ifdef NEW_LOOK
/* Look for channels that are not active and not requesting, */
/* but have status to post. Store the status and make them */
/* into an interest request. They will be found when we scan */
/* for the highest requesting interrupt. */
for (i=0; i<112; i++) {
if (SPAD[i+0x80] == 0) /* not initialize? */
continue; /* skip this one */
if (SPAD[i+0x80] == 0xffffffff) /* not initialize? */
continue; /* skip this one */
/* see if interrupt is enabled */
if (!((INTS[i] & INTS_ENAB) || (SPAD[i+0x80] & SINT_ENAB)))
continue; /* skip this one */
/* we are enabled, see if already active */
if ((INTS[i] & INTS_ACT) || (SPAD[i+0x80] & SINT_ACT))
continue; /* this level active, keep looking */
/* see if status already posted and requesting */
if (INTS[i] & INTS_REQ)
continue; /* this level requesting, keep looking */
/* see if there is pending status for this channel */
/* if there is, load it and request interrupt */
/* get the device entry for the logical channel in SPAD */
chan = (SPAD[i+0x80] & 0x7f00); /* get real channel and zero sa */
dibp = dev_unit[chan]; /* get the device information pointer */
/* no status for non-device entries */
if (dibp == 0) {
sim_debug(DEBUG_DETAIL, &cpu_dev,
"scan_chan %04x int %02x no DIB pointer for requesting interrupt\n", chan, i);
continue; /* skip unconfigured channel */
}
/* see if FIFO has status to post */
if (dibp->chan_fifo_in != dibp->chan_fifo_out) {
uint32 sw1, sw2;
/* fifo is not empty, so post status and request an interrupt */
if ((FIFO_Get(chan, &sw1) == 0) && (FIFO_Get(chan, &sw2) == 0)) {
/* we have status to return, do it now */
chp = find_chanp_ptr(chan); /* find the chanp pointer for channel */
/* get the address of the interrupt IVL table in main memory */
chan_ivl = SPAD[0xf1] + (i<<2); /* contents of spad f1 points to chan ivl in mem */
chan_icba = M[chan_ivl >> 2]; /* get the interrupt context blk addr in memory */
tempa = chp->chan_inch_addr; /* get inch status buffer address */
M[tempa >> 2] = sw1; /* save sa & IOCD address in status WD 1 loc */
/* save the status to memory */
M[(tempa+4) >> 2] = sw2; /* save status and count in status WD 2 loc */
/* now store the status dw address into word 5 of the ICB for the channel */
/* post sw addr in ICB+5w & set CC2 in SW */
M[(chan_icba + 20) >> 2] = tempa | BIT1;
INTS[i] |= INTS_REQ; /* turn on channel interrupt request */
sim_debug(DEBUG_IRQ, &cpu_dev,
"scan_chan REQ %04x FIFO read, irq %02x inch %06x chan_icba %06x sw1 %08x sw2 %08x\n",
chan, i, tempa, chan_icba, sw1, sw2);
irq_pend = 1; /* still pending int */
continue; /* keep looking */
}
}
/* no status to post, so go on */
}
#endif
/* see if we are able to look for ints */
if ((CPUSTATUS & 0x80) == 0) { /* are interrupts blocked */
/* ints not blocked, so look for highest requesting interrupt */
@ -1938,14 +1884,49 @@ uint32 scan_chan(int *ilev) {
continue; /* skip this one */
if (SPAD[i+0x80] == 0xffffffff) /* not initialize? */
continue; /* skip this one */
// if (INTS[i]&INTS_ACT) /* look for level active */
if (SPAD[i+0x80] & SINT_ACT) { /* look for level active */
if ((INTS[i]&INTS_ACT) || (SPAD[i+0x80]&SINT_ACT)) { /* look for level active */
//XXX if ((SPAD[i+0x80]&SINT_ACT)) { /* look for level active */
sim_debug(DEBUG_IRQ, &cpu_dev,
"scan_chan INTS ACT irq %02x SPAD %08x INTS %08x\n",
i, SPAD[i+0x80], INTS[i]);
break; /* this level active, so stop looking */
}
#ifndef OLD3
#ifndef NEW_METHOD
/* see if there is pending status for this channel */
/* if there is and the level is not requesting, do it */
if ((INTS[i] & INTS_ENAB) && !(INTS[i] & INTS_REQ)) {
/* get the device entry for the logical channel in SPAD */
chan = (SPAD[i+0x80] & 0x7f00); /* get real channel and zero sa */
dibp = dev_unit[chan]; /* get the device information pointer */
if (dibp == 0)
continue; /* skip unconfigured channel */
/* see if the FIFO is empty */
if (dibp->chan_fifo_in != dibp->chan_fifo_out) {
uint32 sw1, sw2;
/* fifo is not empty, so post status and request an interrupt */
if ((FIFO_Get(chan, &sw1) == 0) && (FIFO_Get(chan, &sw2) == 0)) {
/* we have status to return, do it now */
chp = find_chanp_ptr(chan); /* find the chanp pointer for channel */
/* get the address of the interrupt IVL table in main memory */
chan_ivl = SPAD[0xf1] + (i<<2); /* contents of spad f1 points to chan ivl in mem */
chan_icba = M[chan_ivl >> 2]; /* get the interrupt context blk addr in memory */
tempa = chp->chan_inch_addr; /* get inch status buffer address */
M[tempa >> 2] = sw1; /* save sa & IOCD address in status WD 1 loc */
/* save the status to memory */
M[(tempa+4) >> 2] = sw2; /* save status and count in status WD 2 loc */
/* now store the status dw address into word 5 of the ICB for the channel */
/* post sw addr in ICB+5w & set CC2 in SW */
M[(chan_icba + 20) >> 2] = tempa | BIT1;
INTS[i] |= INTS_REQ; /* turn on channel interrupt request */
sim_debug(DEBUG_IRQ, &cpu_dev,
"scan_chan %04x FIFO read, set irq %04x inch %06x chan_icba %06x sw1 %08x sw2 %08x\n",
chan, i, tempa, chan_icba, sw1, sw2);
}
}
}
#endif
/* look for the highest requesting interrupt */
/* that is enabled */
if (((INTS[i] & INTS_ENAB) && (INTS[i] & INTS_REQ)) ||
@ -1954,10 +1935,6 @@ uint32 scan_chan(int *ilev) {
INTS[i] &= ~INTS_REQ; /* turn off request */
INTS[i] |= INTS_ACT; /* turn on active */
SPAD[i+0x80] |= SINT_ACT; /* show active in SPAD too */
/* make sure both enabled too */
/* should already be enabled */
// INTS[i] |= INTS_ENAB; /* turn on enable */
// SPAD[i+0x80] |= SINT_ENAB; /* show enabled in SPAD too */
/* get the address of the interrupt IVL table in main memory */
chan_ivl = SPAD[0xf1] + (i<<2); /* contents of spad f1 points to chan ivl in mem */
chan_icba = M[chan_ivl >> 2]; /* get the interrupt context block addr in memory */
@ -1968,8 +1945,8 @@ uint32 scan_chan(int *ilev) {
irq_pend = 0; /* not pending anymore */
return(chan_icba); /* return ICB address */
}
#endif
#ifndef OLD1
#ifdef NEW_METHOD
/* see if there is pending status for this channel */
/* if there is and the level is not requesting, do it */
if ((INTS[i] & INTS_ENAB) && !(INTS[i] & INTS_REQ)) {
@ -2004,30 +1981,6 @@ uint32 scan_chan(int *ilev) {
}
}
}
#endif
#ifdef OLD2
/* look for the highest requesting interrupt */
/* that is enabled */
if (((INTS[i] & INTS_ENAB) && (INTS[i] & INTS_REQ)) ||
((SPAD[i+0x80] & SINT_ENAB) && (INTS[i] & INTS_REQ))) {
/* requesting, make active and turn off request flag */
INTS[i] &= ~INTS_REQ; /* turn off request */
INTS[i] |= INTS_ACT; /* turn on active */
SPAD[i+0x80] |= SINT_ACT; /* show active in SPAD too */
/* make sure both enabled too */
/* should already be enabled */
// INTS[i] |= INTS_ENAB; /* turn on enable */
// SPAD[i+0x80] |= SINT_ENAB; /* show enabled in SPAD too */
/* get the address of the interrupt IVL table in main memory */
chan_ivl = SPAD[0xf1] + (i<<2); /* contents of spad f1 points to chan ivl in mem */
chan_icba = M[chan_ivl >> 2]; /* get the interrupt context block addr in memory */
sim_debug(DEBUG_IRQ, &cpu_dev,
"scan_chan INTS REQ irq %04x found chan_icba %08x INTS %08x\n",
i, chan_icba, INTS[i]);
*ilev = i; /* return interrupt level */
irq_pend = 0; /* not pending anymore */
return(chan_icba); /* return ICB address */
}
#endif
}
}

View File

@ -35,7 +35,6 @@
#if NUM_DEVS_RTOM > 0
void rtc_setup (uint32 ss, uint32 level);
t_stat rtc_srv (UNIT *uptr);
t_stat rtc_reset (DEVICE *dptr);

View File

@ -211,6 +211,7 @@ uint32 TLB[2048]; /* Translated addresses for each map
uint32 dummy2=0;
uint32 modes; /* Operating modes, bits 0, 5, 6, 7 of PSD1 */
uint8 wait4int = 0; /* waiting for interrupt if set */
int32 irq_auto = 0; /* auto reset interrupt processing flag */
/* define traps */
uint32 TRAPME = 0; /* trap to be executed */
@ -257,6 +258,7 @@ extern uint32 scan_chan(int *ilev); /* go scan for I/O int p
extern uint16 loading; /* set when doing IPL */
extern int fprint_inst(FILE *of, uint32 val, int32 sw); /* instruction print function */
extern int irq_pend; /* go scan for pending interrupt */
extern int irq_auto; /* set when in auto reset interrupt */
extern void rtc_setup(uint32 ss, uint32 level); /* tell rtc to start/stop */
extern void itm_setup(uint32 ss, uint32 level); /* tell itm to start/stop */
extern int32 itm_rdwr(uint32 cmd, int32 cnt, uint32 level); /* read/write the interval timer */
@ -2003,7 +2005,8 @@ wait_loop:
goto skipi; /* skip int test */
}
/* process pending I/O interrupts */
if (!loading && (wait4int || irq_pend)) { /* see if ints are pending */
// if (!loading && (wait4int || irq_pend)) { /* see if ints are pending */
/*AIR*/ if (!loading && !irq_auto && (wait4int || irq_pend)) { /* see if ints are pending */
int ilev;
int_icb = scan_chan(&ilev); /* no, go scan for I/O int pending */
if (int_icb != 0) { /* was ICB returned for an I/O or interrupt */
@ -2033,19 +2036,26 @@ wait_loop:
CPUSTATUS |= 0x80; /* yes, set blk state in cpu status bit 24 */
/* This test fixed the hangs on terminal input for diags & UTX! */
#ifdef ALLOW_RTC
/*TRY*/ t = SPAD[il+0x80]; /* get spad entry for interrupt */
#endif
/* Class F I/O spec says to reset interrupt active if user's */
/* interrupt service routine runs with interrupts blocked */
#ifdef ALLOW_RTC
/*TRY*/ if ((t & 0x0f000000) == 0x0f000000) { /* if class F clear interrupt */
#endif
/* if this is F class I/O interrupt, clear the active level */
/* SPAD entries for interrupts begin at 0x80 */
INTS[il] &= ~INTS_ACT; /* deactivate specified int level */
SPAD[il+0x80] &= ~SINT_ACT; /* deactivate in SPAD too */
irq_pend = 1; /* scan for interrupts again */
//AIR irq_pend = 1; /* scan for interrupts again */
/*AIR*/ irq_auto = 1; /* show processing in blocked mode */
sim_debug(DEBUG_IRQ, &cpu_dev,
"<>Auto-reset interrupt INTS[%02x] %08x SPAD[%03x] %08x\n",
il, INTS[il], il+0x80, SPAD[il+0x80]);
#ifdef ALLOW_RT
/*TRY*/ }
#endif
}
else
CPUSTATUS &= ~0x80; /* no, reset blk state in cpu status bit 24 */
@ -2069,7 +2079,7 @@ wait_loop:
"<>Int2 %03x ICBA %06x IOCLA %06x STAT %08x SW1 %08x SW2 %08x\n",
il, int_icb, RMW(int_icb+16), RMW(int_icb+20), RMW(bc), RMW(bc+4));
wait4int = 0; /* wait is over for int */
irq_pend = 1; /* scan for interrupts again */
//AIR irq_pend = 1; /* scan for interrupts again */
skipinstr = 1; /* skip next inter test after this instr */
#ifdef NOTNOW
sim_debug(DEBUG_IRQ, &cpu_dev,
@ -2695,8 +2705,15 @@ exec:
TRAPSTATUS |= BIT19; /* set bit 19 of trap status */
goto newpsd; /* Privlege violation trap */
}
#ifdef AIR
if (CPUSTATUS & 0x80) /* see if old mode is blocked */
irq_pend = 1; /* start scanning interrupts again */
#else
/*AIR*/ if (CPUSTATUS & 0x80) { /* see if old mode is blocked */
irq_pend = 1; /* start scanning interrupts again */
/*AIR*/ irq_auto = 0; /* show done processing in blocked mode */
/*AIR*/ }
#endif
CPUSTATUS &= ~0x80; /* into status word bit 24 too */
PSD2 &= ~0x0000c000; /* clear bit 48 & 49 to be unblocked */
SPAD[0xf5] = PSD2; /* save the current PSD2 */
@ -3798,6 +3815,7 @@ skipit:
else {
CPUSTATUS &= ~0x80; /* no, reset blk state in cpu status bit 24 */
irq_pend = 1; /* start scanning interrupts again */
/*AIR*/ irq_auto = 0; /* show done processing in blocked mode */
}
}
PSD2 &= ~0x0000c000; /* clear bit 48 & 49 to be unblocked */
@ -4159,7 +4177,7 @@ doovr4:
goto newpsd; /* go execute the trap now */
}
source = (((t_uint64)GPR[sreg]) << 32); /* get upper reg value */
source |= (t_uint64)GPR[sreg+1]; /* insert low order reg value */
source |= (t_uint64)GPR[sreg+1]; /* insert low order reg value */
dest = s_fltd(source, &CC); /* do conversion & set CC's */
sim_debug(DEBUG_CMD, &cpu_dev,
"FLTD GPR[%d] %08x %08x result %016llx\n",
@ -5387,6 +5405,7 @@ doovr2:
else {
CPUSTATUS &= ~0x80; /* no, reset blk state in cpu status bit 24 */
irq_pend = 1; /* start scanning interrupts again */
/*AIR*/ irq_auto = 0; /* show done processing in blocked mode */
}
}
PSD2 &= ~0x0000c000; /* clear bit 48 & 49 to be unblocked */
@ -5987,6 +6006,7 @@ doovr2:
else {
CPUSTATUS &= ~0x80; /* no, reset blk state in cpu status bit 24 */
irq_pend = 1; /* start scanning interrupts again */
/*AIR*/ irq_auto = 0; /* show done processing in blocked mode */
}
}
PSD2 &= ~0x0000c000; /* clear bit 48 & 49 to be unblocked */
@ -7150,19 +7170,21 @@ uint32 memwds [] = {
t_stat cpu_set_size(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
uint32 mc = 0;
int32 i;
uint32 i;
cpu_unit.flags &= ~UNIT_MSIZE; /* clear old size value 0-31 */
cpu_unit.flags |= val; /* set new memory size index value (0-31) */
val >>= UNIT_V_MSIZE; /* shift index right 19 bits */
val = memwds[val]; /* (128KB/4) << index == memory size in KW */
if ((val < 0) || (val > MAXMEMSIZE))/* is size valid */
if ((val < 0) || (val > MAXMEMSIZE)) /* is size valid */
return SCPE_ARG; /* nope, argument error */
for (i = val - 1; i < MEMSIZE; i++) /* see if memory contains anything */
//Z for (i = val - 1; i < MEMSIZE; i++) /* see if memory contains anything */
for (i = val; i < MEMSIZE; i++) /* see if memory contains anything */
mc |= M[i]; /* or in any bits in memory */
if ((mc != 0) && (!get_yn("Really truncate memory [N]?", FALSE)))
return SCPE_OK; /* return OK if user says no */
MEMSIZE = val - 1; /* set new size in words */
//Z MEMSIZE = val - 1; /* set new size in words */
MEMSIZE = val; /* set new size in words */
for (i = MEMSIZE; i < MAXMEMSIZE; i++)
M[i] = 0; /* zero all of the new memory */
return SCPE_OK; /* we done */

View File

@ -495,7 +495,7 @@ uint8 disk_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
uptr->CMDu3 |= cmd; /* save cmd */
sim_activate(uptr, 20); /* start things off */
break;
case DSK_WSL: /* WSL 0x31 */
uptr->CMDu3 |= cmd; /* save cmd */
sim_activate(uptr, 20); /* start things off */
@ -621,7 +621,7 @@ t_stat disk_srv(UNIT *uptr)
/* drive attribute registers */
// daws[j++] = (buf[i-3]<<24) | (buf[i-2]<<16)
// | (buf[i-1]<<8) | (buf[i]);
/* may want to use this later */
/* may want to use this later */
/* clear warning errors */
tstart = (buf[i-3]<<24) | (buf[i-2]<<16)
| (buf[i-1]<<8) | (buf[i]);
@ -656,7 +656,7 @@ t_stat disk_srv(UNIT *uptr)
"disk_srv cmd WSL chsa %04x count %04x completed\n",
chsa, chp->ccw_count);
sim_debug(DEBUG_DETAIL, dptr, "Sector 1 label");
sim_debug(DEBUG_DETAIL, dptr, "Sector %x label", uptr->CHS);
/* now read sector label data */
len = chp->ccw_count;
for (i = 0; i < len; i++) {
@ -669,7 +669,7 @@ t_stat disk_srv(UNIT *uptr)
break;
}
if ((i%16) == 0)
sim_debug(DEBUG_DETAIL, dptr, "\nSector 1 label");
sim_debug(DEBUG_DETAIL, dptr, "\nSector %x label", uptr->CHS);
sim_debug(DEBUG_DETAIL, dptr, " %02x", buf[i]);
}
sim_debug(DEBUG_DETAIL, dptr, "\n");
@ -678,24 +678,24 @@ t_stat disk_srv(UNIT *uptr)
break;
case DSK_WTL: /* WTL 0x51 make into NOP */
uptr->CMDu3 &= LMASK; /* remove old status bits & cmd */
uptr->CMDu3 &= LMASK; /* remove old status bits & cmd */
sim_debug(DEBUG_CMD, dptr,
"disk_srv cmd WTL chsa %04x count %04x completed\n",
chsa, chp->ccw_count);
sim_debug(DEBUG_DETAIL, dptr, "Track 0 label");
sim_debug(DEBUG_DETAIL, dptr, "Track %x label", uptr->CHS);
/* now read track label data */
for (i = 0; i < 30; i++) {
if (chan_read_byte(chsa, &buf[i])) {
/* we have read error, bail out */
uptr->CMDu3 &= LMASK; /* remove old status bits & cmd */
uptr->CMDu3 &= LMASK; /* remove old status bits & cmd */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
return SCPE_OK;
//XXX goto goout;
break;
}
if (i == 16)
sim_debug(DEBUG_DETAIL, dptr, "\nTrack 0 label");
sim_debug(DEBUG_DETAIL, dptr, "\nTrack %x label", uptr->CHS);
sim_debug(DEBUG_DETAIL, dptr, " %02x", buf[i]);
}
sim_debug(DEBUG_DETAIL, dptr, "\n");
@ -1196,24 +1196,19 @@ t_stat disk_srv(UNIT *uptr)
"disk_srv RSL unit=%02x star %02x %02x %02x %02x\n",
unit, buf[0], buf[1], buf[2], buf[3]);
/* get sector address of UTX media descriptor */
/* 819/6/0 is right for 8887, 819/15/0 for 9346 */
/* get sector address of UMAP */
/* UMAP 249216 (819/15/0) 0x3cd80 for 9346 - 823/19/16 */
tstart = ((CYL(type)-4) * SPC(type)) +
((HDS(type)-4) * SPT(type)) - SPT(type);
//WAS tstart = ((CYL(type)-4) * SPC(type)) +
//WAS ((HDS(type)-2) * SPT(type)) - SPT(type);
((HDS(type)-4) * SPT(type));
sim_debug(DEBUG_CMD, dptr,
"disk_srv SL1 RSL sector %d %x star %02x %02x %02x %02x\n",
tstart, tstart, buf[0], buf[1], buf[2], buf[3]);
/* on HSDP DMAP is in wd 3 on label 0 */
/* on HSDP UMAP is in wd 4 on label 1 */
/* on UDP & DPII DMAP is in wd 3 on label 0 */
/* on UDP & DPII UMAP is in wd 4 on label 0 */
//WAS tstart = 0x3cd90; /* 819/16/0 physical 249232 */
/* UMAP 249216 (819/15/0) 0x3cd80 for 9346 - 823/19/16 */
/* the address must be physical for UDP */
/* store into sec 1 label */
buf[16] = (tstart >> 24) & 0xff; /* UMAP pointer */
@ -1226,8 +1221,6 @@ t_stat disk_srv(UNIT *uptr)
/* area are too. That is where UTX looks. Byte 27 is sectors/track */
/* and byte 28 is number of heads. Byte 25 is copy of byte 27. */
buf[25] = disk_type[type].spt & 0xff; /* sect per track 35 */
/* UTX looks at bit 6 & 7 to determine if UDP or HSDP controller */
/* The UDP/DPII controllers do not use these bits, so UTX keys */
/* on these bits to determine type of controller. Bit 31 is set */
/* for a HSDP and not set for the UDP/DPII */
@ -1235,7 +1228,7 @@ t_stat disk_srv(UNIT *uptr)
buf[27] = disk_type[type].spt & 0xff; /* sec per track 35 */
buf[28] = disk_type[type].nhds & 0xff; /* num heads 10 */
sim_debug(DEBUG_DETAIL, dptr, "Sector 1 label");
sim_debug(DEBUG_DETAIL, dptr, "Sector %x label", uptr->CHS);
/* now write sector label data */
for (i = 0; i < 30; i++) {
if (chan_write_byte(chsa, &buf[i])) {
@ -1245,7 +1238,7 @@ t_stat disk_srv(UNIT *uptr)
break;
}
if (i == 16)
sim_debug(DEBUG_DETAIL, dptr, "\nSector 1 label");
sim_debug(DEBUG_DETAIL, dptr, "\nSector %x label", uptr->CHS);
sim_debug(DEBUG_DETAIL, dptr, " %02x", buf[i]);
}
sim_debug(DEBUG_DETAIL, dptr, "\n");
@ -1304,9 +1297,10 @@ t_stat disk_srv(UNIT *uptr)
/* get sector address of media defect table */
/* VDT 249264 (819/18/0) 0x3cdb0 for 9346 - 823/19/16 */
/* MDT 249248 (819/17/0) 0x3cda0 for 9346 - 823/19/16 */
/* MDT 249248 (819/17/0) 0x3cda0 for 9346 - 823/19/16 Trk 0 */
/* DMAP 249232 (819/16/0) 0x3cd90 for 9346 - 823/19/16 */
/* UMAP 249216 (819/15/0) 0x3cd80 for 9346 - 823/19/16 */
/* UMAP 249216 (819/15/0) 0x3cd80 for 9346 - 823/19/16 Trk 0/Sec 1 */
tstart = (CYL(type)-4) * SPC(type) + (HDS(type)-2) * SPT(type);
cyl = disk_type[type].cyl-1; /* last cyl */
@ -1322,7 +1316,7 @@ t_stat disk_srv(UNIT *uptr)
if (uptr->CHS == 0) { /* only write dmap address in trk 0 */
/* output last sector address of disk */
buf[12] = (tstart >> 24) & 0xff; /* DMAP pointer */
buf[12] = (tstart >> 24) & 0xff; /* lumapp DMAP pointer */
buf[13] = (tstart >> 16) & 0xff;
buf[14] = (tstart >> 8) & 0xff;
buf[15] = (tstart) & 0xff;
@ -1332,7 +1326,8 @@ t_stat disk_srv(UNIT *uptr)
/* UMAP 249216 (819/15/0) 0x3cd80 for 9346 - 823/19/16 */
//WAS tstart -= SPT(type); /* calc umap address */
tstart -= (2*SPT(type)); /* calc umap address */
/* the address must be physical for UDP */
/* the address must be physical for UDP/DPII */
if (uptr->CHS == 0) { /* only write umap address on trk 0 */
buf[16] = (tstart >> 24) & 0xff; /* ldeallp UMAP */
buf[17] = (tstart >> 16) & 0xff;
@ -1350,7 +1345,7 @@ t_stat disk_srv(UNIT *uptr)
buf[27] = disk_type[type].spt & 0xff;
buf[28] = disk_type[type].nhds & 0xff;
sim_debug(DEBUG_DETAIL, dptr, "Track 0 label");
sim_debug(DEBUG_DETAIL, dptr, "Track %x label", uptr->CHS);
/* now write track label data */
for (i = 0; i < 30; i++) {
if (chan_write_byte(chsa, &buf[i])) {
@ -1360,7 +1355,7 @@ t_stat disk_srv(UNIT *uptr)
break;
}
if (i == 16)
sim_debug(DEBUG_DETAIL, dptr, "\nTrack 0 label");
sim_debug(DEBUG_DETAIL, dptr, "\nTrack %x label", uptr->CHS);
sim_debug(DEBUG_DETAIL, dptr, " %02x", buf[i]);
}
sim_debug(DEBUG_DETAIL, dptr, "\n");
@ -1416,67 +1411,77 @@ int disk_format(UNIT *uptr) {
uint32 tsize = disk_type[type].spt; /* get track size in sectors */
uint32 csize = disk_type[type].nhds * tsize; /* get cylinder size in sectors */
uint32 cyl = disk_type[type].cyl; /* get # cylinders */
// uint32 spc = disk_type[type].nhds * disk_type[type].spt; /* sectors/cyl */
uint32 cap = disk_type[type].cyl * csize; /* disk capacity in sectors */
uint32 cylv = cyl; /* number of cylinders */
uint8 *buff;
int i;
/* last sector address of disk (cyl * hds * spt) - 1 */
uint32 laddr = CAP(type) - 1; /* last sector of disk */
/* get sector address of vendor defect table */
/* put data = 0xf0000000 0xf4000004 */
/* last track address of disk (cyl * hds * spt) - spt */
uint32 ltaddr = CAP(type)-SPT(type); /* last sector of disk */
/* get sector address of vendor defect table VDT */
/* put data = 0xf0000000 0xf4000000 */
int32 vaddr = (CYL(type)-4) * SPC(type) + (HDS(type)-1) * SPT(type);
/* get sector address of utx diag map track 0 pointer */
/* get sector address of utx diag map (DMAP) track 0 pointer */
/* put data = 0xf0000000 + (cyl-1), 0x8a000000 + daddr, */
/* 0x9a000000 + (cyl-1), 0xf4000008 */
int32 daddr = vaddr - SPT(type);
//WASint32 daddr = vaddr - SPT(type);
int32 daddr = (CYL(type)-4) * SPC(type) + (HDS(type)-2) * SPT(type);
/* get sector address of utx flaw data (1 track long) */
/* set trace data to zero */
//WASint32 faddr = daddr - SPT(type);
int32 faddr = (CYL(type)-4) * SPC(type) + (HDS(type)-3) * SPT(type);
/* get sector address of utx flaw map sec 1 pointer */
/* use this address for sec 1 label pointer */
//WASint32 uaddr = daddr - SPT(type);
int32 uaddr = daddr - (2*SPT(type));
/* last block available */
//WASint32 uaddr = daddr - (2*SPT(type));
int32 uaddr = (CYL(type)-4) * SPC(type) + (HDS(type)-4) * SPT(type);
/* last user block available */
int32 luaddr = (CYL(type)-4) * SPC(type);
#ifdef MAYBE
/* get sector address of utx flaw data (1 track long) */
/* set trace data to zero */
int32 faddr = uaddr - SPT(type);
#endif
/* make up a UMAP with the partiton data for 9346 disk */
uint32 umap[256] =
#ifdef OLDWAY
// {0x4e554d50,0x4450b,0x43fbb,0,0,0,0xffffffff,0xe10,
{0x4e554d50,0x3d14f,0x00000,0,0,0,0xffffffff,0xe10,
// 7,0x5258,0,0x4e5c,0x3e,0x43fbc,0,0xd32c,
7,0x5258,0,0x4e5c,0x3e,0x43fbc,0,0xd32c,
0x79,0x187cc,0x118,0x14410,0x23f,0,0,0,
0,0x3821a2d6,0x4608c,0x1102000,0,0,0x4608c,0,
0,0x46069,0,0,0x46046,0,0,0x46023,
0,0,0x46000,0,0,0x45fdd,0,0,
0x45fba,0,0,0,0,0,0,0,
};
#else
{
/* try to makeup a utx dmap */
0x4e554d50,(cap-1),luaddr-1,0,0,0,0,0xe10,
0,0x5320,0,0x4e60,0x46,luaddr,0,0xd360,
0x88,0x186b0,0x13a,0xd100,0x283,0,0,0,
0,0x22c2813e,0,0x06020000,0xf4,0,0x431b1c,0,
/* try to makeup a utx dmap */
};
#ifdef USEFORMPX
{
/* some values created by j.vfmt */
// 0xf003d14f,0x8a03cda0,0x9a03cdbf,0x8903cdc0,
// 0x9903d01f,0x8c03d020,0x9c03d14f,0xf4000000,
/// 0xf0000000 | (cap-1), 0x8a000000 | daddr,
/// 0x9a000000 | (daddr + ((2 * tsize) - 1)),
/// 0x89000000 | (daddr + (2 * tsize)),
/// 0x99000000 | ((cap-1)-spc),
/// 0x8c000000 | (cap-spc),
/// 0x9c000000 | (cap-1), 0xf4000000,
0xf0000000 | (cap-1), 0x8a000000 | daddr,
0x9a000000 | (daddr + ((2 * tsize) - 1)),
0x89000000 | (daddr + (2 * tsize)),
0x99000000 | ((cap-1)-spc),
0x8c000000 | (cap-spc),
0x9c000000 | (cap-1), 0xf4000000,
};
#endif
/* 250191 249248 250191 0 */
// uint32 dmap[4] = {0xf003d14f, 0x8a03cda0, 0x9a03d14f, 0xf4000000};
int i;
/* vendor flaw map */
/* vendor flaw map in vaddr */
uint32 vmap[2] = {0xf0000004, 0xf4000000};
/* defect map */
uint32 dmap[4] = {0xf0000000 | (cap-1), 0x8a000000 | daddr,
0x9a000000 | (cap-1), 0xf4000008};
//TRY 0x9a000000 | (cap-1), 0xf4000000};
0x9a000000 | (cap-1), 0xf4000000};
//TRY 0x9a000000 | (cap-1), 0xf4000008};
/* utx flaw map */
uint32 fmap[4] = {0xf0000000 | (cap-1), 0x8a000000 | daddr,
0x9a000000 | ltaddr, 0xf4000000};
//TRY 0x9a000000 | ltaddr, 0xf4000008};
/* see if user wants to initialize the disk */
if (!get_yn("Initialize disk? [Y] ", TRUE)) {
@ -1496,6 +1501,11 @@ int disk_format(UNIT *uptr) {
dmap[3] = 0xf4000000;
#endif
/* VDT 249264 (819/18/0) 0x3cdb0 for 9346 - 823/19/16 vaddr */
/* MDT 249248 (819/17/0) 0x3cda0 for 9346 - 823/19/16 daddr */
/* DMAP 249232 (819/16/0) 0x3cd90 for 9346 - 823/19/16 faddr */
/* UMAP 249216 (819/15/0) 0x3cd80 for 9346 - 823/19/16 uaddr */
/* seek to sector 0 */
if ((sim_fseek(uptr->fileref, 0, SEEK_SET)) != 0) { /* seek home */
fprintf (stderr, "Error on seek to 0\r\n");
@ -1521,6 +1531,9 @@ int disk_format(UNIT *uptr) {
if ((sim_fwrite(buff, 1, csize*ssize, uptr->fileref)) != csize*ssize) {
sim_debug(DEBUG_CMD, dptr,
"Error on write to diskfile cyl %04x\n", cyl);
free(buff); /* free cylinder buffer */
buff = 0;
return 1;
}
if (cyl == 0) {
buff[0] = 0;
@ -1533,22 +1546,25 @@ int disk_format(UNIT *uptr) {
}
fputc('\r', stderr);
fputc('\n', stderr);
free(buff); /* free cylinder buffer */
buff = NULL;
buff = 0;
/* byte swap the buffers for dmap and umap */
for (i=0; i<256; i++) {
umap[i] = (((umap[i] & 0xff) << 24) | ((umap[i] & 0xff00) << 8) |
((umap[i] & 0xff0000) >> 8) | ((umap[i] >> 24) & 0xff));
for (i=0; i<2; i++) {
vmap[i] = (((vmap[i] & 0xff) << 24) | ((vmap[i] & 0xff00) << 8) |
((vmap[i] & 0xff0000) >> 8) | ((vmap[i] >> 24) & 0xff));
}
for (i=0; i<4; i++) {
dmap[i] = (((dmap[i] & 0xff) << 24) | ((dmap[i] & 0xff00) << 8) |
((dmap[i] & 0xff0000) >> 8) | ((dmap[i] >> 24) & 0xff));
}
for (i=0; i<2; i++) {
vmap[i] = (((vmap[i] & 0xff) << 24) | ((vmap[i] & 0xff00) << 8) |
((vmap[i] & 0xff0000) >> 8) | ((vmap[i] >> 24) & 0xff));
for (i=0; i<4; i++) {
fmap[i] = (((fmap[i] & 0xff) << 24) | ((fmap[i] & 0xff00) << 8) |
((fmap[i] & 0xff0000) >> 8) | ((fmap[i] >> 24) & 0xff));
}
for (i=0; i<256; i++) {
umap[i] = (((umap[i] & 0xff) << 24) | ((umap[i] & 0xff00) << 8) |
((umap[i] & 0xff0000) >> 8) | ((umap[i] >> 24) & 0xff));
}
/* now seek to end of disk and write the dmap data */
@ -1557,66 +1573,82 @@ int disk_format(UNIT *uptr) {
/* write dmap data to last sector on disk */
if ((sim_fseek(uptr->fileref, laddr*ssize, SEEK_SET)) != 0) { /* seek last sector */
sim_debug(DEBUG_CMD, dptr,
"Error on last sector seek to diskfile sect %06x\n", (cap-1) * ssize);
"Error on last sector seek to sect 0x06 offset %06x\n",
cap-1, (cap-1)*ssize);
return 1;
}
if ((sim_fwrite((char *)&dmap, sizeof(uint32), 4, uptr->fileref)) != 4) {
sim_debug(DEBUG_CMD, dptr,
"Error on last sector write to diskfile sect %06x\n", (cap-1) * ssize);
"Error writing DMAP to sect %06x offset %06x\n",
cap-1, (cap-1)*ssize);
return 1;
}
/* 1 cylinder is saved for disk manufacture */
/* 2 cylinders are saved for diagnostics */
/* write vmap to vaddr that is the address in trk 0 label + 1 track */
/* daddr is (cap) - 3 cyl - 2 tracks */
/* vaddr is (cap) - 3 cyl - 1 track */
/* seek to vendor label area */
/* seek to vendor label area VMAP */
if ((sim_fseek(uptr->fileref, vaddr*ssize, SEEK_SET)) != 0) { /* seek VMAP */
sim_debug(DEBUG_CMD, dptr,
"Error on vendor map seek to diskfile sect %06x\n", (cap-1) * ssize);
"Error on vendor map seek to sect %06x offset %06x\n",
vaddr, vaddr*ssize);
return 1;
}
if ((sim_fwrite((char *)&vmap, sizeof(uint32), 2, uptr->fileref)) != 2) {
sim_debug(DEBUG_CMD, dptr,
"Error on vendor map write to diskfile sect %06x\n", vaddr * ssize);
"Error writing VMAP to sect %06x offset %06x\n",
vaddr, vaddr*ssize);
return 1;
}
/* write dmap to daddr that is the address in trk 0 label */
/* daddr is (cap) - 3 cyl - 2 tracks */
/* vaddr is daddr - spt */
/* write DMAP to daddr that is the address in trk 0 label */
if ((sim_fseek(uptr->fileref, daddr*ssize, SEEK_SET)) != 0) { /* seek DMAP */
sim_debug(DEBUG_CMD, dptr,
"Error on daddr seek to diskfile sect %06x\n", (cap-1) * ssize);
"Error on diag map seek to sect %06x offset %06x\n",
daddr, daddr*ssize);
return 1;
}
if ((sim_fwrite((char *)&dmap, sizeof(uint32), 4, uptr->fileref)) != 4) {
sim_debug(DEBUG_CMD, dptr,
"Error on daddr write to diskfile sect %06x\n", daddr * ssize);
"Error writing DMAP to sect %06x offset %06x\n",
daddr, daddr*ssize);
return 1;
}
/* write dummy DMAP to faddr */
if ((sim_fseek(uptr->fileref, faddr*ssize, SEEK_SET)) != 0) { /* seek DMAP */
sim_debug(DEBUG_CMD, dptr,
"Error on media flaw map seek to sect %06x offset %06x\n",
faddr, faddr*ssize);
return 1;
}
if ((sim_fwrite((char *)&dmap, sizeof(uint32), 4, uptr->fileref)) != 4) {
sim_debug(DEBUG_CMD, dptr,
"Error writing flaw map to sect %06x offset %06x\n",
faddr, faddr*ssize);
return 1;
}
/* write UTX umap to uaddr */
if ((sim_fseek(uptr->fileref, uaddr*ssize, SEEK_SET)) != 0) { /* seek UMAP */
sim_debug(DEBUG_CMD, dptr,
"Error on umap seek to diskfile sect %06x\n", (cap-1) * ssize);
"Error on umap seek to sect %06x offset %06x\n",
uaddr, uaddr*ssize);
return 1;
}
if ((sim_fwrite((char *)&umap, sizeof(uint32), 256, uptr->fileref)) != 256) {
sim_debug(DEBUG_CMD, dptr,
"Error on umap write to diskfile sect %06x\n", uaddr * ssize);
"Error writing UMAP to sect %06x offsewt %06x\n",
uaddr, uaddr*ssize);
return 1;
}
printf("writing to vmap sec %x (%d) bytes %x (%d)\n",
vaddr, vaddr, (vaddr)*ssize, (vaddr)*ssize);
printf("writing to umap sec %x (%d) bytes %x (%d)\n",
uaddr, uaddr, (uaddr)*ssize, (uaddr)*ssize);
printf("writing to flaw map sec %x (%d) bytes %x (%d)\n",
faddr, faddr, (faddr)*ssize, (faddr)*ssize);
printf("writing dmap to %x %d %x %d dmap to %x %d %x %d\n",
cap-1, cap-1, (cap-1)*ssize, (cap-1)*ssize,
daddr, daddr, daddr*ssize, daddr*ssize);
printf("writing to umap sec %x (%d) bytes %x (%d)\n",
uaddr, uaddr, (uaddr)*ssize, (uaddr)*ssize);
/* seek home again */
if ((sim_fseek(uptr->fileref, 0, SEEK_SET)) != 0) { /* seek home */
@ -1687,7 +1719,7 @@ fmt:
sim_debug(DEBUG_CMD, dptr,
"Attach %s cyl %d hds %d spt %d spc %d cap sec %d cap bytes %d\n",
disk_type[type].name, CYL(type), HDS(type), SPT(type), SPC(type),
disk_type[type].name, CYL(type), HDS(type), SPT(type), SPC(type),
CAP(type), CAPB(type));
sim_debug(DEBUG_CMD, dptr, "File %s attached to %s\r\n",

View File

@ -1254,6 +1254,37 @@ wrdone:
/* The UTX med map is pointed to by sector label 1 */
/* simulate pointers here, set wd[3] in label to VDT */
#ifdef OLD
/* get physical sector address of media defect table */
/* VDT 286935 (819/9/0) 0x460f5 for 8887 - 823/10/35 */
/* MDT 286930 (819/8/0) 0x460d2 for 8887 - 823/10/35 Trk 0 ptr */
/* DMAP 286895 (819/7/0) 0x460af for 8887 - 823/10/35 */
/* UMAP 286860 (819/6/0) 0x4608c for 8887 - 823/10/35 */
#else
/* get physical sector address of media defect table */
/* VDT 286965 (819/9/0) 0x460f5 for 8887 - 823/10/35 */
// /* MDT 286930 (819/8/0) 0x460d2 for 8887 - 823/10/35 Trk 0 ptr */
/* DMAP 286930 (819/8/0) 0x460d2 for 8887 - 823/10/35 Trk 0 ptr */
// /* DMAP 286895 (819/7/0) 0x460af for 8887 - 823/10/35 */
/* UMAP 286895 (819/7/0) 0x460af for 8887 - 823/10/35 */
// /* UMAP 286860 (819/6/0) 0x4608c for 8887 - 823/10/35 */
#endif
#ifdef OLD
/* get logical sector address of media defect table */
/* VDT 278766 (819/9/0) 0x440ee for 8887 - 823/10/34 */
/* MDT 278732 (819/8/0) 0x440cc for 8887 - 823/10/34 */
/* DMAP 278698 (819/7/0) 0x440aa for 8887 - 823/10/34 */
/* UMAP 278664 (819/6/0) 0x44088 for 8887 - 823/10/34 Sec 0 ptr */
#else
/* get logical sector address of media defect table */
/* VDT 278766 (819/9/0) 0x440ee for 8887 - 823/10/34 */
// /* MDT 278732 (819/8/0) 0x440cc for 8887 - 823/10/34 */
/* DMAP 278732 (819/8/0) 0x440cc for 8887 - 823/10/34 */
// /* DMAP 278698 (819/7/0) 0x440aa for 8887 - 823/10/34 */
/* UMAP 278698 (819/7/0) 0x440aa for 8887 - 823/10/34 Sec 0 ptr */
// /* UMAP 278664 (819/6/0) 0x44088 for 8887 - 823/10/34 Sec 0 ptr */
#endif
sim_debug(DEBUG_CMD, dptr, "hsdp_startcmd RSL STAR %08x disk geom %08x\n",
uptr->CHS, GEOM(type));
@ -1269,24 +1300,32 @@ wrdone:
"hsdp_srv RSL unit=%0x2x star %02x %02x %02x %02x\n",
unit, buf[0], buf[1], buf[2], buf[3]);
/* get sector address of UTX media descriptor */
/* 819/6/0 is right for 8887, 819/15/0 for 9346 */
/* get physical sector address of UMAP */
#ifdef OLD
/* UMAP 286860 (819/6/0) 0x4608c for 8887 - 823/10/35 */
tstart = ((CYL(type)-4) * SPC(type)) +
((HDS(type)-4) * SPT(type)) - SPT(type);
//WAS tstart = ((CYL(type)-4) * SPC(type)) +
//WAS ((HDS(type)-2) * SPT(type)) - SPT(type);
((HDS(type)-4) * SPT(type));
#else
/* UMAP 278698 (819/7/0) 0x440aa for 8887 - 823/10/34 Sec 0 ptr */
tstart = ((CYL(type)-4) * SPC(type)) +
((HDS(type)-3) * (SPT(type)));
#endif
/* get physical sector address of UMAP */
sim_debug(DEBUG_CMD, dptr,
"hsdp_srv SL1 RSL sector %d %x star %02x %02x %02x %02x\n",
tstart, tstart, buf[0], buf[1], buf[2], buf[3]);
/* on HSDP DMAP is in wd 3 on label 0 */
/* on HSDP UMAP is in wd 4 on label 1 */
/* on UDP & DPII DMAP is in wd 3 on label 0 */
/* on UDP & DPII UMAP is in wd 4 on label 0 */
//WAS tstart = 0x440aa; /* 819/7/0 logical 278698 */
/* the address must be logical */
tstart = (tstart * (SPT(type) - 1))/SPT(type); /* make logical */
#ifdef OLD
/* UMAP 278664 (819/6/0) 0x44088 for 8887 - 823/10/34 Sec 0 ptr */
#else
/* UMAP 278698 (819/7/0) 0x440aa for 8887 - 823/10/34 Sec 0 ptr */
#endif
tstart = (tstart * (SPT(type)-1))/SPT(type); /* make logical */
/* the address must be logical for HSDP */
/* store into sec 1 label */
buf[12] = (tstart >> 24) & 0xff; /* UMAP pointer */
buf[13] = (tstart >> 16) & 0xff;
@ -1380,8 +1419,37 @@ wrdone:
/* The UTX media map is pointed to by sector label 1 */
/* simulate pointers here, set wd[3] in label to VDT */
/* get sector address of media defect table */
/* 286930 (819/8/0) 0x460d2 for 8887 - 823/10/36 */
#ifdef OLD
/* get physical sector address of media defect table */
/* VDT 286935 (819/9/0) 0x460f5 for 8887 - 823/10/35 */
/* MDT 286930 (819/8/0) 0x460d2 for 8887 - 823/10/35 Trk 0 ptr */
/* DMAP 286895 (819/7/0) 0x460af for 8887 - 823/10/35 */
/* UMAP 286860 (819/6/0) 0x4608c for 8887 - 823/10/35 */
#else
/* get physical sector address of media defect table */
/* VDT 286965 (819/9/0) 0x460f5 for 8887 - 823/10/35 */
// /* MDT 286930 (819/8/0) 0x460d2 for 8887 - 823/10/35 Trk 0 ptr */
/* DMAP 286930 (819/8/0) 0x460d2 for 8887 - 823/10/35 Trk 0 ptr */
// /* DMAP 286895 (819/7/0) 0x460af for 8887 - 823/10/35 */
/* UMAP 286895 (819/7/0) 0x460af for 8887 - 823/10/35 */
// /* UMAP 286860 (819/6/0) 0x4608c for 8887 - 823/10/35 */
#endif
#ifdef OLD
/* get logical sector address of media defect table */
/* VDT 278766 (819/9/0) 0x440ee for 8887 - 823/10/34 */
/* MDT 278732 (819/8/0) 0x440cc for 8887 - 823/10/34 */
/* DMAP 278698 (819/7/0) 0x440aa for 8887 - 823/10/34 */
/* UMAP 278664 (819/6/0) 0x44088 for 8887 - 823/10/34 Sec 0 ptr */
#else
/* get logical sector address of media defect table */
/* VDT 278766 (819/9/0) 0x440ee for 8887 - 823/10/34 */
// /* MDT 278732 (819/8/0) 0x440cc for 8887 - 823/10/34 */
/* DMAP 278732 (819/8/0) 0x440cc for 8887 - 823/10/34 */
// /* DMAP 278698 (819/7/0) 0x440aa for 8887 - 823/10/34 */
/* UMAP 278698 (819/7/0) 0x440aa for 8887 - 823/10/34 Sec 0 ptr */
// /* UMAP 278664 (819/6/0) 0x44088 for 8887 - 823/10/34 Sec 0 ptr */
#endif
tstart = (CYL(type)-4) * SPC(type) + (HDS(type)-2) * SPT(type);
cyl = hsdp_type[type].cyl-1; /* last cyl */
@ -1395,6 +1463,7 @@ wrdone:
"hsdp_srv TRK0 RTL sector %d %x star %02x %02x %02x %02x\n",
tstart, tstart, buf[0], buf[1], buf[2], buf[3]);
/* write physical address of MDT on disk */
if (uptr->CHS == 0) { /* only write dmap address in trk 0 */
/* output last sector address of disk */
buf[12] = (tstart >> 24) & 0xff; /* ldeallp DMAP pointer */
@ -1403,13 +1472,18 @@ wrdone:
buf[15] = (tstart) & 0xff;
}
/* get sector address of umap table */
/* 286895 (819/7/0) 0x460af for 8887 - 823/10/36 */
//WAS tstart -= SPT(type); /* calc utxfmap address */
tstart -= (2*SPT(type)); /* calc utxfmap address */
/* get physical sector address of umap table */
/* UMAP 286860 (819/6/0) 0x4608c for 8887 - 823/10/35 */
/* get logical sector address of umap table */
/* UMAP 278664 (819/6/0) 0x44088 for 8887 - 823/10/34 Sec 0 ptr */
tstart -= SPT(type); /* calc utxfmap address */
//BAD tstart -= (2*SPT(type)); /* calc umap address */
/* the address must be logical */
/* 286860 physical becomes 278664 logical */
tstart = (tstart * (SPT(type) - 1))/SPT(type); /* make logical */
/* 278698 (819/7/0) 0x440aa for 8887 - 823/10/35 */
/* UMAP 278664 (819/6/0) 0x44088 for 8887 - 823/10/34 Sec 0 ptr */
if (uptr->CHS == 0) { /* only write dmap address on trk 0 */
buf[16] = (tstart >> 24) & 0xff; /* ldeallp UMAP */
buf[17] = (tstart >> 16) & 0xff;
@ -1421,6 +1495,7 @@ wrdone:
/* of the track label, BUT it is really in the configuration data */
/* area too. That is where UTX looks. Byte 27 is sectors/track */
/* and byte 28 is number of heads. Byte 25 is copy of byte 27. */
/* these are physical values, not logical */
buf[25] = hsdp_type[type].spt & 0xff; /* sect per track 35 */
buf[26] = hsdp_type[type].type | 1; /* sense data set for 1024 byte blk */
buf[27] = hsdp_type[type].spt & 0xff; /* sec per track 35 */
@ -1486,7 +1561,6 @@ t_stat hsdp_reset(DEVICE *dptr)
/* create the disk file for the specified device */
int hsdp_format(UNIT *uptr) {
// uint16 addr = GET_UADDR(uptr->CMD);
int type = GET_TYPE(uptr->flags);
DEVICE *dptr = get_dev(uptr);
uint32 ssize = hsdp_type[type].ssiz * 4; /* disk sector size in bytes */
@ -1496,64 +1570,52 @@ int hsdp_format(UNIT *uptr) {
uint32 cap = hsdp_type[type].cyl * csize; /* disk capacity in sectors */
uint32 cylv = cyl; /* number of cylinders */
uint8 *buff;
int i;
/* last sector address of disk (cyl * hds * spt) - 1 */
uint32 laddr = CAP(type) - 1; /* last sector of disk */
/* get sector address of vendor defect table */
/* make logical */
int32 logla = laddr*(SPC(type)-1)/(SPC(type));
/* get sector address of vendor defect table VDT */
/* put data = 0xf0000000 0xf4000004 */
int32 vaddr = (CYL(type)-4) * SPC(type) + (HDS(type)-1) * SPT(type);
/* get sector address of utx diag map track 0 pointer */
/* get sector address of utx diag map (DMAP) track 0 pointer */
/* put data = 0xf0000000 + (cyl-1), 0x8a000000 + daddr, */
/* 0x9a000000 + (cyl-1), 0xf4000008 */
int32 daddr = vaddr - SPT(type);
/* get sector address of utx flaw map sec 1 pointer */
/* use this address for sec 1 label pointer */
//WASint32 uaddr = daddr - SPT(type);
int32 uaddr = daddr - (2*SPT(type));
/* make logical */
int32 logda = daddr*(SPC(type)-1)/(SPC(type));
int32 uaddr = daddr - SPT(type);
//BADnt32 uaddr = daddr - (2*SPT(type));
/* last block available */
int32 luaddr = (CYL(type)-4) * SPC(type);
#ifdef MAYBE
/* make logical */
int32 logua = luaddr*(SPC(type)-1)/(SPC(type));
/* get sector address of utx flaw data (1 track long) */
/* set trace data to zero */
int32 faddr = uaddr - SPT(type);
#endif
//NOint32 faddr = daddr - SPT(type);
/* make up a UMAP with the partition for 8887 disk */
uint32 umap[256] =
#ifndef NOTFORMPX
#ifdef NOERRORS
/* try having no error, 7 in 3rd line */
{0x4e554d50,0x4450b,0x43fbb,0,0,0,0,0xe10,
// {0x4e554d50,0x3d14f,0x00000,0,0,0,0xffffffff,0xe10,
// 7,0x5258,0,0x4e5c,0x3e,0x43fbc,0,0xd32c,
0,0x5258,0,0x4e5c,0x3e,0x43fbc,0,0xd32c,
{
//WAS 0x4e554d50,(cap-1),luaddr-1,0,0,0,0,0xe10,
0x4e554d50,logla,logua-1,0,0,0,0,0xe10,
//WAS 0,0x5258,0,0x4e5c,0x3e,luaddr,0,0xd32c,
0,0x5258,0,0x4e5c,0x3e,logua,0,0xd32c,
0x79,0x187cc,0x118,0x14410,0x23f,0,0,0,
0,0x3821a2d6,0,0x1102000,0xf4,0,0,0,
// 0,0x3821a2d6,0x4608c,0x1102000,0,0,0,0,
0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,
0,0,0,0,0,0,0,0,
// dec 0x4e554d50,(cap-1),luaddr-1,0,0,0,0,3600,
// dec 0,21080,0,20060,62,luaddr,0,54060,
// dec 121,100300,280,82960,575,0,0,0,
// dec 0,clocksecs,0,17833984,244,0,0,0,
};
#else
/* use original copy of geert's left disk */
//WAS {0x4e554d50,0x4450b,0x43fbb,0,0,0,0,0xe10,
{
0x4e554d50,(cap-1),luaddr-1,0,0,0,0,0xe10,
0,0x5258,0,0x4e5c,0x3e,luaddr,0,0xd32c,
0x79,0x187cc,0x118,0x14410,0x23f,0,0,0,
0,0x3821a2d6,0,0x1102000,0xf4,0,0,0,
//WAS {0x4e554d50,0x4450b,0x43fbb,0,0,0,0,0xe10,
// {0x4e554d50,0x3d14f,0x00000,0,0,0,0xffffffff,0xe10,
//WAS 7,0x5258,0,0x4e5c,0x3e,0x43fbc,0,0xd32c,
// 0,0x5258,0,0x4e5c,0x3e,0x43fbc,0,0xd32c,
// 0,0x5258,0,0x4e5c,0x3e,0x43fbc,0,0xd32c,
/// 0x79,0x187cc,0x118,0x14410,0x23f,0,0,0,
/// 0,0x3821a2d6,0x4608c,0x1102000,0xf4,0,0x4608c,0,
// 0,0x3821a2d6,0,0x1102000,0,0,0x4608c,0,
// 0,0x3821a2d6,0,0x1102000,0,0,0x4608c,0,
/// 0,0x46069,0,0,0x46046,0,0,0x46023,
/// 0,0,0x46000,0,0,0x45fdd,0,0,
/// 0x45fba,0,0,0,0,0,0,0,
};
#endif
#else
#ifdef USEFORMPX
{
/* some values created by j.vfmt */
// 0xf003d14f,0x8a03cda0,0x9a03cdbf,0x8903cdc0,
@ -1566,14 +1628,15 @@ int hsdp_format(UNIT *uptr) {
0x9c000000 | (cap-1), 0xf4000000,
};
#endif
/* 250191 249248 250191 0 */
// uint32 dmap[4] = {0xf003d14f, 0x8a03cda0, 0x9a03d14f, 0xf4000000};
int i;
/* NULL vendor flaw map */
uint32 vmap[2] = {0xf0000004, 0xf4000000};
/* diag flaw map */
uint32 dmap[4] = {0xf0000000 | (cap-1), 0x8a000000 | daddr,
uint32 pdmap[4] = {0xf0000000 | (cap-1), 0x8a000000 | daddr,
0x9a000000 | (cap-1), 0xf4000008};
uint32 dmap[4] = {0xf0000000 | logla, 0x8a000000 | logda,
0x9a000000 | logla, 0xf4000008};
//WAS 0x9a000000 | (cap-1), 0xf4000000};
/* see if user wants to initialize the disk */
@ -1595,6 +1658,22 @@ int hsdp_format(UNIT *uptr) {
dmap[3] = 0xf4000000;
#endif
/* get physical sector address of media defect table */
/* VDT 286965 (819/9/0) 0x460f5 for 8887 - 823/10/35 */
// /* MDT 286930 (819/8/0) 0x460d2 for 8887 - 823/10/35 Trk 0 ptr */
/* DMAP 286930 (819/8/0) 0x460d2 for 8887 - 823/10/35 Trk 0 ptr */
// /* DMAP 286895 (819/7/0) 0x460af for 8887 - 823/10/35 */
/* UMAP 286895 (819/7/0) 0x460af for 8887 - 823/10/35 */
// /* UMAP 286860 (819/6/0) 0x4608c for 8887 - 823/10/35 */
/* get logical sector address of media defect table */
/* VDT 278766 (819/9/0) 0x440ee for 8887 - 823/10/34 */
// /* MDT 278732 (819/8/0) 0x440cc for 8887 - 823/10/34 */
/* DMAP 278732 (819/8/0) 0x440cc for 8887 - 823/10/34 */
// /* DMAP 278698 (819/7/0) 0x440aa for 8887 - 823/10/34 */
/* UMAP 278698 (819/7/0) 0x440aa for 8887 - 823/10/34 Sec 0 ptr */
// /* UMAP 278664 (819/6/0) 0x44088 for 8887 - 823/10/34 Sec 0 ptr */
/* seek to sector 0 */
if ((sim_fseek(uptr->fileref, 0, SEEK_SET)) != 0) { /* seek home */
fprintf (stderr, "Error on seek to 0\r\n");
@ -1620,6 +1699,9 @@ int hsdp_format(UNIT *uptr) {
if ((sim_fwrite(buff, 1, csize*ssize, uptr->fileref)) != csize*ssize) {
sim_debug(DEBUG_CMD, dptr,
"Error on write to diskfile cyl %04x\n", cyl);
free(buff); /* free cylinder buffer */
buff = NULL;
return 1;
}
if (cyl == 0) {
buff[0] = 0;
@ -1640,6 +1722,10 @@ int hsdp_format(UNIT *uptr) {
umap[i] = (((umap[i] & 0xff) << 24) | ((umap[i] & 0xff00) << 8) |
((umap[i] & 0xff0000) >> 8) | ((umap[i] >> 24) & 0xff));
}
for (i=0; i<4; i++) {
pdmap[i] = (((pdmap[i] & 0xff) << 24) | ((pdmap[i] & 0xff00) << 8) |
((pdmap[i] & 0xff0000) >> 8) | ((pdmap[i] >> 24) & 0xff));
}
for (i=0; i<4; i++) {
dmap[i] = (((dmap[i] & 0xff) << 24) | ((dmap[i] & 0xff00) << 8) |
((dmap[i] & 0xff0000) >> 8) | ((dmap[i] >> 24) & 0xff));
@ -1652,67 +1738,90 @@ int hsdp_format(UNIT *uptr) {
/* now seek to end of disk and write the dmap data */
/* setup dmap pointed to by track label 0 wd[3] = (cyl-4) * spt + (spt - 1) */
/* write dmap data to last sector on disk */
if ((sim_fseek(uptr->fileref, laddr*ssize, SEEK_SET)) != 0) { /* seek last sector */
sim_debug(DEBUG_CMD, dptr,
"Error on last sector seek to diskfile sect %06x\n", (cap-1) * ssize);
"Error on last sector seek to sect 0x06 offset %06x\n",
cap-1, (cap-1)*ssize);
return 1;
}
if ((sim_fwrite((char *)&dmap, sizeof(uint32), 4, uptr->fileref)) != 4) {
if ((sim_fwrite((char *)&pdmap, sizeof(uint32), 4, uptr->fileref)) != 4) {
sim_debug(DEBUG_CMD, dptr,
"Error on last sectdor write to diskfile sect %06x\n", (cap-1) * ssize);
"Error writing DMAP to sect %06x offset %06x\n",
cap-1, (cap-1)*ssize);
return 1;
}
/* 1 cylinder is saved for disk manufacture */
/* 2 cylinders are saved for diagnostics */
/* write vmap to vaddr that is the address in trk 0 label + 1 track */
/* daddr is (cap) - 3 cyl - 2 tracks */
/* vaddr is (cap) - 3 cyl - 1 track */
/* seek to vendor label area */
/* seek to vendor label area VMAP */
if ((sim_fseek(uptr->fileref, vaddr*ssize, SEEK_SET)) != 0) { /* seek VMAP */
sim_debug(DEBUG_CMD, dptr,
"Error on vendor map seek to diskfile sect %06x\n", (cap-1) * ssize);
"Error on vendor map seek to sect %06x offset %06x\n",
vaddr, vaddr*ssize);
return 1;
}
if ((sim_fwrite((char *)&vmap, sizeof(uint32), 2, uptr->fileref)) != 2) {
sim_debug(DEBUG_CMD, dptr,
"Error on vendor map write to diskfile sect %06x\n", vaddr * ssize);
"Error writing VMAP to sect %06x offset %06x\n",
vaddr, vaddr*ssize);
return 1;
}
/* write dmap to daddr that is the address in trk 0 label */
/* daddr is (cap) - 3 cyl - 2 tracks */
/* vaddr is daddr - spt */
/* write DMAP to daddr that is the address in trk 0 label */
if ((sim_fseek(uptr->fileref, daddr*ssize, SEEK_SET)) != 0) { /* seek DMAP */
sim_debug(DEBUG_CMD, dptr,
"Error on dmap seek to diskfile sect %06x\n", (cap-1) * ssize);
"Error on diag map seek to sect %06x offset %06x\n",
daddr, daddr*ssize);
return 1;
}
if ((sim_fwrite((char *)&dmap, sizeof(uint32), 4, uptr->fileref)) != 4) {
sim_debug(DEBUG_CMD, dptr,
"Error on dmap write to diskfile sect %06x\n", daddr * ssize);
"Error writing DMAP to sect %06x offset %06x\n",
daddr, daddr*ssize);
return 1;
}
#ifdef NOTUSED
/* write dummy DMAP to faddr */
if ((sim_fseek(uptr->fileref, faddr*ssize, SEEK_SET)) != 0) { /* seek DMAP */
sim_debug(DEBUG_CMD, dptr,
"Error on media flaw map seek to sect %06x offset %06x\n",
faddr, faddr*ssize);
return 1;
}
if ((sim_fwrite((char *)&dmap, sizeof(uint32), 4, uptr->fileref)) != 4) {
sim_debug(DEBUG_CMD, dptr,
"Error writing flaw map to sect %06x offset %06x\n",
faddr, faddr*ssize);
return 1;
}
#endif
/* write UTX umap to uaddr */
if ((sim_fseek(uptr->fileref, uaddr*ssize, SEEK_SET)) != 0) { /* seek UMAP */
sim_debug(DEBUG_CMD, dptr,
"Error on umap seek to diskfile sect %06x\n", (cap-1) * ssize);
"Error on umap seek to sect %06x offset %06x\n",
uaddr, uaddr*ssize);
return 1;
}
if ((sim_fwrite((char *)&umap, sizeof(uint32), 256, uptr->fileref)) != 256) {
sim_debug(DEBUG_CMD, dptr,
"Error on umap write to diskfile sect %06x\n", uaddr * ssize);
"Error writing UMAP to sect %06x offsewt %06x\n",
uaddr, uaddr*ssize);
return 1;
}
printf("writing to vmap sec %x (%d) bytes %x (%d)\n",
vaddr, vaddr, (vaddr)*ssize, (vaddr)*ssize);
printf("writing to umap sec %x (%d) bytes %x (%d)\n",
uaddr, uaddr, (uaddr)*ssize, (uaddr)*ssize);
#ifdef NOTUSED
printf("writing to flaw map sec %x (%d) bytes %x (%d)\n",
faddr, faddr, (faddr)*ssize, (faddr)*ssize);
#endif
printf("writing dmap to %x %d %x %d dmap to %x %d %x %d\n",
cap-1, cap-1, (cap-1)*ssize, (cap-1)*ssize,
daddr, daddr, daddr*ssize, daddr*ssize);
printf("writing to umap sec %x (%d) bytes %x (%d)\n",
uaddr, uaddr, (uaddr)*ssize, (uaddr)*ssize);
/* seek home again */
if ((sim_fseek(uptr->fileref, 0, SEEK_SET)) != 0) { /* seek home */

View File

@ -77,7 +77,6 @@ P00070 20 DATAB C' ' 0x20 FORMS CONTROL FO
//#define UNIT_LPR UNIT_ATTABLE | UNIT_DISABLE
#define UNIT_LPR UNIT_ATTABLE | UNIT_IDLE
/* u3 hold command and status information */
#define LPR_INCH 0x00 /* INCH command */
/* print buffer then CC commands */

View File

@ -39,8 +39,8 @@
#include "sel32_defs.h"
#include "sim_tape.h"
#if NUM_DEVS_MT > 0
#define BUFFSIZE (64 * 1024)
#define UNIT_MT UNIT_ATTABLE | UNIT_DISABLE | UNIT_ROABLE
#define DEV_BUF_NUM(x) (((x) & 07) << DEV_V_UF)
@ -558,6 +558,7 @@ t_stat mt_srv(UNIT *uptr)
}
/* just dump data */
}
#ifdef CHANGE_FOR_UTX_TEST
/* a BTP uses a 41 word INCH memory buffer */
// for (i=0; i<41; i++) {
for (i=0; i<9; i++) {
@ -571,6 +572,7 @@ t_stat mt_srv(UNIT *uptr)
else
WMW(mema+(4*i),0); /* zero work location */
}
#endif
/* the chp->ccw_addr location contains the inch address */
/* call set_inch() to setup inch buffer */
i = set_inch(uptr, mema); /* new address */

View File

@ -22,11 +22,12 @@
*/
#include "sim_defs.h"
#include "sel32_defs.h"
#include <ctype.h>
extern REG cpu_reg[];
extern uint32 M[MAXMEMSIZE];
extern uint32 SPAD[];
extern uint32 PSD[];
/* SCP data structures and interface routines
@ -1080,7 +1081,7 @@ t_stat fprint_sym (FILE *of, t_addr addr, t_value *val, UNIT *uptr, int32 sw)
/*
* Collect offset in radix.
*/
t_stat get_off (CONST char *cptr, CONST char **tptr, uint32 radix, uint32 *val, char *m)
t_stat get_off (CONST char *cptr, CONST char **tptr, uint32 radix, t_value *val, char *m)
{
t_stat r = SCPE_OK; /* assume OK return */
@ -1105,7 +1106,7 @@ t_stat get_off (CONST char *cptr, CONST char **tptr, uint32 radix, uint32 *val,
/*
* Collect immediate in radix.
*/
t_stat get_imm (CONST char *cptr, CONST char **tptr, uint32 radix, uint32 *val)
t_stat get_imm (CONST char *cptr, CONST char **tptr, uint32 radix, t_value *val)
{
t_stat r;