From 222a105735c2e8dcb445c68274b32ea21bcb9660 Mon Sep 17 00:00:00 2001 From: Richard Cornwell Date: Fri, 15 Jul 2016 09:07:30 -0400 Subject: [PATCH] KA10: Updated to current sort of working code. KI10 will now boot to login prompt. KA10 appears to be working correctly. 22Bit devices now working correctly. --- PDP10/ka10_cpu.c | 267 +++++++++++++++++++++++++--------------------- PDP10/ka10_defs.h | 55 +++++----- PDP10/ka10_dp.c | 94 ++++++++-------- PDP10/ka10_mt.c | 2 +- PDP10/ka10_rc.c | 57 +++++----- PDP10/ka10_rp.c | 2 +- 6 files changed, 248 insertions(+), 229 deletions(-) diff --git a/PDP10/ka10_cpu.c b/PDP10/ka10_cpu.c index 34aee67..b6393d6 100644 --- a/PDP10/ka10_cpu.c +++ b/PDP10/ka10_cpu.c @@ -158,7 +158,6 @@ char clk_en; /* Enable clock interrupts */ int clk_irq; /* Clock interrupt */ char pi_restore; /* Restore previous level */ char pi_hold; /* Hold onto interrupt */ -int pi_cycle; /* Executing an interrupt */ #if KI uint64 ARX; /* Extension to AR */ uint64 BRX; /* Extension to BR */ @@ -264,11 +263,13 @@ MTAB cpu_mod[] = { { UNIT_MSIZE, 8, "128K", "128K", &cpu_set_size }, { UNIT_MSIZE, 12, "196K", "196K", &cpu_set_size }, { UNIT_MSIZE, 16, "256K", "256K", &cpu_set_size }, -#if KI +#if KI & KI_22BIT { UNIT_MSIZE, 32, "512K", "512K", &cpu_set_size }, { UNIT_MSIZE, 64, "1024K", "1024K", &cpu_set_size }, { UNIT_MSIZE, 128, "2048K", "2048K", &cpu_set_size }, { UNIT_MSIZE, 256, "4096K", "4096K", &cpu_set_size }, +#endif +#if KI { MTAB_XTD|MTAB_VDV|MTAB_VALR, 0, "SERIAL", "SERIAL", &cpu_set_serial, &cpu_show_serial }, #endif @@ -718,10 +719,10 @@ t_stat dev_pag(uint32 dev, uint64 *data) { } if (res & SMASK) { ub_ptr = ((res >> 18) & 017777) << 9; - user_addr_cmp = (res & 00020000000000LL) != 0; - small_user = (res & 00040000000000LL) != 0; - fm_sel = (res & 00300000000000LL) >> 29; } + user_addr_cmp = (res & 00020000000000LL) != 0; + small_user = (res & 00040000000000LL) != 0; + fm_sel = (uint8)(res >> 29) & 060; sim_debug(DEBUG_DATAIO, &cpu_dev, "DATAO PAG %012llo ebr=%06o ubr=%06o\n", *data, eb_ptr, ub_ptr); @@ -933,11 +934,11 @@ t_stat null_dev(uint32 dev, uint64 *data) { } #if KI -int page_lookup(int addr, int flag, int *loc, int wr) { +int page_lookup(int addr, int flag, int *loc, int wr, int fetch) { uint64 data; int base; int page = addr >> 9; - int uf = 0; + int uf = (FLAGS & USER) != 0; if (flag) { *loc = addr; @@ -946,8 +947,7 @@ int page_lookup(int addr, int flag, int *loc, int wr) { if (page_fault) return 0; - if (((FLAGS & USER) != 0) || - ((xct_flag & 1) && ((wr == 0) || modify)) || + if (uf || ((xct_flag & 1) && !fetch && ((wr == 0) || modify)) || ((xct_flag & 2) && wr)) { base = ub_ptr; uf = 1; @@ -985,13 +985,14 @@ int page_lookup(int addr, int flag, int *loc, int wr) { // fprintf(stderr, " -> %06llo wr=%o ", data, wr); *loc = ((data & 037777) << 9) + (addr & 0777); // fprintf(stderr, " -> %06o", *loc); - if (!pi_cycle && ((FLAGS & PUBLIC) != 0) && ((data & 0200000) == 0)) { + if (((FLAGS & PUBLIC) != 0) && ((data & 0200000) == 0)) { /* Handle public violation */ fault_data = (((uint64)(page))<<18) | ((uint64)(uf) << 28) | 061LL; private_page = 1; // fprintf(stderr, " public"); } - public_access = (data & 0200000) != 0; + if (fetch && ((data & 0200000) != 0)) + FLAGS |= PUBLIC; if ((data & LSIGN) == 0 || (wr & ((data & 0100000) == 0))) { fault_data = (((uint64)(page))<<18) | ((uint64)(uf) << 28) | 020LL; fault_data |= (data & 0400000) ? 010LL : 0LL; /* A */ @@ -1011,45 +1012,22 @@ int page_lookup(int addr, int flag, int *loc, int wr) { } uint64 get_reg(int reg) { - if (FLAGS & USER) { + if (FLAGS & USER) return FM[fm_sel|reg]; - } else if (xct_flag & 1) { - if (FLAGS & USERIO) { - if (fm_sel == 0) { - int addr; - if (page_lookup(reg, 0, &addr, 0)) - return M[addr]; - } - return FM[fm_sel|reg]; - } - return M[ub_ptr + ac_stack + reg]; - } - return FM[reg]; + else + return FM[reg]; } -void set_reg(int reg, uint64 value, int mem) { - if (FLAGS & USER) { +void set_reg(int reg, uint64 value) { + if (FLAGS & USER) FM[fm_sel|reg] = value; - } else if (((xct_flag & 1) && mem && modify) || - ((xct_flag & 1) && !mem) || (xct_flag & 2)) { - if (FLAGS & USERIO) { - if (fm_sel == 0) { - int addr; - if (page_lookup(reg, 0, &addr, 1)) - M[addr] = value; - } else - FM[fm_sel|reg] = value; - return; - } - M[ub_ptr + ac_stack + reg] = value; - return; - } - FM[reg] = value; + else + FM[reg] = value; } #else -int page_lookup(int addr, int flag, int *loc, int wr) { +int page_lookup(int addr, int flag, int *loc, int wr, int fetch) { if (!flag && (FLAGS & USER) != 0) { if (addr <= ((Pl << 10) + 01777)) *loc = (AB + (Rl << 10)) & RMASK; @@ -1070,17 +1048,34 @@ int page_lookup(int addr, int flag, int *loc, int wr) { } #define get_reg(reg) FM[(reg) & 017] -#define set_reg(reg, value, mem) FM[(reg) & 017] = value +#define set_reg(reg, value) FM[(reg) & 017] = value #endif -int Mem_read(int flag) { +int Mem_read(int flag, int fetch) { + int addr; + if (AB < 020) { +#if KI + if (FLAGS & USER) { + MB = get_reg(AB); + return 0; + } else if (xct_flag & 1 && !fetch) { + if (FLAGS & USERIO) { + if (fm_sel == 0) + goto read; + MB = FM[fm_sel|AB]; + return 0; + } + MB = M[ub_ptr + ac_stack + AB]; + return 0; + } +#endif MB = get_reg(AB); } else { - int addr; +read: sim_interval--; - if (!page_lookup(AB, flag, &addr, 0)) + if (!page_lookup(AB, flag, &addr, 0, fetch)) return 1; if (addr >= (int)MEMSIZE) { // fprintf(stderr, "NXM %06o read %06o\n\r", addr, PC); @@ -1094,12 +1089,30 @@ int Mem_read(int flag) { } int Mem_write(int flag) { - if (AB < 020) - set_reg(AB, MB, 1); - else { - int addr; + int addr; + + if (AB < 020) { +#if KI + if (FLAGS & USER) { + set_reg(AB, MB); + return 0; + } else if (((xct_flag & 1) && modify) || (xct_flag & 2)) { + if (FLAGS & USERIO) { + if (fm_sel == 0) + goto write; + else + FM[fm_sel|AB] = MB; + return 0; + } + M[ub_ptr + ac_stack + AB] = MB; + return 0; + } +#endif + set_reg(AB, MB); + } else { +write: sim_interval--; - if (!page_lookup(AB, flag, &addr, 1)) + if (!page_lookup(AB, flag, &addr, 1, 0)) return 1; #if KI if (private_page) @@ -1134,17 +1147,18 @@ int nlzero(uint64 w) { t_stat sim_instr (void) { t_stat reason; -int f; -int i_flags; -int pi_rq; -int pi_ov; -int ind; -int f_load_pc; -int f_inst_fetch; -int f_pc_inh; -int nrf; -int fxu_hold_set; -int sac_inh; +int i_flags; /* Instruction mode flags */ +int pi_rq; /* Interrupt request */ +int pi_ov; /* Overflow during PI cycle */ +int pi_cycle; /* Executing an interrupt */ +int ind; /* Indirect bit */ +int f_load_pc; /* Load AB from PC at start of instruction */ +int f_inst_fetch; /* Fetch new instruction */ +int f_pc_inh; /* Inhibit PC increment after instruction */ +int nrf; /* Normalize flag */ +int fxu_hold_set; /* Negitive exponent */ +int sac_inh; /* Inihibit saving AC after instruction */ +int f; /* Temporary variables */ int flag1; int flag3; /* Restore register state */ @@ -1194,13 +1208,11 @@ fetch: private_page = 0; page_fault = 0; #endif - Mem_read(pi_cycle | uuo_cycle); + Mem_read(pi_cycle | uuo_cycle, 1); IR = (MB >> 27) & 0777; AC = (MB >> 23) & 017; i_flags = opflags[IR]; #if KI - if (public_access) - FLAGS |= PUBLIC; FLAGS &= ~(TRP1|TRP2); #endif BYF5 = 0; @@ -1213,14 +1225,14 @@ fetch: } /* Update history */ - if (hst_lnt) { + if (hst_lnt && PC > 020 && (PC & 0777774) != 0472174) { hst_p = hst_p + 1; if (hst_p >= hst_lnt) hst_p = 0; hst[hst_p].pc = HIST_PC | ((BYF5)? (HIST_PC2|PC) : AB); hst[hst_p].ea = AB; hst[hst_p].ir = MB; - hst[hst_p].flags = (FLAGS << 4) |(clk_flg << 3) |(mem_prot << 2) | + hst[hst_p].flags = (FLAGS << 5) |(clk_flg << 3) |(mem_prot << 2) | (nxm_flag << 1) | (push_ovf); hst[hst_p].ac = get_reg(AC); } @@ -1240,7 +1252,7 @@ fetch: if (IR != 0254) AR &= RMASK; if (ind & !pi_rq) - if (Mem_read(pi_cycle | uuo_cycle)) + if (Mem_read(pi_cycle | uuo_cycle, 0)) goto last; /* Handle events during a indirect loop */ if (sim_interval-- <= 0) { @@ -1284,7 +1296,7 @@ fetch_opr: #if KI modify = 1; #endif - if (Mem_read(0)) + if (Mem_read(0, 0)) goto last; AR = MB; } @@ -1349,7 +1361,7 @@ unasign: AB |= 2; if (FLAGS & USER) AB |= 4; - Mem_read(uuo_cycle); + Mem_read(uuo_cycle, 0); FLAGS = (MB >> 23) & 017777; PC = MB & RMASK; f_pc_inh = 1; @@ -1393,14 +1405,14 @@ unasign: /* AR,MQ = AC BR,MB = mem */ /* AR High */ AB = (AB + 1) & RMASK; - if (Mem_read(0)) + if (Mem_read(0, 0)) goto last; SC = GET_EXPO(BR); - BR = SMEAR_SIGN(BR); + SMEAR_SIGN(BR); BR <<= 35; BR |= MB & CMASK; FE = GET_EXPO(AR); - AR = SMEAR_SIGN(AR); + SMEAR_SIGN(AR); AR <<= 35; AR |= (MQ & CMASK); if (IR & 01) { @@ -1480,14 +1492,14 @@ dpnorm: /* AR,MQ = AC BR,MB = mem */ /* AR High */ AB = (AB + 1) & RMASK; - if (Mem_read(0)) + if (Mem_read(0, 0)) goto last; SC = GET_EXPO(AR); - AR = SMEAR_SIGN(AR); + SMEAR_SIGN(AR); AR <<= 35; AR |= (MQ & CMASK); FE = GET_EXPO(BR); - BR = SMEAR_SIGN(BR); + SMEAR_SIGN(BR); BR <<= 35; BR |= MB & CMASK; flag1 = 0; @@ -1517,14 +1529,14 @@ dpnorm: /* AR,MQ = AC BR,MB = mem */ /* AR High */ AB = (AB + 1) & RMASK; - if (Mem_read(0)) + if (Mem_read(0, 0)) goto last; SC = GET_EXPO(AR); - AR = SMEAR_SIGN(AR); + SMEAR_SIGN(AR); AR <<= 35; AR |= (MQ & CMASK); FE = GET_EXPO(BR); - BR = SMEAR_SIGN(BR); + SMEAR_SIGN(BR); BR <<= 35; BR |= MB & CMASK; flag1 = 0; @@ -1576,14 +1588,14 @@ dpnorm: case 0120: /* DMOVE */ AB = (AB + 1) & RMASK; - if (Mem_read(0)) + if (Mem_read(0, 0)) goto last; MQ = MB; break; case 0121: /* DMOVN */ AB = (AB + 1) & RMASK; - if (Mem_read(0)) + if (Mem_read(0, 0)) goto last; MQ = ((MB & CMASK) ^ CMASK) + 1; /* Low */ /* High */ @@ -1747,7 +1759,7 @@ unasign: SC = (SC + 1) & 0777; } AR &= MQ; - set_reg(AC, AR, 0); + set_reg(AC, AR); } else { BR = MB; AR = get_reg(AC) & MQ; @@ -1949,7 +1961,7 @@ fxnorm: /* Handle UFA */ if (IR == 0130) { - set_reg((AC + 1) & 017, AR, 0); + set_reg((AC + 1) & 017, AR); break; } break; @@ -2173,7 +2185,7 @@ fxnorm: check_apr_irq(); } #if KI - if (AR == SMASK & !pi_cycle) + if (AR == SMASK && !pi_cycle) FLAGS |= TRP1; #endif AR = AD & FMASK; @@ -2414,7 +2426,7 @@ div: f_pc_inh = 1; SC = nlzero(AR); } - set_reg(AC + 1, SC, 0); + set_reg(AC + 1, SC); break; case 0244: /* ASHC */ @@ -2512,34 +2524,34 @@ div: /* Branch */ case 0250: /* EXCH */ - set_reg(AC, BR, 0); + set_reg(AC, BR); break; case 0251: /* BLT */ BR = AB; do { - if (sim_interval <= 0) { - sim_process_event(); - } - /* Allow for interrupt */ - if (pi_enable && pi_pending) { + if (sim_interval <= 0) { + sim_process_event(); + } + /* Allow for interrupt */ + if (pi_enable && pi_pending) { pi_rq = check_irq_level(); if (pi_rq) { - f_pc_inh = 1; - f_load_pc = 0; - f_inst_fetch = 0; - set_reg(AC, AR, 0); - break; + f_pc_inh = 1; + f_load_pc = 0; + f_inst_fetch = 0; + set_reg(AC, AR); + break; } - } - AB = (AR >> 18) & RMASK; - if (Mem_read(0)) - break; - AB = (AR & RMASK); - if (Mem_write(0)) - break; - AD = (AR & RMASK) + CM(BR) + 1; - AR = (AR + 01000001LL); + } + AB = (AR >> 18) & RMASK; + if (Mem_read(0, 0)) + break; + AB = (AR & RMASK); + if (Mem_write(0)) + break; + AD = (AR & RMASK) + CM(BR) + 1; + AR = AOB(AR); } while ((AD & C1) == 0); break; @@ -2652,8 +2664,8 @@ div: break; } } - AB = AR + (f >> 1); - if (Mem_read(0)) + AB = (AR + (f >> 1)) & RMASK; + if (Mem_read(0, 0)) goto last; AR = MB; if ((f & 1) == 0) @@ -2679,7 +2691,7 @@ div: MB = ((uint64)(FLAGS) << 23) | ((PC + !pi_cycle) & RMASK); FLAGS &= ~ (BYTI|ADRFLT|TRP2|TRP1); if (uuo_cycle | pi_cycle) { - FLAGS &= ~USER; /* Clear USER */ + FLAGS &= ~(USER|PUBLIC); /* Clear USER */ } Mem_write(uuo_cycle | pi_cycle); PC = BR & RMASK; @@ -2705,7 +2717,7 @@ div: case 0262: /* POP */ AB = AR & RMASK; - if (Mem_read(0)) + if (Mem_read(0, 0)) goto last; AR = SOB(AR); AB = BR & RMASK; @@ -2724,7 +2736,7 @@ div: case 0263: /* POPJ */ AB = AR & RMASK; - if (Mem_read(0)) + if (Mem_read(0, 0)) goto last; PC = MB & RMASK; AR = SOB(AR); @@ -2743,9 +2755,13 @@ div: case 0264: /* JSR */ /* AR Frm PC */ AD = ((uint64)(FLAGS) << 23) | ((PC + !pi_cycle) & RMASK); +#if KI +// FLAGS &= ~ 0420; +#else FLAGS &= ~ 0434; +#endif if (uuo_cycle | pi_cycle) { - FLAGS &= ~USER; /* Clear USER */ + FLAGS &= ~(USER|PUBLIC); /* Clear USER */ } PC = (AR + pi_cycle) & RMASK; AR = AD; @@ -2754,9 +2770,13 @@ div: case 0265: /* JSP */ /* AR Frm PC */ AD = ((uint64)(FLAGS) << 23) | ((PC + !pi_cycle) & RMASK); +#if KI +// FLAGS &= ~ 0420; +#else FLAGS &= ~ 0434; +#endif if (uuo_cycle | pi_cycle) { - FLAGS &= ~USER; /* Clear USER */ + FLAGS &= ~(USER|PUBLIC); /* Clear USER */ } PC = AR & RMASK; AR = AD; @@ -2764,9 +2784,9 @@ div: break; case 0266: /* JSA */ /* AR Frm PC */ - set_reg(AC, (AR << 18) | ((PC + 1) & RMASK), 0); + set_reg(AC, (AR << 18) | ((PC + 1) & RMASK)); if (uuo_cycle | pi_cycle) { - FLAGS &= ~USER; /* Clear USER */ + FLAGS &= ~(USER|PUBLIC); /* Clear USER */ } PC = AR & RMASK; AR = BR; @@ -2774,10 +2794,10 @@ div: case 0267: /* JRA */ AD = AB; /* Not in hardware */ - AB = (get_reg(AC) >> 18) & RMASK; - if (Mem_read(uuo_cycle | pi_cycle)) + AB = (get_reg(AC) >> 18, 0) & RMASK; + if (Mem_read(uuo_cycle | pi_cycle, 0)) goto last; - set_reg(AC, MB, 0); + set_reg(AC, MB); PC = AD & RMASK; f_pc_inh = 1; break; @@ -3284,7 +3304,7 @@ test_op: switch(AC & 07) { case 0: /* 00 BLKI */ case 2: /* 10 BLKO */ - if (Mem_read(pi_cycle)) + if (Mem_read(pi_cycle, 0)) break; AR = MB; if (hst_lnt) { @@ -3312,7 +3332,7 @@ test_op: Mem_write(pi_cycle); break; case 3: /* 14 DATAO */ - if (Mem_read(pi_cycle)) + if (Mem_read(pi_cycle, 0)) break; AR = MB; dev_tab[d](DATAO|(d<<2), &AR); @@ -3347,10 +3367,10 @@ test_op: goto last; } if (!sac_inh && ((i_flags & SAC) || ((i_flags & SACZ) && AC != 0))) - set_reg(AC, AR, 0); /* blank, I, B */ + set_reg(AC, AR); /* blank, I, B */ if (!sac_inh && (i_flags & SAC2)) - set_reg((AC+1) & 017, MQ, 0); + set_reg((AC+1) & 017, MQ); if (hst_lnt) { hst[hst_p].fmb = AR; @@ -3364,7 +3384,6 @@ last: if (page_enable && (page_fault || private_page || (FLAGS & (TRP1|TRP2)))) { f_pc_inh = 1; f_load_pc = 0; - uuo_cycle = 1; trap_flag = 1; if (page_fault || private_page) { page_fault = private_page = 0; @@ -3372,13 +3391,13 @@ last: inout_fail = 1; AB = ub_ptr + (FLAGS & USER) ? 0427 : 0426; MB = fault_data; - Mem_write(uuo_cycle); + Mem_write(1); AB = 0420; } else { AB = 0420 + ((FLAGS & (TRP1|TRP2)) >> 2); } AB += (FLAGS & USER) ? ub_ptr : eb_ptr; -fprintf(stderr, "Trap %06o\n\r", AB); +//fprintf(stderr, "Trap %06o\n\r", AB); } #endif diff --git a/PDP10/ka10_defs.h b/PDP10/ka10_defs.h index 1b64380..9d48d13 100644 --- a/PDP10/ka10_defs.h +++ b/PDP10/ka10_defs.h @@ -43,7 +43,7 @@ #endif #ifndef KI_22BIT -#define KI_22BIT 0 +#define KI_22BIT KI #endif /* Digital Equipment Corporation's 36b family had six implementations: @@ -104,32 +104,32 @@ extern DEBTAB dev_debug[]; #define Q_IDLE (sim_idle_enab) /* Device information block */ -#define LMASK 00777777000000LL -#define RMASK 00000000777777LL -#define FMASK 00777777777777LL -#define CMASK 00377777777777LL -#define SMASK 00400000000000LL -#define C1 01000000000000LL -#define LSIGN 00000000400000LL -#define PMASK 00007777777777LL -#define XMASK 03777777777777LL -#define EMASK 00777000000000LL -#define MMASK 00000777777777LL -#define BIT1 00200000000000LL -#define BIT8 00001000000000LL -#define BIT9 00000400000000LL -#define BIT10_35 0000377777777LL -#define MANT 00000777777777LL -#define EXPO 00377000000000LL -#define DFMASK 01777777777777777777777LL -#define DSMASK 01000000000000000000000LL -#define DCMASK 0777777777777777777777LL -#define DNMASK 0400000000000000000000LL -#define DXMASK 0200000000000000000000LL -#define FPSMASK 040000000000000000000LL -#define FPNMASK 01000000000000000000LL -#define FPFMASK 077777777777777777777LL -#define FPCMASK 000777777777777777777LL +#define LMASK 00777777000000LL +#define RMASK 00000000777777LL +#define FMASK 00777777777777LL +#define CMASK 00377777777777LL +#define SMASK 00400000000000LL +#define C1 01000000000000LL +#define LSIGN 00000000400000LL +#define PMASK 00007777777777LL +#define XMASK 03777777777777LL +#define EMASK 00777000000000LL +#define MMASK 00000777777777LL +#define BIT1 00200000000000LL +#define BIT8 00001000000000LL +#define BIT9 00000400000000LL +#define BIT10_35 00000377777777LL +#define MANT 00000777777777LL +#define EXPO 00377000000000LL +#define DFMASK 01777777777777777777777LL +#define DSMASK 01000000000000000000000LL +#define DCMASK 00777777777777777777777LL +#define DNMASK 00400000000000000000000LL +#define DXMASK 00200000000000000000000LL +#define FPSMASK 00040000000000000000000LL +#define FPNMASK 00001000000000000000000LL +#define FPFMASK 00077777777777777777777LL +#define FPCMASK 00000777777777777777777LL #define CM(x) (FMASK ^ (x)) @@ -161,6 +161,7 @@ extern DEBTAB dev_debug[]; #define TRP1 000004 #define TRP2 000010 #define ADRFLT 000020 +//#define PUBLIC 000000 #define PUBLIC 000040 #else #define TRP1 000000 diff --git a/PDP10/ka10_dp.c b/PDP10/ka10_dp.c index b9701d6..778c196 100644 --- a/PDP10/ka10_dp.c +++ b/PDP10/ka10_dp.c @@ -60,37 +60,37 @@ /* CONI/CONO Flags */ -#define SUF_ERR 0000000000100 -#define SEC_ERR 0000000000200 -#define ILL_CMD 0000000000400 -#define ILL_WR 0000000001000 -#define NOT_RDY 0000000002000 /* Clear CXR */ -#define PRT_ERR 0000000004000 /* 14-17 Clear CCPE, DSPE, DISK WDPE, CDPE */ -#define NXM_ERR 0000000010000 -#define SLW_CHN 0000000020000 -#define SRC_ERR 0000000040000 -#define PWR_FAIL_10 0000000100000 -#define END_CYL 0000000200000 /* No effect */ -#define SRC_DONE 0000000400000 /* No effect */ -#define DSK_PRTY 0000001000000 /* No effect */ -#define CHN_PRTY 0000002000000 /* No effect */ -#define SEC_PRTY 0000004000000 /* No effect */ -#define CCW_PRTY 0000010000000 /* No effect */ -#define B22_FLAG +#define SUF_ERR 0000000000100LL +#define SEC_ERR 0000000000200LL +#define ILL_CMD 0000000000400LL +#define ILL_WR 0000000001000LL +#define NOT_RDY 0000000002000LL /* Clear CXR */ +#define PRT_ERR 0000000004000LL /* 14-17 Clear CCPE, DSPE, DISK WDPE, CDPE */ +#define NXM_ERR 0000000010000LL +#define SLW_CHN 0000000020000LL +#define SRC_ERR 0000000040000LL +#define PWR_FAIL_10 0000000100000LL +#define END_CYL 0000000200000LL /* No effect */ +#define SRC_DONE 0000000400000LL /* No effect */ +#define DSK_PRTY 0000001000000LL /* No effect */ +#define CHN_PRTY 0000002000000LL /* No effect */ +#define SEC_PRTY 0000004000000LL /* No effect */ +#define CCW_PRTY 0000010000000LL /* No effect */ +#define B22_FLAG 0000020000000LL -#define CLRMSK 0000000177710 -#define CLRMSK2 0000176000000 +#define CLRMSK 0000000177710LL +#define CLRMSK2 0000176000000LL /* DATAI/DATAO */ -#define DWPE_STOP 0000000001000 -#define SPARE 0000000002000 -#define DSPE_STOP 0000000004000 -#define SECTOR 0000000170000 -#define CYL256 0000000200000 -#define SURFACE 0000017400000 -#define CYL 0007760000000 -#define DRIVE 0070000000000 -#define OP 0700000000000 +#define DWPE_STOP 0000000001000LL +#define SPARE 0000000002000LL +#define DSPE_STOP 0000000004000LL +#define SECTOR 0000000170000LL +#define CYL256 0000000200000LL +#define SURFACE 0000017400000LL +#define CYL 0007760000000LL +#define DRIVE 0070000000000LL +#define OP 0700000000000LL #define RD 0 #define WR 1 @@ -101,21 +101,21 @@ #define NO 6 #define RC 7 -#define ATTN 0000000000776 -#define DEFECT 0000000001000 -#define SEL_RP03 0000000002000 -#define SEL_CYL256 0000000004000 -#define SEL_SPARE 0000000010000 -#define SEL_SEC 0000000760000 -#define WR_HD_LK 0000001000000 -#define RD_ONLY 0000002000000 -#define NO_DRIVE 0000004000000 -#define FILE_UNSAFE 0000010000000 -#define DRV_ONLINE 0000020000000 -#define ON_CYL 0000040000000 -#define SEEK_INC 0000100000000 -#define SEL_CYL 0077600000000 -#define SEL_DRIVE 0700000000000 +#define ATTN 0000000000776LL +#define DEFECT 0000000001000LL +#define SEL_RP03 0000000002000LL +#define SEL_CYL256 0000000004000LL +#define SEL_SPARE 0000000010000LL +#define SEL_SEC 0000000760000LL +#define WR_HD_LK 0000001000000LL +#define RD_ONLY 0000002000000LL +#define NO_DRIVE 0000004000000LL +#define FILE_UNSAFE 0000010000000LL +#define DRV_ONLINE 0000020000000LL +#define ON_CYL 0000040000000LL +#define SEEK_INC 0000100000000LL +#define SEL_CYL 0077600000000LL +#define SEL_DRIVE 0700000000000LL #define RP01_DTYPE 0 #define RP01_SECT 5 @@ -337,12 +337,12 @@ t_stat dp_devio(uint32 dev, uint64 *data) { uptr = &dp_unit[(ctlr * NUM_UNITS_DP) + unit]; switch(dev & 3) { case CONI: - *data = df10->status | uptr->STATUS; -#if KI10_22BIT + *data = (uint64)(df10->status | uptr->STATUS); +#if KI_22BIT *data |= B22_FLAG; #endif - sim_debug(DEBUG_CONI, dptr, "DP %03o CONI %06o %d PC=%o\n", dev, - (uint32)*data, ctlr, PC); + sim_debug(DEBUG_CONI, dptr, "DP %03o CONI %012llo %d PC=%o\n", dev, + *data, ctlr, PC); return SCPE_OK; case CONO: diff --git a/PDP10/ka10_mt.c b/PDP10/ka10_mt.c index 7066d0f..c20fa84 100644 --- a/PDP10/ka10_mt.c +++ b/PDP10/ka10_mt.c @@ -257,7 +257,7 @@ t_stat mt_devio(uint32 dev, uint64 *data) { res = status; if ((dptr->flags & MTDF_MOTION) == 0) res |= IDLE_UNIT; -#if KI10_22BIT +#if KI_22BIT res |= B22_FLAG; #endif *data = res; diff --git a/PDP10/ka10_rc.c b/PDP10/ka10_rc.c index 28c731e..b629c82 100644 --- a/PDP10/ka10_rc.c +++ b/PDP10/ka10_rc.c @@ -52,39 +52,38 @@ #define UFLAGS u5 /* Function */ -#define DISK_SEL 0600000000000 -#define TRACK 0177600000000 -#define SEGMENT 0000177000000 -#define INIT_PAR 0000000770000 // Read -#define DPE_STOP 0000000004000 -#define CPE_STOP 0000000002000 -#define WRITE 0000000001000 -#define ICWA 0000000000776 -#define EPAR 0000000000001 -#define SEC_SEL 0000000001400 // Read -#define SECT_CNT 0000000000377 // Read +#define DISK_SEL 0600000000000LL +#define TRACK 0177600000000LL +#define SEGMENT 0000177000000LL +#define INIT_PAR 0000000770000LL /* Read */ +#define DPE_STOP 0000000004000LL +#define CPE_STOP 0000000002000LL +#define WRITE 0000000001000LL +#define EPAR 0000000000001LL +#define SEC_SEL 0000000001400LL /* Read */ +#define SECT_CNT 0000000000377LL /* Read */ #define PI 0000007 #define WCW 0000040 #define SEC_SCTR 0600000 -#define RST_MSK 0000000177710 /* CONO reset bits */ -#define B22_FLAG 0040000000000 /* 22 bit controller. */ -#define MAINT_SEG 0010000000000 -#define PRTLT 0004000000000 /* Protected area less then bounds */ -#define STS 0003777000000 -#define SCRCHCMP 0000000400000 /* Tranfer in progress. */ -#define S_ERROR 0000000200000 /* Segment not found */ -#define DSK_DES_E 0000000100000 /* Duplicate disk */ -#define TRK_SEL_E 0000000040000 /* Track not BCD number */ -#define NOT_RDY 0000000020000 /* Drive not ready */ -#define PSW_FAIL 0000000010000 /* Power supply fail */ -#define DSK_PAR_E 0000000004000 /* Disk Parity Error */ -#define CH_PAR_D 0000000002000 /* Channel Data Parity Error */ -#define CH_PAR_C 0000000001000 /* Channel Control Parity Error */ -#define NXM_ERR 0000000000400 /* Non existant memory */ -#define ILL_WR 0000000000200 /* Write to protected area */ -#define OVRRUN 0000000000100 /* Over run */ +#define RST_MSK 0000000177710LL /* CONO reset bits */ +#define B22_FLAG 0040000000000LL /* 22 bit controller. */ +#define MAINT_SEG 0010000000000LL +#define PRTLT 0004000000000LL /* Protected area less then bounds */ +#define STS 0003777000000LL +#define SCRCHCMP 0000000400000LL /* Tranfer in progress. */ +#define S_ERROR 0000000200000LL /* Segment not found */ +#define DSK_DES_E 0000000100000LL /* Duplicate disk */ +#define TRK_SEL_E 0000000040000LL /* Track not BCD number */ +#define NOT_RDY 0000000020000LL /* Drive not ready */ +#define PSW_FAIL 0000000010000LL /* Power supply fail */ +#define DSK_PAR_E 0000000004000LL /* Disk Parity Error */ +#define CH_PAR_D 0000000002000LL /* Channel Data Parity Error */ +#define CH_PAR_C 0000000001000LL /* Channel Control Parity Error */ +#define NXM_ERR 0000000000400LL /* Non existant memory */ +#define ILL_WR 0000000000200LL /* Write to protected area */ +#define OVRRUN 0000000000100LL /* Over run */ #define RD10_DTYPE 0 #define RD10_WDS 32 @@ -209,7 +208,7 @@ t_stat rc_devio(uint32 dev, uint64 *data) { switch(dev & 3) { case CONI: *data = df10->status; -#if KI10_22BIT +#if KI_22BIT *data |= B22_FLAG; #endif sim_debug(DEBUG_CONI, dptr, "HK %03o CONI %06o PC=%o\n", dev, diff --git a/PDP10/ka10_rp.c b/PDP10/ka10_rp.c index 01f9f6f..598ec1d 100644 --- a/PDP10/ka10_rp.c +++ b/PDP10/ka10_rp.c @@ -476,7 +476,7 @@ t_stat rp_devio(uint32 dev, uint64 *data) { *data |= IADR_ATTN; if (rp_rae[ctlr] != 0 && (df10->status & IARD_RAE)) *data |= IARD_RAE; -#if KI10_22BIT +#if KI_22BIT *data |= B22_FLAG; #endif sim_debug(DEBUG_CONI, dptr, "RP %03o CONI %06o PC=%o %o\n",