From 45a492dacf396614e863dcc16ac409e3d3895b3b Mon Sep 17 00:00:00 2001
From: Lars Brinkhoff <lars@nocrew.org>
Date: Fri, 5 Oct 2018 13:48:07 +0200
Subject: [PATCH 1/2] KA10: Rearrange interrupt handling for Type 340 display.

---
 PDP10/kx10_dpy.c | 30 +++++++++++++++++-------------
 1 file changed, 17 insertions(+), 13 deletions(-)

diff --git a/PDP10/kx10_dpy.c b/PDP10/kx10_dpy.c
index 4fb94b4..359949c 100644
--- a/PDP10/kx10_dpy.c
+++ b/PDP10/kx10_dpy.c
@@ -181,10 +181,23 @@ const char *dpy_description (DEVICE *dptr)
 /* until it's done just one place! */
 static void dpy_set_int_done(UNIT *uptr)
 {
-    uptr->STAT_REG |= CONI_INT_DONE;
     uptr->INT_COUNTDOWN = INT_COUNT;
 }
 
+/* update interrupt request */
+static void check_interrupt (UNIT *uptr)
+{
+    if (uptr->STAT_REG & CONI_INT_SPEC) {
+        uint32 sc = uptr->STAT_REG & CONX_SC;
+        set_interrupt(DPY_DEVNUM, sc >> CONX_SC_SHIFT);
+    } else if (uptr->STAT_REG & CONI_INT_DONE) {
+        uint32 dc = uptr->STAT_REG & CONX_DC;
+        set_interrupt(DPY_DEVNUM, dc>>CONX_DC_SHIFT);
+    } else {
+        clr_interrupt(DPY_DEVNUM);
+    }
+}
+
 /* return true if display not stopped */
 int dpy_update_status (UNIT *uptr, ty340word status, int done)
 {
@@ -199,12 +212,7 @@ int dpy_update_status (UNIT *uptr, ty340word status, int done)
         /* XXX also set in "rfd" callback: decide! */
         dpy_set_int_done(uptr);
     }
-    if (uptr->STAT_REG & CONI_INT_SPEC) {
-        uint32 sc = uptr->STAT_REG & CONX_SC;
-        if (sc) {                       /* PI channel set? */
-            set_interrupt(DPY_DEVNUM, sc >> CONX_SC_SHIFT);
-        }
-    }
+    check_interrupt(uptr);
     return running;
 }
 
@@ -287,12 +295,8 @@ t_stat dpy_svc (UNIT *uptr)
     display_age(DPY_CYCLE_US, 0);       /* age the display */
 
     if (uptr->INT_COUNTDOWN && --uptr->INT_COUNTDOWN == 0) {
-        if (uptr->STAT_REG & CONI_INT_DONE) { /* delayed int? */
-            uint32 dc = uptr->STAT_REG & CONX_DC;
-            if (dc) {   /* PI channel set? */
-                set_interrupt(DPY_DEVNUM, dc>>CONX_DC_SHIFT);
-            }
-        }
+        uptr->STAT_REG |= CONI_INT_DONE;
+        check_interrupt (uptr);
     }
     return SCPE_OK;
 }

From 054a92d133ff9212205ffc31e9d59c58d64286c9 Mon Sep 17 00:00:00 2001
From: Lars Brinkhoff <lars@nocrew.org>
Date: Fri, 5 Oct 2018 13:49:12 +0200
Subject: [PATCH 2/2] KA10: Tune delay for Type 340 data interrupt.

---
 PDP10/kx10_dpy.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/PDP10/kx10_dpy.c b/PDP10/kx10_dpy.c
index 359949c..a2111dc 100644
--- a/PDP10/kx10_dpy.c
+++ b/PDP10/kx10_dpy.c
@@ -117,7 +117,7 @@ extern uint64 SW;        /* switch register */
  * number of DPY_CYCLES to delay int
  * too small and host CPU doesn't run enough!
  */
-#define INT_COUNT       (500/DPY_CYCLE_US)
+#define INT_COUNT       (100/DPY_CYCLE_US)
 
 #define STAT_REG        u3
 #define INT_COUNTDOWN   u4