mirror of
https://github.com/rcornwell/sims.git
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SEL32: Change DPII disk initialization for UTX umap data.
SEL32: Adjust console timing. SEL32: Revise HIO support code.
This commit is contained in:
AZBevier
parent
60b8848191
commit
454bc6feb3
@ -1426,6 +1426,7 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */
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}
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chp->chan_byte = BUFF_CHNEND; /* thats all the data we want */
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#ifndef TRY_THIS_02282020
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/* see if we have a haltio device entry */
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if (dibp->halt_io != NULL) { /* NULL if no haltio function */
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/* call the device controller to get halt_io status */
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@ -1453,7 +1454,9 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */
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chp->ccw_count = 0; /* force zero count */
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dev_status[chsa] = 0; /* no device status */
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if (CPU_MODEL >= MODEL_V6) {
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#ifndef TRY_02282020
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//WAS0229 if (CPU_MODEL >= MODEL_V6) {
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if (CPU_MODEL >= MODEL_27) {
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/* UTX wants the status posted now, MPX wants interrupt */
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/* the channel is not busy, see if any status to post */
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@ -1474,25 +1477,29 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */
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"haltxio 1 FIFO status stored OK, sw1 %08x sw2 %08x\n", sw1, sw2);
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irq_pend = 1; /* still pending int */
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// UTX likes this return and does not panic */
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// The diag's want an interrupt generated, so want
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*status = CC2BIT; /* status stored from SIO, so CC2 */
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// The diag's want an interrupt generated, so wait
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*status = CC2BIT; /* status stored from HIO, so CC2 */
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/* if 0 returned, UTX hans on input */
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goto hioret; /* CC2 and OK */
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}
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/* nothing going on, so say all OK */
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*status = CC1BIT; /* request accepted, no status, so CC1 */
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//TRYIED *status = 0; /* CCs = 0, accepted */
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goto hioret; /* CC2 and OK */
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} else {
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} else
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#endif
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{
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sim_debug(DEBUG_IRQ, &cpu_dev,
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"haltxio FIFO 2 status stored OK, sw1 %08x sw2 %08x\n", sw1, sw2);
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irq_pend = 1; /* still pending int */
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//TUE *status = 0; /* request accepted, no status, so CC1 */
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/*TUE*/ *status = CC1BIT; /* request accepted, no status, so CC1 */
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/*LAST*/ *status = CC1BIT; /* request accepted, no status, so CC1 */
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//TRIED *status = CC2BIT; /* sub channel status posted, CC2BIT */
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goto hioret; /* CC2 and OK */
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}
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} else {
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/* we have completed the I/O without error */
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/* the channel is not busy, so return OK */
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*status = 0; /* CCs = 0, accepted */
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//WAS *status = 0; /* CCs = 0, accepted */
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sim_debug(DEBUG_CMD, &cpu_dev,
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"$$$ HALTIO good return chsa %04x chan %04x cmd %02x flags %04x status %04x\n",
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chsa, chan, chp->ccw_cmd, chp->ccw_flags, *status);
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@ -1500,24 +1507,28 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */
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goto hioret; /* just return */
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}
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}
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#endif /*TRY_THIS_02282020*/
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/* device does not have a HIO entry, so terminate the I/O */
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/* check for a Command or data chain operation in progresss */
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if (chp->ccw_cmd != 0 || (chp->ccw_flags & (FLAG_DC|FLAG_CC)) != 0) {
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sim_debug(DEBUG_XIO, &cpu_dev, "haltxio busy return CC4 chsa %04x chan %04x\n", chsa, chan);
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/* reset the DC or CC bits to force completion after current IOCD */
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chp->ccw_flags &= ~(FLAG_DC|FLAG_CC); /* reset chaining bits */
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dev_status[chsa] |= STATUS_ECHO; /* show we stopped the cmd */
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//CHG dev_status[chsa] |= STATUS_ECHO; /* show we stopped the cmd */
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/*ADD*/ chp->ccw_count = 0; /* clear remaining count */
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chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* show I/O complete */
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/*ADD*/ chp->chan_status &= ~STATUS_LENGTH; /* remove SLI status bit */
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store_csw(chp); /* store the status in the inch status dw */
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chp->chan_status &= ~STATUS_PCI; /* remove PCI status bit */
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dev_status[chsa] = 0; /* no device status */
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irq_pend = 1; /* still pending int */
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*status = CC2BIT; /* sub channel status posted, CC2BIT */
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//TRY *status = CC1BIT; /* request accepted, no status, so CC1 */
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goto hioret; /* just return */
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}
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/* the channel is not busy, so return OK */
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*status = CC1BIT; /* request accepted, no status, so CC1 */
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goto hioret; /* just busy CC4 */
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goto hioret; /* just return */
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hioret:
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sim_debug(DEBUG_CMD, &cpu_dev, "$$$ HIO END chsa %04x chan %04x cmd %02x flags %04x status %04x\n",
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@ -160,7 +160,8 @@ void rtc_setup(uint32 ss, uint32 level)
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t_stat rtc_reset(DEVICE *dptr)
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{
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rtc_pie = 0; /* disable pulse */
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rtc_unit.wait = sim_rtcn_init_unit(&rtc_unit, rtc_unit.wait, TMR_RTC); /* initialize clock calibration */
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/* initialize clock calibration */
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rtc_unit.wait = sim_rtcn_init_unit(&rtc_unit, rtc_unit.wait, TMR_RTC);
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sim_activate (&rtc_unit, rtc_unit.wait); /* activate unit */
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return SCPE_OK;
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}
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@ -48,6 +48,7 @@ extern void set_devattn(uint16 addr, uint8 flags);
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extern void post_extirq(void);
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extern uint32 attention_trap; /* set when trap is requested */
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extern void set_devwake(uint16 addr, uint8 flags);
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extern int test_write_byte_end(uint16 chsa);
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extern DEVICE *get_dev(UNIT *uptr);
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extern t_stat set_inch(UNIT *uptr, uint32 inch_addr); /* set channel inch address */
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extern CHANP *find_chanp_ptr(uint16 chsa); /* find chanp pointer */
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@ -190,8 +191,12 @@ uint8 con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
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int unit = (uptr - con_unit); /* unit 0,1 */
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uint8 ch;
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if ((uptr->CMD & CON_MSK) != 0) /* is unit busy */
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if ((uptr->CMD & CON_MSK) != 0) { /* is unit busy */
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sim_debug(DEBUG_CMD, &con_dev,
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"con_startcmd unit %01x chan %02x cmd %02x BUSY cmd %02x\n",
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unit, chan, cmd, uptr->CMD);
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return SNS_BSY; /* yes, return busy */
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}
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sim_debug(DEBUG_CMD, &con_dev,
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"con_startcmd unit %01x chan %02x cmd %02x enter\n", unit, chan, cmd);
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@ -202,7 +207,8 @@ uint8 con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
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uptr->CMD &= LMASK; /* leave only chsa */
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uptr->CMD |= CON_INCH2; /* save INCH command as 0xf0 */
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uptr->SNS = SNS_RDY|SNS_ONLN; /* status is online & ready */
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sim_activate(uptr, 10); /* start us off */
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sim_activate(uptr, 20); /* start us off */
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//WAS sim_activate(uptr, 10); /* start us off */
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return 0; /* no status change */
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break;
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@ -309,10 +315,10 @@ t_stat con_srvo(UNIT *uptr) {
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if (unit == 1) {
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uptr->SNS |= SNS_CMDREJ; /* command rejected */
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uptr->CMD &= LMASK; /* nothing left, command complete */
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//DIAG_TUE chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); /* unit check */
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chan_end(chsa, SNS_CHNEND|SNS_UNITCHK); /* unit check */
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sim_debug(DEBUG_CMD, &con_dev,
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"con_srvo Read to output device chsa %04x cmd = %02x\n", chsa, cmd);
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//DIAG_TUE chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); /* unit check */
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chan_end(chsa, SNS_CHNEND|SNS_UNITCHK); /* unit check */
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return SCPE_OK;
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}
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}
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@ -343,10 +349,10 @@ t_stat con_srvo(UNIT *uptr) {
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/* Write to device */
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if (chan_read_byte(chsa, &ch)) { /* get byte from memory */
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uptr->CMD &= LMASK; /* nothing left, command complete */
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chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
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sim_debug(DEBUG_CMD, &con_dev,
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"con_srvo write %02x chsa %04x cmd %02x complete\n",
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ch, chsa, cmd);
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chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
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} else {
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/* HACK HACK HACK */
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ch &= 0x7f; /* make 7 bit w/o parity */
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@ -354,14 +360,19 @@ t_stat con_srvo(UNIT *uptr) {
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if (ch == 0) /* do not pass a null char */
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//WAS ch = '@'; /* stop simh abort .... */
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ch = ' '; /* stop simh abort .... */
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#ifndef ALLOW_ESC
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if (((ch >= 0x20) && (ch <= 0x7e)) || (ch == '\r') || (ch == '\n'))
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cp = ch;
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else
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cp = '^';
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sim_debug(DEBUG_CMD, &con_dev,
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"con_srvo write %01x: putch 0x%02x %c\n", unit, ch, cp);
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//WAS sim_putchar(ch); /* output next char to device */
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sim_putchar(cp); /* output next char to device */
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sim_putchar(ch); /* output next char to device */
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//OLD sim_putchar(cp); /* output next char to device */
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#else
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sim_putchar(ch); /* output next char to device */
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//WAS sim_putchar(cp); /* output next char to device */
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#endif
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sim_activate(uptr, 20); /* keep going */
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}
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}
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@ -377,7 +388,8 @@ t_stat con_srvi(UNIT *uptr) {
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uint8 ch;
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t_stat r;
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sim_debug(DEBUG_DETAIL, &con_dev, "con_srvi enter chsa %04x cmd = %02x\n", chsa, cmd);
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sim_debug(DEBUG_DETAIL, &con_dev,
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"con_srvi enter chsa %04x cmd %02x ccw_count %02x\n", chsa, cmd, chp->ccw_count);
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/* if output tried to input device, error */
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if ((cmd == CON_RWD) || (cmd == CON_WR) || (cmd == 0x0C)) { /* check for output */
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@ -387,16 +399,17 @@ t_stat con_srvi(UNIT *uptr) {
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if (unit == 0) {
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uptr->SNS |= SNS_CMDREJ; /* command rejected */
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uptr->CMD &= LMASK; /* nothing left, command complete */
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//DIAGTUE chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); /* unit check */
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chan_end(chsa, SNS_CHNEND|SNS_UNITCHK); /* unit check */
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sim_debug(DEBUG_CMD, &con_dev,
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"con_srvi Write to input device chsa %04x cmd = %02x\n", chsa, cmd);
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//DIAGTUE chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); /* unit check */
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chan_end(chsa, SNS_CHNEND|SNS_UNITCHK); /* unit check */
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//fall thru return SCPE_OK;
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}
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}
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#ifdef JUNK
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if (cmd == 0x0C) { /* unknown has to do nothing */
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sim_debug(DEBUG_CMD, &con_dev, "con_srvi Unknown (0x0C) chsa %04x cmd = %02x\n", chsa, cmd);
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uptr->CMD &= LMASK; /* command complete */
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chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
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return SCPE_OK;
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}
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@ -415,8 +428,8 @@ t_stat con_srvi(UNIT *uptr) {
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sim_debug(DEBUG_CMD, &con_dev,
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"con_srvi INCH chsa %04x len %02x inch %06x\n", chsa, len, mema);
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chan_end(chsa, SNS_CHNEND); /* INCH done */
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// chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
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//TRY228 chan_end(chsa, SNS_CHNEND); /* INCH done */
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chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
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} else {
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sim_debug(DEBUG_CMD, &con_dev,
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"con_srvi NOP chsa %04x cmd = %02x\n", chsa, cmd);
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@ -425,6 +438,8 @@ t_stat con_srvi(UNIT *uptr) {
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/* drop through to poll input */
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}
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#define MOVE_CODE
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#ifdef MOVE_CODE
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switch (cmd) {
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case CON_RD: /* 0x02 */ /* read from device */
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@ -433,22 +448,29 @@ t_stat con_srvi(UNIT *uptr) {
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int len = chp->ccw_count; /* get command count */
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ch = con_data[unit].ibuff[uptr->u4++]; /* get char from read buffer */
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sim_debug(DEBUG_CMD, &con_dev,
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"con_srvi unit %02x: read %02x incnt %02x u4 %02x len %02x\n",
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"con_srvi readbuf unit %02x: read %02x incnt %02x u4 %02x len %02x\n",
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unit, ch, con_data[unit].incnt, uptr->u4, len);
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if (chan_write_byte(chsa, &ch)) { /* write byte to memory */
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con_data[unit].incnt = 0; /* buffer empty */
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cmd = 0; /* no cmd either */
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// uptr->u4 = 0; /* no I/O yet */
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sim_debug(DEBUG_CMD, &con_dev,
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"con_srvi write to mem unit %02x: read %02x u4 %02x ccw_count %02x\n",
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unit, ch, uptr->u4, chp->ccw_count);
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uptr->u4 = 0; /* no I/O yet */
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uptr->CMD &= LMASK; /* nothing left, command complete */
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chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
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} else {
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if (test_write_byte_end(chsa)) { /* see if read request complete */
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// len = chp->ccw_count; /* INCH command count */
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// if ((len==0) && uptr->u4 == con_data[unit].incnt) { /* read completed */
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if (uptr->u4 == con_data[unit].incnt) { /* read completed */
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// if (uptr->u4 == con_data[unit].incnt) { /* read completed */
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con_data[unit].incnt = 0; /* buffer is empty */
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cmd = 0; /* no cmd either */
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// uptr->u4 = 0; /* no I/O yet */
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sim_debug(DEBUG_CMD, &con_dev,
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"con_srvi write nothing to mem unit %02x: u4 %02x ccw_count %02x\n",
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unit, uptr->u4, chp->ccw_count);
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uptr->u4 = 0; /* no I/O yet */
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uptr->CMD &= LMASK; /* nothing left, command complete */
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chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
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}
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@ -457,11 +479,12 @@ t_stat con_srvi(UNIT *uptr) {
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// default:
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break;
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}
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#endif
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/* check for next input if reading or @@A sequence */
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r = sim_poll_kbd(); /* poll for a char */
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if (r & SCPE_KFLAG) { /* got a char */
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ch = r & 0377; /* drop any extra bits */
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ch = r & 0xff; /* drop any extra bits */
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#ifdef LEAVE_LOWER
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if ((ch >= 'a') && (ch <= 'z'))
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ch &= 0xdf; /* make upper case */
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@ -470,6 +493,8 @@ t_stat con_srvi(UNIT *uptr) {
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atbuf = 0; /* reset attention buffer */
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if (ch == '\n') /* convert newline */
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ch = '\r'; /* make newline into carriage return */
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#define DO_NO_CASE
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#ifdef DO_NO_CASE
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/* Handle end of buffer */
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switch (ch) {
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#ifdef ONE_AT_A_TIME
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@ -497,14 +522,52 @@ t_stat con_srvi(UNIT *uptr) {
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uptr->CMD |= CON_CR; /* C/R received */
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/* fall through */
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default:
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#endif /* DO_NO_CASE */
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#ifdef MOVE_CODE
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if (con_data[unit].incnt < sizeof(con_data[unit].ibuff)) {
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if (uptr->CMD & CON_EKO) /* ECHO requested */
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sim_putchar(ch); /* ECHO the char */
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con_data[unit].ibuff[con_data[unit].incnt++] = ch;
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uptr->CMD |= CON_INPUT; /* we have a char available */
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sim_debug(DEBUG_CMD, &con_dev,
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"con_srvi readch unit %02x: read %02x u4 %02x ccw_count %02x\n",
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unit, ch, uptr->u4, chp->ccw_count);
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#else
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//MOVE if (con_data[unit].incnt < sizeof(con_data[unit].ibuff)) {
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if (uptr->CMD & CON_EKO) /* ECHO requested */
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sim_putchar(ch); /* ECHO the char */
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//MOVE con_data[unit].ibuff[con_data[unit].incnt++] = ch;
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//MOVE uptr->CMD |= CON_INPUT; /* we have a char available */
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#endif
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#ifndef MOVE_CODE
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// CON_RD: /* 0x02 */ /* read from device */
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// CON_ECHO: /* 0x0a */ /* read from device w/ECHO */
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sim_debug(DEBUG_CMD, &con_dev,
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"con_srvi unit %02x: read %02x u4 %02x ccw_count %02x\n",
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unit, ch, uptr->u4, chp->ccw_count);
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if (chan_write_byte(chsa, &ch)) { /* write byte to memory */
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cmd = 0; /* no cmd left */
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uptr->CMD &= LMASK; /* nothing left, command complete */
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chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
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} else
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//WAS if (chp->ccw_count == 0) {
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if (test_write_byte_end(chsa)) { /* see if read request complete */
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cmd = 0; /* no cmd left */
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uptr->CMD &= LMASK; /* nothing left, command complete */
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chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
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}
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/* We are still looking for input */
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sim_debug(DEBUG_CMD, &con_dev,
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"con_srvi still looking unit %02x: read %02x u4 %02x ccw_count %02x\n",
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unit, ch, uptr->u4, chp->ccw_count);
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#else
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}
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#endif
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#ifdef DO_NO_CASE
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break;
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}
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#endif /* DO_NO_CASE */
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} else {
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/* look for attention sequence '@@A' */
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if (ch == '@' || ch == 'A' || ch == 'a') {
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@ -532,9 +595,12 @@ t_stat con_srvi(UNIT *uptr) {
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if ((r & SCPE_KFLAG) && /* got something and */
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((cmd == CON_RD) || (cmd == CON_ECHO))) /* looking for input */
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//WAS return sim_activate (uptr, 20);
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return sim_activate (uptr, 100);
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return sim_activate (uptr, 500);
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//WAS return tmxr_clock_coschedule_tmr (uptr, TMR_RTC, 1); /* come back soon */
|
||||
//WAS2 return sim_activate (uptr, 100);
|
||||
//WAS3 return sim_activate (uptr, 50);
|
||||
//LAST return sim_activate (uptr, 200);
|
||||
return sim_activate (uptr, 40);
|
||||
//TRY return sim_activate (uptr, 500);
|
||||
return tmxr_clock_coschedule_tmr (uptr, TMR_RTC, 1); /* come back soon */
|
||||
}
|
||||
|
||||
t_stat con_reset(DEVICE *dptr) {
|
||||
@ -547,7 +613,9 @@ uint8 con_haltio(UNIT *uptr) {
|
||||
uint16 chsa = GET_UADDR(uptr->CMD);
|
||||
int cmd = uptr->CMD & CON_MSK;
|
||||
int unit = (uptr - con_unit); /* unit # 0 is read, 1 is write */
|
||||
uint8 ch;
|
||||
uint8 ch = 0x20; /* dummy space char for outstanding input */
|
||||
CHANP *chp = find_chanp_ptr(chsa); /* find the chanp pointer */
|
||||
// int len = chp->ccw_count; /* command byte count */
|
||||
|
||||
sim_debug(DEBUG_EXP, &con_dev, "con_haltio enter chsa %04x cmd = %02x\n", chsa, cmd);
|
||||
|
||||
@ -558,30 +626,49 @@ uint8 con_haltio(UNIT *uptr) {
|
||||
/* terminate any input command */
|
||||
if ((uptr->CMD & CON_MSK) != 0) { /* is unit busy */
|
||||
sim_debug(DEBUG_CMD, &con_dev,
|
||||
"con_haltio HIO chsa %04x cmd = %02x\n", chsa, cmd);
|
||||
"con_haltio HIO chsa %04x cmd = %02x ccw_count %02x\n", chsa, cmd, chp->ccw_count);
|
||||
if (unit == 0) {
|
||||
if (chan_write_byte(chsa, &ch)) { /* write byte to memory */
|
||||
// new code 2/28/2020
|
||||
if (test_write_byte_end(chsa)) { /* see if read request complete */
|
||||
chan_write_byte(chsa, &ch); /* write fake byte to memory */
|
||||
con_data[unit].incnt = 0; /* buffer empty */
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
|
||||
// chp->ccw_count = 0; /* zero command count */
|
||||
sim_debug(DEBUG_CMD, &con_dev,
|
||||
"con_haltio HIO I/O stop chsa %04x cmd = %02x\n", chsa, cmd);
|
||||
"con_haltio HIO I/O stop chsa %04x cmd %02x ccw_count %02x\n",
|
||||
chsa, cmd, chp->ccw_count);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
|
||||
// return SCPE_OK; /* not busy anymore */
|
||||
return SCPE_IOERR;
|
||||
}
|
||||
#ifdef NOT_NOW
|
||||
else
|
||||
if (chan_write_byte(chsa, &ch)) { /* write fake byte to memory */
|
||||
con_data[unit].incnt = 0; /* buffer is empty */
|
||||
sim_debug(DEBUG_CMD, &con_dev,
|
||||
"con_haltio write nothing to mem unit %02x: u4 %02x ccw_count %02x\n",
|
||||
unit, uptr->u4, chp->ccw_count);
|
||||
uptr->u4 = 0; /* no I/O yet */
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
|
||||
//WAS return SCPE_IOERR;
|
||||
}
|
||||
#endif
|
||||
} else {
|
||||
if (chp->ccw_count > 0) {
|
||||
if (chan_read_byte(chsa, &ch)) { /* get byte from memory */
|
||||
uptr->CMD &= LMASK; /* nothing left, command complete */
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
|
||||
sim_debug(DEBUG_CMD, &con_dev,
|
||||
"con_haltio HIO I/O stop chsa %04x cmd = %02x\n", chsa, cmd);
|
||||
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
|
||||
// return SCPE_OK; /* not busy anymore */
|
||||
return SCPE_IOERR;
|
||||
}
|
||||
}
|
||||
}
|
||||
uptr->CMD &= LMASK; /* make non-busy */
|
||||
uptr->SNS = SNS_RDY|SNS_ONLN; /* status is online & ready */
|
||||
return SCPE_OK; /* not busy */
|
||||
return SCPE_OK; /* not busy */
|
||||
//no work chan_end(chsa, SNS_CHNEND|SNS_UNITCHK); /* write terminated */
|
||||
// chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); /* write terminated */
|
||||
// chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITEXP); /* done bit 15 */ /* bad status */
|
||||
|
||||
@ -1424,6 +1424,11 @@ t_stat RealAddr(uint32 addr, uint32 *realaddr, uint32 *prot, uint32 access)
|
||||
else
|
||||
if (access == MEM_WR)
|
||||
TRAPSTATUS |= BIT2; /* set bit 2 of trap status */
|
||||
/* returning this error fails test 34/2 of mmm diag */
|
||||
/*NEW*/// return MAPFLT; /* map fault error on memory access */
|
||||
/*NEW*/// return MACHINECHK_TRAP; /* diags want machine check error */
|
||||
/* returning this error fixes 34/2, but still fails 46/2 */
|
||||
return NPMEM; /* none present memory error */
|
||||
} else
|
||||
TRAPSTATUS |= BIT28; /* set bit 28 of trap status */
|
||||
return NPMEM; /* none present memory error */
|
||||
@ -1488,6 +1493,10 @@ t_stat RealAddr(uint32 addr, uint32 *realaddr, uint32 *prot, uint32 access)
|
||||
// 32/97 wants MAPFLT for test 37/1 in CN.MMM
|
||||
TRAPSTATUS |= BIT12; /* set bit 12 of trap status */
|
||||
return MAPFLT; /* no, map fault error */
|
||||
/*TRY*/// return NPMEM; /* no, none present memory error */
|
||||
/*TRY*/// return MACHINECHK_TRAP; /* diags want machine check error */
|
||||
/*TRY*/// return SYSTEMCHK_TRAP; /* diags want machine check error */
|
||||
/*TRY*/// return PRIVVIOL_TRAP; /* set the trap to take */
|
||||
// if (access == MEM_RD)
|
||||
// TRAPSTATUS |= BIT1; /* set bit 1 of trap status */
|
||||
// else
|
||||
|
||||
@ -813,7 +813,16 @@ t_stat disk_srv(UNIT *uptr)
|
||||
sim_activate(uptr, 20);
|
||||
break;
|
||||
} else {
|
||||
/* we have wasted enough time, we there */
|
||||
/* we have wasted enough time, we are there */
|
||||
#ifndef DO_SEEK_AGAIN
|
||||
/* calculate file position in bytes of requested sector */
|
||||
/* file offset in bytes */
|
||||
tstart = STAR2SEC(uptr->STAR, SPT(type), SPC(type)) * SSB(type);
|
||||
/* just reseek to the location where we will r/w data */
|
||||
if ((sim_fseek(uptr->fileref, tstart, SEEK_SET)) != 0) { /* do seek */
|
||||
sim_debug(DEBUG_DETAIL, dptr, "disk_srv Error on seek to %04x\n", tstart);
|
||||
}
|
||||
#endif
|
||||
uptr->CHS = uptr->STAR; /* we are there */
|
||||
sim_activate(uptr, 10);
|
||||
break;
|
||||
@ -1027,7 +1036,7 @@ rezero:
|
||||
uptr->CHS = disksec2star(tstart, type);
|
||||
/* see of over end of disk */
|
||||
// if (tstart >= CAPB(type)) {
|
||||
if (tstart >= CAP(type)) {
|
||||
if (tstart >= (uint32)CAP(type)) {
|
||||
/* EOM reached, abort */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"DISK Read reached EOM for read from disk @ /%04x/%02x/%02x\n",
|
||||
@ -1108,7 +1117,7 @@ rddone:
|
||||
uptr->CHS = disksec2star(tstart, type);
|
||||
/* see if over end of disk */
|
||||
// if (tstart >= CAPB(type)) {
|
||||
if (tstart >= CAP(type)) {
|
||||
if (tstart >= (uint32)CAP(type)) {
|
||||
/* EOM reached, abort */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"DISK Write reached EOM for write to disk @ /%04x/%02x/%02x\n",
|
||||
@ -1138,10 +1147,15 @@ wrdone:
|
||||
/* reserves the last cylinder, SEL diags reserve the next two, so the */
|
||||
/* addr is CYL-4/HDS-1/0 and is VDT. The UTX/MPX media table is on */
|
||||
/* previous track, so MDT = VDT-SPT is CYL-4/HDS-2/0 */
|
||||
/* The UTX flaw map is at FMAP = MDT-SPT CYL-4/HDS-3/0 */
|
||||
/* UTX media map is 1 track lower at UTXMM=FMAP-SPT CYL-4/HDS-4/0 */
|
||||
/* The UTX med map is pointed to by sector label 1 */
|
||||
/* simulate pointers here, set wd[3] in label to VDT */
|
||||
/* The UTX flaw map is at DMAP = MDT-SPT CYL-4/HDS-3/0 */
|
||||
/* UTX media map is 1 track lower at UMAP=DMAP-SPT CYL-4/HDS-4/0 */
|
||||
/* The UTX media map is pointed to by sector label 1 */
|
||||
/* simulate pointers here, set wd[3] in label to UMAP */
|
||||
|
||||
/* VDT 249264 (819/18/0) 0x3cdb0 for 9346 - 823/19/16 */
|
||||
/* MDT 249248 (819/17/0) 0x3cda0 for 9346 - 823/19/16 */
|
||||
/* DMAP 249232 (819/16/0) 0x3cd90 for 9346 - 823/19/16 */
|
||||
/* UMAP 249216 (819/15/0) 0x3cd80 for 9346 - 823/19/16 */
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr, "disk_startcmd RSL STAR %08x disk geom %08x\n",
|
||||
uptr->CHS, GEOM(type));
|
||||
@ -1159,9 +1173,12 @@ wrdone:
|
||||
unit, buf[0], buf[1], buf[2], buf[3]);
|
||||
|
||||
/* get sector address of UTX media descriptor */
|
||||
/* 819/7/0 is right for 8887, 819/16/0 for 9346 */
|
||||
/* 819/6/0 is right for 8887, 819/15/0 for 9346 */
|
||||
/* UMAP 249216 (819/15/0) 0x3cd80 for 9346 - 823/19/16 */
|
||||
tstart = ((CYL(type)-4) * SPC(type)) +
|
||||
((HDS(type)-2) * SPT(type)) - SPT(type);
|
||||
((HDS(type)-4) * SPT(type)) - SPT(type);
|
||||
//WAS tstart = ((CYL(type)-4) * SPC(type)) +
|
||||
//WAS ((HDS(type)-2) * SPT(type)) - SPT(type);
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"disk_srv SL1 RSL sector %d %x star %02x %02x %02x %02x\n",
|
||||
@ -1171,7 +1188,8 @@ wrdone:
|
||||
/* on HSDP UMAP is in wd 4 on label 1 */
|
||||
/* on UDP & DPII DMAP is in wd 3 on label 0 */
|
||||
/* on UDP & DPII UMAP is in wd 4 on label 0 */
|
||||
// tstart = 0x3cd90; /* 819/16/0 physical 249232 */
|
||||
//WAS tstart = 0x3cd90; /* 819/16/0 physical 249232 */
|
||||
/* UMAP 249216 (819/15/0) 0x3cd80 for 9346 - 823/19/16 */
|
||||
/* the address must be physical for UDP */
|
||||
/* store into sec 1 label */
|
||||
buf[16] = (tstart >> 24) & 0xff; /* UMAP pointer */
|
||||
@ -1255,13 +1273,16 @@ wrdone:
|
||||
/* reserves the last cylinder, SEL diags reserve the next two, so the */
|
||||
/* addr is CYL-4/HDS-1/0 and is VDT. The UTX/MPX media table is on */
|
||||
/* previous track, so MDT = VDT-SPT is CYL-4/HDS-2/0 */
|
||||
/* The UTX flaw map is at FMAP = MDT-SPT CYL-4/HDS-3/0 */
|
||||
/* UTX media map is 1 track lower at UTXMM=FMAP-SPT CYL-4/HDS-4/0 */
|
||||
/* The UTX flaw map is at DMAP = MDT-SPT CYL-4/HDS-3/0 */
|
||||
/* UTX media map is 1 track lower at UMAP=FMAP-SPT CYL-4/HDS-4/0 */
|
||||
/* The UTX media map is pointed to by sector label 1 */
|
||||
/* simulate pointers here, set wd[3] in label to VDT */
|
||||
|
||||
/* get sector address of media defect table */
|
||||
/* 249264 (819/17/0) 0x3cda0 for 9346 - 823/19/16 */
|
||||
/* VDT 249264 (819/18/0) 0x3cdb0 for 9346 - 823/19/16 */
|
||||
/* MDT 249248 (819/17/0) 0x3cda0 for 9346 - 823/19/16 */
|
||||
/* DMAP 249232 (819/16/0) 0x3cd90 for 9346 - 823/19/16 */
|
||||
/* UMAP 249216 (819/15/0) 0x3cd80 for 9346 - 823/19/16 */
|
||||
tstart = (CYL(type)-4) * SPC(type) + (HDS(type)-2) * SPT(type);
|
||||
|
||||
cyl = disk_type[type].cyl-1; /* last cyl */
|
||||
@ -1283,18 +1304,17 @@ wrdone:
|
||||
buf[15] = (tstart) & 0xff;
|
||||
}
|
||||
|
||||
#ifndef NOTNOW
|
||||
/* get sector address of umap table */
|
||||
/* 249232 (819/16/0) 0x3cd90 for 9346 - 823/19/16 */
|
||||
tstart -= SPT(type); /* calc utxfmap address */
|
||||
/* UMAP 249216 (819/15/0) 0x3cd80 for 9346 - 823/19/16 */
|
||||
//WAS tstart -= SPT(type); /* calc umap address */
|
||||
tstart -= (2*SPT(type)); /* calc umap address */
|
||||
/* the address must be physical for UDP */
|
||||
if (uptr->CHS == 0) { /* only write dmap address on trk 0 */
|
||||
if (uptr->CHS == 0) { /* only write umap address on trk 0 */
|
||||
buf[16] = (tstart >> 24) & 0xff; /* ldeallp UMAP */
|
||||
buf[17] = (tstart >> 16) & 0xff;
|
||||
buf[18] = (tstart >> 8) & 0xff;
|
||||
buf[19] = (tstart) & 0xff;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* the tech doc shows the cyl/trk/sec data is in the first 4 bytes */
|
||||
/* of the track label, BUT it is really in the configuration data */
|
||||
@ -1369,7 +1389,7 @@ int disk_format(UNIT *uptr) {
|
||||
uint32 tsize = disk_type[type].spt; /* get track size in sectors */
|
||||
uint32 csize = disk_type[type].nhds * tsize; /* get cylinder size in sectors */
|
||||
uint32 cyl = disk_type[type].cyl; /* get # cylinders */
|
||||
uint32 spc = disk_type[type].nhds * disk_type[type].spt; /* sectors/cyl */
|
||||
// uint32 spc = disk_type[type].nhds * disk_type[type].spt; /* sectors/cyl */
|
||||
uint32 cap = disk_type[type].cyl * csize; /* disk capacity in sectors */
|
||||
uint32 cylv = cyl; /* number of cylinders */
|
||||
uint8 *buff;
|
||||
@ -1384,7 +1404,10 @@ int disk_format(UNIT *uptr) {
|
||||
int32 daddr = vaddr - SPT(type);
|
||||
/* get sector address of utx flaw map sec 1 pointer */
|
||||
/* use this address for sec 1 label pointer */
|
||||
int32 uaddr = daddr - SPT(type);
|
||||
//WASint32 uaddr = daddr - SPT(type);
|
||||
int32 uaddr = daddr - (2*SPT(type));
|
||||
/* last block available */
|
||||
int32 luaddr = (CYL(type)-4) * SPC(type);
|
||||
#ifdef MAYBE
|
||||
/* get sector address of utx flaw data (1 track long) */
|
||||
/* set trace data to zero */
|
||||
@ -1404,15 +1427,19 @@ int disk_format(UNIT *uptr) {
|
||||
};
|
||||
#else
|
||||
{
|
||||
0x4e554d50,(cap-1),luaddr-1,0,0,0,0,0xe10,
|
||||
0,0x5320,0,0x4e60,0x46,luaddr,0,0xd360,
|
||||
0x88,0x186b0,0x13a,0xd100,0x283,0,0,0,
|
||||
0,0x22c2813e,0,0x06020000,0xf4,0,0x431b1c,0,
|
||||
/* try to makeup a utx dmap */
|
||||
// 0xf003d14f,0x8a03cda0,0x9a03cdbf,0x8903cdc0,
|
||||
// 0x9903d01f,0x8c03d020,0x9c03d14f,0xf4000000,
|
||||
0xf0000000 | (cap-1), 0x8a000000 | daddr,
|
||||
0x9a000000 | (daddr + ((2 * tsize) - 1)),
|
||||
0x89000000 | (daddr + (2 * tsize)),
|
||||
0x99000000 | ((cap-1)-spc),
|
||||
0x8c000000 | (cap-spc),
|
||||
0x9c000000 | (cap-1), 0xf4000000,
|
||||
/// 0xf0000000 | (cap-1), 0x8a000000 | daddr,
|
||||
/// 0x9a000000 | (daddr + ((2 * tsize) - 1)),
|
||||
/// 0x89000000 | (daddr + (2 * tsize)),
|
||||
/// 0x99000000 | ((cap-1)-spc),
|
||||
/// 0x8c000000 | (cap-spc),
|
||||
/// 0x9c000000 | (cap-1), 0xf4000000,
|
||||
};
|
||||
#endif
|
||||
/* 250191 249248 250191 0 */
|
||||
@ -1510,7 +1537,7 @@ int disk_format(UNIT *uptr) {
|
||||
/* vaddr is (cap) - 3 cyl - 1 track */
|
||||
|
||||
/* seek to vendor label area */
|
||||
sim_fseek(uptr->fileref, (vaddr)*ssize, SEEK_SET); /* seek UMAP */
|
||||
sim_fseek(uptr->fileref, (vaddr)*ssize, SEEK_SET); /* seek VMAP */
|
||||
if ((sim_fwrite((char *)&vmap, sizeof(uint32), 2, uptr->fileref)) != 2) {
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"Error on vendor map write to diskfile sect %06x\n", vaddr * ssize);
|
||||
@ -1526,18 +1553,16 @@ int disk_format(UNIT *uptr) {
|
||||
"Error on dmap write to diskfile sect %06x\n", daddr * ssize);
|
||||
}
|
||||
|
||||
#ifndef MAYBE
|
||||
sim_fseek(uptr->fileref, (uaddr)*ssize, SEEK_SET); /* seek UMAP */
|
||||
if ((sim_fwrite((char *)&umap, sizeof(uint32), 256, uptr->fileref)) != 256) {
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"Error on umap write to diskfile sect %06x\n", uaddr * ssize);
|
||||
}
|
||||
#endif
|
||||
|
||||
printf("writing to vmap sec %x bytes %x\n",
|
||||
vaddr, (vaddr)*ssize);
|
||||
printf("writing zeros to umap sec %x bytes %x\n",
|
||||
uaddr, (uaddr)*ssize);
|
||||
printf("writing to vmap sec %x (%d) bytes %x (%d)\n",
|
||||
vaddr, vaddr, (vaddr)*ssize, (vaddr)*ssize);
|
||||
printf("writing to umap sec %x (%d) bytes %x (%d)\n",
|
||||
uaddr, uaddr, (uaddr)*ssize, (uaddr)*ssize);
|
||||
printf("writing dmap to %x %d %x %d dmap to %x %d %x %d\n",
|
||||
cap-1, cap-1, (cap-1)*ssize, (cap-1)*ssize,
|
||||
daddr, daddr, daddr*ssize, daddr*ssize);
|
||||
|
||||
@ -861,6 +861,15 @@ t_stat hsdp_srv(UNIT *uptr)
|
||||
break;
|
||||
} else {
|
||||
/* we have wasted enough time, we there */
|
||||
#ifndef DO_SEEK_AGAIN
|
||||
/* calculate file position in bytes of requested sector */
|
||||
/* file offseet in bytes */
|
||||
tstart = STAR2SEC(uptr->STAR, SPT(type), SPC(type)) * SSB(type);
|
||||
/* just reseek to the location where we will r/w data */
|
||||
if ((sim_fseek(uptr->fileref, tstart, SEEK_SET)) != 0) { /* do seek */
|
||||
sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv Error on seek to %04x\n", tstart);
|
||||
}
|
||||
#endif
|
||||
uptr->CHS = uptr->STAR; /* we are there */
|
||||
sim_activate(uptr, 10);
|
||||
break;
|
||||
@ -1094,7 +1103,7 @@ rezero:
|
||||
uptr->CHS = hsdpsec2star(tstart, type);
|
||||
/* see of over end of disk */
|
||||
// if (tstart >= CAPB(type)) {
|
||||
if (tstart >= CAP(type)) {
|
||||
if (tstart >= (uint32)CAP(type)) {
|
||||
/* EOM reached, abort */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"DISK Read reached EOM for read from disk @ /%04x/%02x/%02x\n",
|
||||
@ -1215,7 +1224,7 @@ rddone:
|
||||
uptr->CHS = hsdpsec2star(tstart, type);
|
||||
/* see of over end of disk */
|
||||
// if (tstart >= CAPB(type)) {
|
||||
if (tstart >= CAP(type)) {
|
||||
if (tstart >= (uint32)CAP(type)) {
|
||||
/* EOM reached, abort */
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"DISK Write reached EOM for write to disk @ /%04x/%02x/%02x\n",
|
||||
@ -1245,8 +1254,8 @@ wrdone:
|
||||
/* reserves the last cylinder, SEL diags reserve the next two, so the */
|
||||
/* addr is CYL-4/HDS-1/0 and is VDT. The UTX/MPX media table is on */
|
||||
/* previous track, so MDT = VDT-SPT is CYL-4/HDS-2/0 */
|
||||
/* The UTX flaw map is at FMAP = MDT-SPT CYL-4/HDS-3/0 */
|
||||
/* UTX media map is 1 track lower at UTXMM=FMAP-SPT CYL-4/HDS-4/0 */
|
||||
/* The UTX flaw map is at DMAP = MDT-SPT CYL-4/HDS-3/0 */
|
||||
/* UTX media map is 1 track lower at UMAP=DMAP-SPT CYL-4/HDS-4/0 */
|
||||
/* The UTX med map is pointed to by sector label 1 */
|
||||
/* simulate pointers here, set wd[3] in label to VDT */
|
||||
|
||||
@ -1266,9 +1275,11 @@ wrdone:
|
||||
unit, buf[0], buf[1], buf[2], buf[3]);
|
||||
|
||||
/* get sector address of UTX media descriptor */
|
||||
/* 819/7/0 is right for 8887, 819/16/0 for 9346 */
|
||||
/* 819/6/0 is right for 8887, 819/15/0 for 9346 */
|
||||
tstart = ((CYL(type)-4) * SPC(type)) +
|
||||
((HDS(type)-2) * SPT(type)) - SPT(type);
|
||||
((HDS(type)-4) * SPT(type)) - SPT(type);
|
||||
//WAS tstart = ((CYL(type)-4) * SPC(type)) +
|
||||
//WAS ((HDS(type)-2) * SPT(type)) - SPT(type);
|
||||
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"hsdp_srv SL1 RSL sector %d %x star %02x %02x %02x %02x\n",
|
||||
@ -1278,7 +1289,7 @@ wrdone:
|
||||
/* on HSDP UMAP is in wd 4 on label 1 */
|
||||
/* on UDP & DPII DMAP is in wd 3 on label 0 */
|
||||
/* on UDP & DPII UMAP is in wd 4 on label 0 */
|
||||
// tstart = 0x440aa; /* 819/7/0 logical 278698 */
|
||||
//WAS tstart = 0x440aa; /* 819/7/0 logical 278698 */
|
||||
/* the address must be logical */
|
||||
tstart = (tstart * (SPT(type) - 1))/SPT(type); /* make logical */
|
||||
/* store into sec 1 label */
|
||||
@ -1397,10 +1408,10 @@ wrdone:
|
||||
buf[15] = (tstart) & 0xff;
|
||||
}
|
||||
|
||||
#ifndef NOTNOW
|
||||
/* get sector address of umap table */
|
||||
/* 286895 (819/7/0) 0x460af for 8887 - 823/10/36 */
|
||||
tstart -= SPT(type); /* calc utxfmap address */
|
||||
//WAS tstart -= SPT(type); /* calc utxfmap address */
|
||||
tstart -= (2*SPT(type)); /* calc utxfmap address */
|
||||
/* the address must be logical */
|
||||
tstart = (tstart * (SPT(type) - 1))/SPT(type); /* make logical */
|
||||
/* 278698 (819/7/0) 0x440aa for 8887 - 823/10/35 */
|
||||
@ -1410,7 +1421,6 @@ wrdone:
|
||||
buf[18] = (tstart >> 8) & 0xff;
|
||||
buf[19] = (tstart) & 0xff;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* the tech doc shows the cyl/trk/sec data is in the first 4 bytes */
|
||||
/* of the track label, BUT it is really in the configuration data */
|
||||
@ -1499,7 +1509,10 @@ int hsdp_format(UNIT *uptr) {
|
||||
int32 daddr = vaddr - SPT(type);
|
||||
/* get sector address of utx flaw map sec 1 pointer */
|
||||
/* use this address for sec 1 label pointer */
|
||||
int32 uaddr = daddr - SPT(type);
|
||||
//WASint32 uaddr = daddr - SPT(type);
|
||||
int32 uaddr = daddr - (2*SPT(type));
|
||||
/* last block available */
|
||||
int32 luaddr = (CYL(type)-4) * SPC(type);
|
||||
#ifdef MAYBE
|
||||
/* get sector address of utx flaw data (1 track long) */
|
||||
/* set trace data to zero */
|
||||
@ -1507,7 +1520,7 @@ int hsdp_format(UNIT *uptr) {
|
||||
#endif
|
||||
uint32 umap[256] =
|
||||
#ifndef NOTFORMPX
|
||||
#ifndef NOERRORS
|
||||
#ifdef NOERRORS
|
||||
/* try having no error, 7 in 3rd line */
|
||||
{0x4e554d50,0x4450b,0x43fbb,0,0,0,0,0xe10,
|
||||
// {0x4e554d50,0x3d14f,0x00000,0,0,0,0xffffffff,0xe10,
|
||||
@ -1522,16 +1535,24 @@ int hsdp_format(UNIT *uptr) {
|
||||
};
|
||||
#else
|
||||
/* use original copy of geert's left disk */
|
||||
{0x4e554d50,0x4450b,0x43fbb,0,0,0,0,0xe10,
|
||||
//WAS {0x4e554d50,0x4450b,0x43fbb,0,0,0,0,0xe10,
|
||||
{
|
||||
0x4e554d50,(cap-1),luaddr-1,0,0,0,0,0xe10,
|
||||
0,0x5258,0,0x4e5c,0x3e,luaddr,0,0xd32c,
|
||||
0x79,0x187cc,0x118,0x14410,0x23f,0,0,0,
|
||||
0,0x3821a2d6,0,0x1102000,0xf4,0,0,0,
|
||||
//WAS {0x4e554d50,0x4450b,0x43fbb,0,0,0,0,0xe10,
|
||||
// {0x4e554d50,0x3d14f,0x00000,0,0,0,0xffffffff,0xe10,
|
||||
7,0x5258,0,0x4e5c,0x3e,0x43fbc,0,0xd32c,
|
||||
//WAS 7,0x5258,0,0x4e5c,0x3e,0x43fbc,0,0xd32c,
|
||||
// 0,0x5258,0,0x4e5c,0x3e,0x43fbc,0,0xd32c,
|
||||
0x79,0x187cc,0x118,0x14410,0x23f,0,0,0,
|
||||
0,0x3821a2d6,0x4608c,0x1102000,0xf4,0,0x4608c,0,
|
||||
// 0,0x5258,0,0x4e5c,0x3e,0x43fbc,0,0xd32c,
|
||||
/// 0x79,0x187cc,0x118,0x14410,0x23f,0,0,0,
|
||||
/// 0,0x3821a2d6,0x4608c,0x1102000,0xf4,0,0x4608c,0,
|
||||
// 0,0x3821a2d6,0,0x1102000,0,0,0x4608c,0,
|
||||
0,0x46069,0,0,0x46046,0,0,0x46023,
|
||||
0,0,0x46000,0,0,0x45fdd,0,0,
|
||||
0x45fba,0,0,0,0,0,0,0,
|
||||
// 0,0x3821a2d6,0,0x1102000,0,0,0x4608c,0,
|
||||
/// 0,0x46069,0,0,0x46046,0,0,0x46023,
|
||||
/// 0,0,0x46000,0,0,0x45fdd,0,0,
|
||||
/// 0x45fba,0,0,0,0,0,0,0,
|
||||
};
|
||||
#endif
|
||||
#else
|
||||
@ -1655,24 +1676,21 @@ int hsdp_format(UNIT *uptr) {
|
||||
/* vaddr is daddr - spt */
|
||||
|
||||
sim_fseek(uptr->fileref, (daddr)*ssize, SEEK_SET); /* seek DMAP */
|
||||
// if ((sim_fwrite((char *)&vmap, sizeof(uint32), 2, uptr->fileref)) != 2) {
|
||||
if ((sim_fwrite((char *)&dmap, sizeof(uint32), 4, uptr->fileref)) != 4) {
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"Error on dmap write to diskfile sect %06x\n", daddr * ssize);
|
||||
}
|
||||
|
||||
#ifndef MAYBE
|
||||
sim_fseek(uptr->fileref, (uaddr)*ssize, SEEK_SET); /* seek UMAP */
|
||||
if ((sim_fwrite((char *)&umap, sizeof(uint32), 256, uptr->fileref)) != 256) {
|
||||
sim_debug(DEBUG_CMD, dptr,
|
||||
"Error on umap write to diskfile sect %06x\n", uaddr * ssize);
|
||||
}
|
||||
#endif
|
||||
|
||||
printf("writing to vmap sec %x bytes %x\n",
|
||||
vaddr, (vaddr)*ssize);
|
||||
printf("writing zeros to umap sec %x bytes %x\n",
|
||||
uaddr, (uaddr)*ssize);
|
||||
printf("writing to vmap sec %x (%d) bytes %x (%d)\n",
|
||||
vaddr, vaddr, (vaddr)*ssize, (vaddr)*ssize);
|
||||
printf("writing to umap sec %x (%d) bytes %x (%d)\n",
|
||||
uaddr, uaddr, (uaddr)*ssize, (uaddr)*ssize);
|
||||
printf("writing dmap to %x %d %x %d dmap to %x %d %x %d\n",
|
||||
cap-1, cap-1, (cap-1)*ssize, (cap-1)*ssize,
|
||||
daddr, daddr, daddr*ssize, daddr*ssize);
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
* MPX 3.x master SDT. For user SDT tapes or MPX 1.X master SDT tapes
|
||||
* leave the #define FMGRTAPE uncommented so it will be defined. The
|
||||
* program will stop on two EOFs. For non MPX tapes, the 2nd EOF means
|
||||
* EOT. Some tapes have only one EOT and will termonate on EOT detected.
|
||||
* EOT. Some tapes have only one EOT and will terminate on EOT detected.
|
||||
* Leave off the output file name to just scan the tape and output record
|
||||
* sizes and counts.
|
||||
*/
|
||||
|
||||
@ -163,5 +163,7 @@ set cpu idle
|
||||
;bo dpa0
|
||||
;bo dma0
|
||||
;
|
||||
; Go to simh on completion of script
|
||||
expect "DOL>"^M
|
||||
; Boot from mag tape
|
||||
bo mta0
|
||||
|
||||
@ -1,5 +1,6 @@
|
||||
cd %~p0
|
||||
set debug -n sel.log
|
||||
;set CPU V6 4M
|
||||
;set CPU 32/67 4M
|
||||
set CPU 32/27 4M
|
||||
set coml0 enable
|
||||
@ -17,7 +18,7 @@ at lpr lprout
|
||||
at mta0 diag.tap
|
||||
at mta1 temptape.tap
|
||||
at mta2 output.tap
|
||||
expect "DOL>"
|
||||
expect "DOL>"^M
|
||||
bo mta0
|
||||
det all
|
||||
rm temptape.tap
|
||||
|
||||
Binary file not shown.
Loading…
x
Reference in New Issue
Block a user