From 489abccd4a75b950d25fa85ee9046f60ca48367e Mon Sep 17 00:00:00 2001 From: Richard Cornwell Date: Sun, 31 Mar 2019 20:26:20 -0400 Subject: [PATCH] KA10: Added save/restore support. --- PDP10/ka10_cp.c | 30 +- PDP10/ka10_cpu.c | 733 ++++++++++++++++++++++++++--------------------- PDP10/ka10_cr.c | 20 +- PDP10/ka10_dp.c | 69 ++++- PDP10/ka10_dt.c | 3 +- PDP10/ka10_imp.c | 4 +- PDP10/ka10_lp.c | 10 +- PDP10/ka10_mt.c | 24 +- PDP10/ka10_pt.c | 12 +- PDP10/ka10_rc.c | 34 ++- PDP10/ka10_rp.c | 93 +++++- PDP10/ka10_rs.c | 24 +- PDP10/ka10_tu.c | 24 ++ 13 files changed, 693 insertions(+), 387 deletions(-) diff --git a/PDP10/ka10_cp.c b/PDP10/ka10_cp.c index a48a015..b4ef377 100644 --- a/PDP10/ka10_cp.c +++ b/PDP10/ka10_cp.c @@ -79,7 +79,6 @@ #define STATUS u3 #define COL u4 -#define BUFFER up7 t_stat cp_devio(uint32 dev, uint64 *data); t_stat cp_srv(UNIT *); @@ -88,6 +87,7 @@ t_stat cp_attach(UNIT *, CONST char *); t_stat cp_detach(UNIT *); t_stat cp_help(FILE *, DEVICE *, UNIT *, int32, const char *); const char *cp_description(DEVICE *dptr); +uint16 cp_buffer[80]; DIB cp_dib = { CP_DEVNUM, 1, cp_devio, NULL}; @@ -100,8 +100,13 @@ MTAB cp_mod[] = { {0} }; +REG cp_reg[] = { + {BRDATA(BUFF, cp_buffer, 16, 16, sizeof(cp_buffer)), REG_HRO}, + {0} +}; + DEVICE cp_dev = { - "CP", &cp_unit, NULL, cp_mod, + "CP", &cp_unit, cp_reg, cp_mod, NUM_DEVS_CP, 8, 15, 1, 8, 8, NULL, NULL, NULL, NULL, &cp_attach, &cp_detach, &cp_dib, DEV_DISABLE | DEV_DEBUG | DEV_CARD, 0, crd_debug, @@ -116,7 +121,6 @@ DEVICE cp_dev = { t_stat cp_devio(uint32 dev, uint64 *data) { UNIT *uptr = &cp_unit; - uint16 *image = (uint16 *)(uptr->BUFFER); switch(dev & 3) { case CONI: @@ -166,7 +170,7 @@ t_stat cp_devio(uint32 dev, uint64 *data) { *data = 0; break; case DATAO: - image[uptr->COL++] = *data & 0xfff; + cp_buffer[uptr->COL++] = *data & 0xfff; uptr->STATUS &= ~DATA_REQ; clr_interrupt(dev); sim_debug(DEBUG_DATAIO, &cp_dev, "CP: DATAO %012llo %d\n", *data, @@ -182,7 +186,6 @@ t_stat cp_srv(UNIT *uptr) { if (uptr->STATUS & PUNCH_ON) { - uint16 *image = (uint16 *)(uptr->BUFFER); uptr->STATUS |= CARD_IN_PUNCH; if (uptr->STATUS & DATA_REQ) { @@ -200,7 +203,7 @@ cp_srv(UNIT *uptr) { uptr->COL = 0; uptr->STATUS &= ~(PUNCH_ON|CARD_IN_PUNCH); uptr->STATUS |= END_CARD; - switch(sim_punch_card(uptr, image)) { + switch(sim_punch_card(uptr, cp_buffer)) { case CDSE_EOF: case CDSE_EMPTY: uptr->STATUS |= PICK_FAIL|TROUBLE; @@ -227,26 +230,15 @@ cp_attach(UNIT * uptr, CONST char *file) { t_stat r; - if ((r = sim_card_attach(uptr, file)) != SCPE_OK) - return r; - if (uptr->BUFFER == 0) { - uptr->BUFFER = calloc(80, sizeof(uint16)); - uptr->STATUS = 0; - uptr->COL = 0; - } - return SCPE_OK; + return sim_card_attach(uptr, file); } t_stat cp_detach(UNIT * uptr) { - uint16 *image = (uint16 *)(uptr->BUFFER); if (uptr->STATUS & CARD_IN_PUNCH) - sim_punch_card(uptr, image); - if (uptr->BUFFER != 0) - free(uptr->BUFFER); - uptr->BUFFER = 0; + sim_punch_card(uptr, cp_buffer); return sim_card_detach(uptr); } diff --git a/PDP10/ka10_cpu.c b/PDP10/ka10_cpu.c index 3304e27..3522179 100644 --- a/PDP10/ka10_cpu.c +++ b/PDP10/ka10_cpu.c @@ -132,31 +132,31 @@ int SCAD; /* Shift count extension */ int FE; /* Exponent */ #if KA | PDP6 int Pl, Ph, Rl, Rh, Pflag; /* Protection registers */ -char push_ovf; /* Push stack overflow */ -char mem_prot; /* Memory protection flag */ +int push_ovf; /* Push stack overflow */ +int mem_prot; /* Memory protection flag */ #endif -char nxm_flag; /* Non-existant memory flag */ -char clk_flg; /* Clock flag */ -char ov_irq; /* Trap overflow */ -char fov_irq; /* Trap floating overflow */ +int nxm_flag; /* Non-existant memory flag */ +int clk_flg; /* Clock flag */ +int ov_irq; /* Trap overflow */ +int fov_irq; /* Trap floating overflow */ #if PDP6 -char pcchg_irq; /* PC Change flag */ +int pcchg_irq; /* PC Change flag */ #endif uint8 PIR; /* Current priority level */ uint8 PIH; /* Highest priority */ uint8 PIE; /* Priority enable mask */ -char pi_enable; /* Interrupts enabled */ -char parity_irq; /* Parity interupt */ -char pi_pending; /* Interrupt pending. */ -int pi_req; /* Current interrupt request */ +int pi_enable; /* Interrupts enabled */ +int parity_irq; /* Parity interupt */ +int pi_pending; /* Interrupt pending. */ +//int pi_req; /* Current interrupt request */ int pi_enc; /* Flag for pi */ int apr_irq; /* Apr Irq level */ -char clk_en; /* Enable clock interrupts */ +int clk_en; /* Enable clock interrupts */ int clk_irq; /* Clock interrupt */ -char pi_restore; /* Restore previous level */ -char pi_hold; /* Hold onto interrupt */ +int pi_restore; /* Restore previous level */ +int pi_hold; /* Hold onto interrupt */ int modify; /* Modify cycle */ -char xct_flag; /* XCT flags */ +int xct_flag; /* XCT flags */ #if KI uint64 ARX; /* Extension to AR */ uint64 BRX; /* Extension to BR */ @@ -165,15 +165,15 @@ uint32 ub_ptr; /* User base pointer */ uint32 eb_ptr; /* Executive base pointer */ uint8 fm_sel; /* User fast memory block */ int32 apr_serial = -1; /* CPU Serial number */ -char inout_fail; /* In out fail flag */ -char small_user; /* Small user flag */ -char user_addr_cmp; /* User address compare flag */ +int inout_fail; /* In out fail flag */ +int small_user; /* Small user flag */ +int user_addr_cmp; /* User address compare flag */ #endif #if KI | ITS | BBN uint32 e_tlb[512]; /* Executive TLB */ uint32 u_tlb[546]; /* User TLB */ -char page_enable; /* Enable paging */ -char page_fault; /* Page fail */ +int page_enable; /* Enable paging */ +int page_fault; /* Page fail */ uint32 ac_stack; /* Register stack pointer */ uint32 pag_reload; /* Page reload pointer */ uint64 fault_data; /* Fault data from last fault */ @@ -190,7 +190,7 @@ int user_limit; /* User limit register */ uint64 pur; /* Process use register */ #endif #if MPX_DEV -char mpx_enable; /* Enable MPX device */ +int mpx_enable; /* Enable MPX device */ #endif #if ITS uint32 dbr1; /* User Low Page Table Address */ @@ -201,7 +201,6 @@ uint8 age; /* Age word */ uint32 fault_addr; /* Fault address */ uint64 opc; /* Saved PC and Flags */ uint64 mar; /* Memory address compare */ -uint16 ofa; /* Output fault address */ uint32 qua_time; /* Quantum clock value */ #endif @@ -323,9 +322,81 @@ REG cpu_reg[] = { { ORDATA (PIH, PIH, 8) }, { ORDATA (PIE, PIE, 8) }, { ORDATA (PIENB, pi_enable, 7) }, +#if KI + { BRDATA (REG, FM, 8, 36, 077) }, +#else { BRDATA (REG, FM, 8, 36, 017) }, +#endif { ORDATAD(SW, SW, 36, "Console SW Register"), REG_FIT}, { ORDATAD(MI, MI, 36, "Monitor Display"), REG_FIT}, + { FLDATA (BYF5, BYF5, 0) }, + { FLDATA (UUO, uuo_cycle, 0) }, +#if KA | PDP6 + { ORDATA (PL, Pl, 18) }, + { ORDATA (PH, Ph, 18) }, + { ORDATA (RL, Rl, 18) }, + { ORDATA (RH, Rh, 18) }, + { FLDATA (PFLAG, Pflag, 0) }, + { FLDATA (PUSHOVER, push_ovf, 0) }, + { FLDATA (MEMPROT, mem_prot, 0) }, +#endif + { FLDATA (NXM, nxm_flag, 0) }, + { FLDATA (CLK, clk_flg, 0) }, + { FLDATA (OV, ov_irq, 0) }, + { FLDATA (FOV, fov_irq, 0) }, +#if PDP6 + { FLDATA (PCCHG, pcchg_irq, 0) }, +#endif + { FLDATA (PI_PEND, pi_pending, 0), REG_HRO}, + { FLDATA (PARITY, parity_irq, 0) }, + { ORDATA (APRIRQ, apr_irq, 0) }, + { ORDATA (CLKIRQ, clk_irq, 0) }, + { FLDATA (CLKEN, clk_en, 0), REG_HRO}, + { FLDATA (CLKEN, clk_en, 0), REG_HRO}, + { FLDATA (XCT, xct_flag, 0), REG_HRO}, +#if MPX_DEV + { FLDATA (MPX, mpx_enable, 0), REG_HRO}, +#endif + { FLDATA (PIHOLD, pi_hold, 0), REG_HRO}, + { FLDATA (PIREST, pi_restore, 0), REG_HRO}, +#if KI + { ORDATA (UB, ub_ptr, 18) }, + { ORDATA (EB, eb_ptr, 18) }, + { ORDATA (FMSEL, fm_sel, 8) }, + { ORDATA (SERIAL, apr_serial, 10) }, + { FLDATA (INOUT, inout_fail, 0), REG_RO}, + { FLDATA (SMALL, small_user, 0), REG_RO}, + { FLDATA (ADRCMP, user_addr_cmp, 0), REG_HRO}, +#endif +#if KI | ITS | BBN + { FLDATA (PAGE_ENABLE, page_enable, 0)}, + { FLDATA (PAGE_FAULT, page_fault, 0), REG_RO}, + { ORDATA (AC_STACK, ac_stack, 18), REG_RO}, + { ORDATA (PAG_RELOAD, pag_reload, 18), REG_HRO}, + { ORDATA (FAULT_DATA, fault_data, 36), REG_RO}, + { FLDATA (TRP_FLG, trap_flag, 0), REG_HRO}, + { ORDATA (LST_PG, last_page, 9), REG_HRO}, +#endif +#if BBN + { FLDATA (EXEC_MAP, exec_map, 0), REG_RO}, + { FLDATA (NXT_WR, next_write, 0), REG_RO}, + { ORDATA (MON_BASE, mon_base_reg, 8), REG_RO}, + { ORDATA (AC_BASE, ac_base, 5), REG_RO}, + { ORDATA (USER_BASE, user_base_reg, 8), REG_RO}, + { ORDATA (USER_LIMIT, user_limit, 3), REG_RO}, + { ORDATA (PER_USER, pur, 36), REG_RO}, +#endif +#if ITS + { ORDATA (DBR1, dbr1, 18)}, + { ORDATA (DBR2, dbr2, 18)}, + { ORDATA (DBR3, dbr3, 18)}, + { ORDATA (JPC, jpc, 18)}, + { ORDATA (AGE, age, 4)}, + { ORDATA (FAULT_ADDR, fault_addr, 18)}, + { ORDATA (OPC, opc, 36)}, + { ORDATA (MAR, mar, 18)}, + { ORDATA (QUA_TIME, qua_time, 36), REG_RO}, +#endif { NULL } }; @@ -741,6 +812,7 @@ void clr_interrupt(int dev) { */ int check_irq_level() { int i, lvl; + int pi_req; /* If PXCT don't check for interrupts */ if (xct_flag != 0) @@ -848,7 +920,7 @@ t_stat dev_pi(uint32 dev, uint64 *data) { #endif parity_irq = 0; } - if (res & 0200) + if (res & 0200) pi_enable = 1; if (res & 0400) pi_enable = 0; @@ -1332,7 +1404,7 @@ int page_lookup(int addr, int flag, int *loc, int wr, int cur_context, int fetch data = u_tlb[page]; pag_reload = ((pag_reload + 1) & 037) | 040; } - if (upmp) + if (upmp) last_page = (((page-0440) ^ 0777) << 1) | 1; else last_page = ((page ^ 0777) << 1); @@ -1535,129 +1607,129 @@ int its_load_tlb(uint32 reg, int page, uint32 *tlb) { */ int page_lookup_its(int addr, int flag, int *loc, int wr, int cur_context, int fetch) { - uint64 data; - int base = 0; - int page = (RMASK & addr) >> 10; - int acc; - int uf = (FLAGS & USER) != 0; - int ofd = (int)fault_data; + uint64 data; + int base = 0; + int page = (RMASK & addr) >> 10; + int acc; + int uf = (FLAGS & USER) != 0; + int ofd = (int)fault_data; - /* If paging is not enabled, address is direct */ - if (!page_enable) { + /* If paging is not enabled, address is direct */ + if (!page_enable) { + *loc = addr; + return 1; + } + + /* If fetching byte data, use write access */ + if (BYF5 && (IR & 06) == 6) + wr = 1; + + /* If this is modify instruction use write access */ + wr |= modify; + + /* Figure out if this is a user space access */ + if (flag) + uf = 0; + else if (xct_flag != 0 && !cur_context && !uf) { + if (((xct_flag & 2) != 0 && wr != 0) || + ((xct_flag & 1) != 0 && (wr == 0 || modify))) { + uf = 1; + } + } + + /* AC & 1 = ??? */ + /* AC & 2 = Read User */ + /* AC & 4 = Write User */ + /* AC & 8 = Inhibit mem protect, skip */ + + /* Add in MAR checking */ + if (addr == (mar & RMASK)) { + switch((mar >> 18) & 03) { + case 0: break; + case 1: if (fetch) { + mem_prot = 1; + fault_data |= 2; + } + break; + case 2: if (!wr) + break; + /* Fall through */ + case 3: mem_prot = 1; + fault_data |= 2; + break; + } + } + + + /* Map the page */ + if (!uf) { + /* Handle system mapping */ + if ((page & 0200) == 0 || (fault_data & 04) == 0) { + /* Direct map 0-377 or all if bit 2 off */ *loc = addr; return 1; } - - /* If fetching byte data, use write access */ - if (BYF5 && (IR & 06) == 6) - wr = 1; - - /* If this is modify instruction use write access */ - wr |= modify; - - /* Figure out if this is a user space access */ - if (flag) - uf = 0; - else if (xct_flag != 0 && !cur_context && !uf) { - if (((xct_flag & 2) != 0 && wr != 0) || - ((xct_flag & 1) != 0 && (wr == 0 || modify))) { - uf = 1; - } - } - - /* AC & 1 = ??? */ - /* AC & 2 = Read User */ - /* AC & 4 = Write User */ - /* AC & 8 = Inhibit mem protect, skip */ - - /* Add in MAR checking */ - if (addr == (mar & RMASK)) { - switch((mar >> 18) & 03) { - case 0: break; - case 1: if (fetch) { - mem_prot = 1; - fault_data |= 2; - } - break; - case 2: if (!wr) - break; - /* Fall through */ - case 3: mem_prot = 1; - fault_data |= 2; - break; - } - } - - - /* Map the page */ - if (!uf) { - /* Handle system mapping */ - if ((page & 0200) == 0 || (fault_data & 04) == 0) { - /* Direct map 0-377 or all if bit 2 off */ - *loc = addr; - return 1; - } + data = e_tlb[page - 0200]; + if (data == 0) { + if (its_load_tlb(dbr3, page - 0200, &e_tlb[page - 0200])) + goto fault; data = e_tlb[page - 0200]; - if (data == 0) { - if (its_load_tlb(dbr3, page - 0200, &e_tlb[page - 0200])) - goto fault; - data = e_tlb[page - 0200]; - } - } else { - data = u_tlb[page]; - if (data == 0) { - if (page & 0200) { - if (its_load_tlb(dbr2, page - 0200, &u_tlb[page])) - goto fault; - } else { - if (its_load_tlb(dbr1, page, &u_tlb[page])) - goto fault; - } - data = u_tlb[page]; - } } - *loc = ((data & 01777) << 10) + (addr & 01777); - acc = (data >> 16) & 03; + } else { + data = u_tlb[page]; + if (data == 0) { + if (page & 0200) { + if (its_load_tlb(dbr2, page - 0200, &u_tlb[page])) + goto fault; + } else { + if (its_load_tlb(dbr1, page, &u_tlb[page])) + goto fault; + } + data = u_tlb[page]; + } + } + *loc = ((data & 01777) << 10) + (addr & 01777); + acc = (data >> 16) & 03; - /* Access check logic */ - switch(acc) { - case 0: /* No access */ - fault_data |= 0010; - break; - case 1: /* Read Only Access */ - if (!wr) - return 1; - if ((fault_data & 00770) == 0) - fault_data |= 0100; - break; - case 2: /* Read write first */ - if (fetch && (FLAGS & PURE)) { - fault_data |= 0020; - break; - } - if (!wr) /* Read is OK */ - return 1; - if ((fault_data & 00770) == 0) - fault_data |= 040; - break; - case 3: /* All access */ - if (fetch && (FLAGS & PURE)) { - fault_data |= 0020; - break; - } + /* Access check logic */ + switch(acc) { + case 0: /* No access */ + fault_data |= 0010; + break; + case 1: /* Read Only Access */ + if (!wr) return 1; - } + if ((fault_data & 00770) == 0) + fault_data |= 0100; + break; + case 2: /* Read write first */ + if (fetch && (FLAGS & PURE)) { + fault_data |= 0020; + break; + } + if (!wr) /* Read is OK */ + return 1; + if ((fault_data & 00770) == 0) + fault_data |= 040; + break; + case 3: /* All access */ + if (fetch && (FLAGS & PURE)) { + fault_data |= 0020; + break; + } + return 1; + } fault: - /* Update fault data, fault address only if new fault */ - if ((ofd & 00770) == 0) - fault_addr = (page) | ((uf)? 0400 : 0) | ((data & 01777) << 9); - if ((xct_flag & 04) == 0) { - mem_prot = 1; - fault_data |= 01000; - } else { - PC = (PC + 1) & RMASK; - } - return 0; + /* Update fault data, fault address only if new fault */ + if ((ofd & 00770) == 0) + fault_addr = (page) | ((uf)? 0400 : 0) | ((data & 01777) << 9); + if ((xct_flag & 04) == 0) { + mem_prot = 1; + fault_data |= 01000; + } else { + PC = (PC + 1) & RMASK; + } + return 0; } /* @@ -1776,211 +1848,210 @@ int page_lookup_bbn(int addr, int flag, int *loc, int wr, int cur_context, int f bit 7 = illegal write bit 8 = address limit register violation or p.t. bits 0,1 = 3 (illegal format */ -// if (QBBN) { - uint64 data; - uint32 tlb_data; - uint64 traps; - int base = 0; - int trap = 0; - int lvl = 0; - int page = (RMASK & addr) >> 9; - int uf = (FLAGS & USER) != 0; + uint64 data; + uint32 tlb_data; + uint64 traps; + int base = 0; + int trap = 0; + int lvl = 0; + int page = (RMASK & addr) >> 9; + int uf = (FLAGS & USER) != 0; - if (page_fault) - return 0; + if (page_fault) + return 0; - /* If paging is not enabled, address is direct */ - if (!page_enable) { - *loc = addr; - return 1; + /* If paging is not enabled, address is direct */ + if (!page_enable) { + *loc = addr; + return 1; + } + + /* If this is modify instruction use write access */ + wr |= modify; + + /* Umove instructions handled here */ + if ((IR & 0774) == 0100 && (FLAGS & EXJSYS) == 0) + uf = 1; + /* Figure out if this is a user space access */ + if (flag) + uf = 0; + else if ((FLAGS & EXJSYS) == 0 && xct_flag != 0) { + if (xct_flag & 010 && cur_context) + uf = 1; + if (xct_flag & 004 && wr == 0) + uf = 1; + if (xct_flag & 002 && BYF5) + uf = 1; + if (xct_flag & 001 && wr == 1) + uf = 1; + } + + /* If not really user mode and register access */ + if (uf && (FLAGS & USER) == 0 && addr < 020) { + addr |= 0775000 | (ac_base << 4); + uf = 0; + } + + if (uf) { + if (page > user_limit) { + /* over limit violation */ + fault_data = 0401000; + goto fault_bbn; } - - /* If this is modify instruction use write access */ - wr |= modify; - - /* Umove instructions handled here */ - if ((IR & 0774) == 0100 && (FLAGS & EXJSYS) == 0) - uf = 1; - /* Figure out if this is a user space access */ - if (flag) - uf = 0; - else if ((FLAGS & EXJSYS) == 0 && xct_flag != 0) { - if (xct_flag & 010 && cur_context) - uf = 1; - if (xct_flag & 004 && wr == 0) - uf = 1; - if (xct_flag & 002 && BYF5) - uf = 1; - if (xct_flag & 001 && wr == 1) - uf = 1; + base = user_base_reg; + tlb_data = u_tlb[page]; + } else { + /* 000 - 077 resident map */ + /* 100 - 177 per processor map */ + /* 200 - 577 monitor map */ + /* 600 - 777 per process map */ + if ((page & 0700) == 0 && exec_map == 0) { + *loc = addr; + return 1; } - - /* If not really user mode and register access */ - if (uf && (FLAGS & USER) == 0 && addr < 020) { - addr |= 0775000 | (ac_base << 4); - uf = 0; - } - - if (uf) { - if (page > user_limit) { - /* over limit violation */ - fault_data = 0401000; - goto fault_bbn; - } - base = user_base_reg; - tlb_data = u_tlb[page]; - } else { - /* 000 - 077 resident map */ - /* 100 - 177 per processor map */ - /* 200 - 577 monitor map */ - /* 600 - 777 per process map */ - if ((page & 0700) == 0 && exec_map == 0) { - *loc = addr; - return 1; - } - if ((page & 0600) == 0600) - base = mon_base_reg; - else - base = 03000; - tlb_data = e_tlb[page]; - } - if (tlb_data != 0) { + if ((page & 0600) == 0600) + base = mon_base_reg; + else + base = 03000; + tlb_data = e_tlb[page]; + } + if (tlb_data != 0) { access: - *loc = ((tlb_data & 03777) << 9) + (addr & 0777); - /* Check access */ - if (wr && (tlb_data & 0200000) == 0) { - fault_data = 0402000; - goto fault_bbn; - } else if (fetch && (tlb_data & 0100000) == 0) { - fault_data = 0404000; - goto fault_bbn; - } else if ((tlb_data & 0400000) == 0) { - fault_data = 0404000; - goto fault_bbn; - } - return 1; + *loc = ((tlb_data & 03777) << 9) + (addr & 0777); + /* Check access */ + if (wr && (tlb_data & 0200000) == 0) { + fault_data = 0402000; + goto fault_bbn; + } else if (fetch && (tlb_data & 0100000) == 0) { + fault_data = 0404000; + goto fault_bbn; + } else if ((tlb_data & 0400000) == 0) { + fault_data = 0404000; + goto fault_bbn; } - traps = FMASK; - /* Map the page */ + return 1; + } + traps = FMASK; + /* Map the page */ map_page: - while (tlb_data == 0) { - data = M[base + page]; + while (tlb_data == 0) { + data = M[base + page]; - switch ((data >> 33) & 03) { - case 0: /* Direct page */ - /* Bit 4 = execute */ - /* Bit 3 = Write */ - /* Bit 2 = Read */ - page = data & BBN_PAGE; - traps &= data & (BBN_MERGE|BBN_TRPPG); - tlb_data = (data & (BBN_EXEC|BBN_WRITE|BBN_READ) >> 16) | - (data & 03777); - break; + switch ((data >> 33) & 03) { + case 0: /* Direct page */ + /* Bit 4 = execute */ + /* Bit 3 = Write */ + /* Bit 2 = Read */ + page = data & BBN_PAGE; + traps &= data & (BBN_MERGE|BBN_TRPPG); + tlb_data = (data & (BBN_EXEC|BBN_WRITE|BBN_READ) >> 16) | + (data & 03777); + break; - case 1: /* Shared page */ - /* Check trap */ - base = 020000; - page = (data & BBN_SPT) >> 9; - traps &= data & (BBN_MERGE|BBN_PAGE); - data = 0; - lvl ++; - break; + case 1: /* Shared page */ + /* Check trap */ + base = 020000; + page = (data & BBN_SPT) >> 9; + traps &= data & (BBN_MERGE|BBN_PAGE); + data = 0; + lvl ++; + break; - case 2: /* Indirect page */ - if (lvl == 2) { - /* Trap */ - fault_data = 0201000; - goto fault_bbn; - } - page = data & BBN_PN; - base = 020000 + ((data & BBN_SPT) >> 9); - traps &= data & (BBN_MERGE|BBN_PAGE); - data = 0; - lvl ++; - break; - - case 3: /* Invalid page */ - /* Trap all */ - fault_data = ((lvl != 0)? 0200000: 0) | 0401000; + case 2: /* Indirect page */ + if (lvl == 2) { + /* Trap */ + fault_data = 0201000; goto fault_bbn; - } - if ((traps & (BBN_TRP|BBN_TRP1)) == (BBN_TRP|BBN_TRP1)) { - fault_data = 04000; - goto fault_bbn; - } + } + page = data & BBN_PN; + base = 020000 + ((data & BBN_SPT) >> 9); + traps &= data & (BBN_MERGE|BBN_PAGE); + data = 0; + lvl ++; + break; + + case 3: /* Invalid page */ + /* Trap all */ + fault_data = ((lvl != 0)? 0200000: 0) | 0401000; + goto fault_bbn; } - if (uf) { - u_tlb[page] = tlb_data; - } else { - e_tlb[page] = tlb_data; + if ((traps & (BBN_TRP|BBN_TRP1)) == (BBN_TRP|BBN_TRP1)) { + fault_data = 04000; + goto fault_bbn; } - /* Handle traps */ - if (page_fault) - goto fault_bbn1; - if (wr && (traps & BBN_TRPMOD)) { - fault_data = ((lvl != 0)? 0200000: 0) | 0440000; - goto fault_bbn; - } - if ((traps & BBN_TRPUSR)) { - fault_data = ((lvl != 0)? 0200000: 0) | 0420000; - goto fault_bbn; - } - if ((traps & BBN_ACC) == 0 || (traps & BBN_TRP)) { - fault_data = ((lvl != 0)? 0200000: 0) | 0410000; - goto fault_bbn; - } - /* Update CST */ - data = M[04000 + (tlb_data & 03777)]; - if ((data & 00700000000000LL) == 0) { - fault_data = 0100000 >> ((data >> 31) & 03); - goto fault_bbn; - } - data &= ~00777000000000LL; /* Clear age */ - if (wr) - data |= 00000400000000LL; /* Set modify */ - data |= pur; - M[04000 + (tlb_data & 03777)] = data; - goto access; + } + if (uf) { + u_tlb[page] = tlb_data; + } else { + e_tlb[page] = tlb_data; + } + /* Handle traps */ + if (page_fault) + goto fault_bbn1; + if (wr && (traps & BBN_TRPMOD)) { + fault_data = ((lvl != 0)? 0200000: 0) | 0440000; + goto fault_bbn; + } + if ((traps & BBN_TRPUSR)) { + fault_data = ((lvl != 0)? 0200000: 0) | 0420000; + goto fault_bbn; + } + if ((traps & BBN_ACC) == 0 || (traps & BBN_TRP)) { + fault_data = ((lvl != 0)? 0200000: 0) | 0410000; + goto fault_bbn; + } + /* Update CST */ + data = M[04000 + (tlb_data & 03777)]; + if ((data & 00700000000000LL) == 0) { + fault_data = 0100000 >> ((data >> 31) & 03); + goto fault_bbn; + } + data &= ~00777000000000LL; /* Clear age */ + if (wr) + data |= 00000400000000LL; /* Set modify */ + data |= pur; + M[04000 + (tlb_data & 03777)] = data; + goto access; /* Handle fault */ fault_bbn: - /* Write location of trap to PSB 571 */ - /* If write write MB to PSB 752 */ - /* Force APR to execute at location 70 */ + /* Write location of trap to PSB 571 */ + /* If write write MB to PSB 752 */ + /* Force APR to execute at location 70 */ - /* Status word */ - /* RH = Effective address */ - /* Bit 17 = Exec Mode 0000001 */ - /* Bit 16 = Execute request 0000002 */ - /* Bit 15 = Write 0000004 */ - /* Bit 14 = Read 0000010 */ - /* Bit 13 = Ind 0000020 */ - /* Bit 12 = PI in progress 0000040 */ - /* Bit 11 = Key in progress 0000100 */ - /* Bit 10 = non-ex-mem 0000200 */ - /* Bit 9 = Parity 0000400 */ - /* Bit 0-8 = status */ - if ((FLAGS & USER) == 0) - fault_data |= 01; - if (fetch) - fault_data |= 02; - if (wr) - fault_data |= 04; - else - fault_data |= 010; - if (cur_context) - fault_data |= 020; - if (uuo_cycle) - fault_data |= 040; - page_fault = 1; - base = mon_base_reg; - tlb_data = e_tlb[0777]; - page = 0777; - goto map_page; + /* Status word */ + /* RH = Effective address */ + /* Bit 17 = Exec Mode 0000001 */ + /* Bit 16 = Execute request 0000002 */ + /* Bit 15 = Write 0000004 */ + /* Bit 14 = Read 0000010 */ + /* Bit 13 = Ind 0000020 */ + /* Bit 12 = PI in progress 0000040 */ + /* Bit 11 = Key in progress 0000100 */ + /* Bit 10 = non-ex-mem 0000200 */ + /* Bit 9 = Parity 0000400 */ + /* Bit 0-8 = status */ + if ((FLAGS & USER) == 0) + fault_data |= 01; + if (fetch) + fault_data |= 02; + if (wr) + fault_data |= 04; + else + fault_data |= 010; + if (cur_context) + fault_data |= 020; + if (uuo_cycle) + fault_data |= 040; + page_fault = 1; + base = mon_base_reg; + tlb_data = e_tlb[0777]; + page = 0777; + goto map_page; fault_bbn1: - M[((tlb_data & 03777) << 9) | 0571] = ((uint64)fault_data) << 18 | addr; - if (wr) - M[((tlb_data & 03777) << 9) | 0572] = MB; - return 0; + M[((tlb_data & 03777) << 9) | 0571] = ((uint64)fault_data) << 18 | addr; + if (wr) + M[((tlb_data & 03777) << 9) | 0572] = MB; + return 0; } /* @@ -2195,7 +2266,7 @@ if ((reason = build_dev_tab ()) != SCPE_OK) /* build, chk dib_tab */ if (f_load_pc) { modify = 0; xct_flag = 0; -#if KI | KL +#if KI | KL trap_flag = 0; #endif AB = PC; @@ -3600,7 +3671,7 @@ fnorm: AR = (AR << 1) + (MQ >> 35); MQ &= CMASK; /* low order only has 35 bits */ if ((IR & 4) == 0) { /* IMUL */ - if (AR > flag3 && !pi_cycle) { + if (AR > flag3 && !pi_cycle) { FLAGS |= OVR|TRP1; check_apr_irq(); } @@ -4079,7 +4150,7 @@ fnorm: flag1 = (FLAGS & USERIO) != 0; } } - + flag3 = 0; /* If user, check if small user enabled */ if (flag1) { @@ -4134,7 +4205,7 @@ fnorm: } pag_reload = ((pag_reload + 1) & 037) | 040; } - if (flag3 & 2) + if (flag3 & 2) last_page = (((f-0440) ^ 0777) << 1) | 1; else last_page = ((f ^ 0777) << 1); @@ -5058,7 +5129,7 @@ page_enable = 0; #endif nxm_flag = clk_flg = 0; PIR = PIH = PIE = pi_enable = parity_irq = 0; -pi_pending = pi_req = pi_enc = apr_irq = 0; +pi_pending = pi_enc = apr_irq = 0; ov_irq =fov_irq =clk_en =clk_irq = 0; pi_restore = pi_hold = 0; #if KI | KL diff --git a/PDP10/ka10_cr.c b/PDP10/ka10_cr.c index 6adb84c..4f03006 100644 --- a/PDP10/ka10_cr.c +++ b/PDP10/ka10_cr.c @@ -78,7 +78,6 @@ #define STATUS u3 #define COL u4 #define DATA u5 -#define BUFFER up7 #define CARD_RDY(u) (sim_card_input_hopper_count(u) > 0 || \ sim_card_eof(u) == 1) @@ -90,6 +89,7 @@ t_stat cr_attach(UNIT *, CONST char *); t_stat cr_detach(UNIT *); t_stat cr_help(FILE *, DEVICE *, UNIT *, int32, const char *); const char *cr_description(DEVICE *dptr); +uint16 cr_buffer[80]; DIB cr_dib = { CR_DEVNUM, 1, cr_devio, NULL}; @@ -103,8 +103,14 @@ MTAB cr_mod[] = { {0} }; +REG cr_reg[] = { + {BRDATA(BUFF, cr_buffer, 16, 16, sizeof(cr_buffer)), REG_HRO}, + {0} +}; + + DEVICE cr_dev = { - "CR", &cr_unit, NULL, cr_mod, + "CR", &cr_unit, cr_reg, cr_mod, NUM_DEVS_CR, 8, 15, 1, 8, 8, NULL, NULL, NULL, NULL, &cr_attach, &cr_detach, &cr_dib, DEV_DISABLE | DEV_DEBUG | DEV_CARD, 0, crd_debug, @@ -180,7 +186,6 @@ t_stat cr_devio(uint32 dev, uint64 *data) { /* Handle transfer of data for card reader */ t_stat cr_srv(UNIT *uptr) { - uint16 *image = (uint16 *)(uptr->BUFFER); /* Read in card, ready to read next one set IRQ */ if (uptr->flags & UNIT_ATT /*&& uptr->STATUS & END_CARD*/) { @@ -198,7 +203,7 @@ cr_srv(UNIT *uptr) { /* Check if new card requested. */ if ((uptr->STATUS & (READING|CARD_IN_READ)) == READING) { uptr->STATUS &= ~(END_CARD|RDY_READ); - switch(sim_read_card(uptr, image)) { + switch(sim_read_card(uptr, cr_buffer)) { case CDSE_EOF: sim_debug(DEBUG_EXP, &cr_dev, "CR: card eof\n"); uptr->STATUS &= ~(CARD_IN_READ|READING); @@ -240,7 +245,7 @@ cr_srv(UNIT *uptr) { sim_activate(uptr, uptr->wait); return SCPE_OK; } - uptr->DATA = image[uptr->COL++]; + uptr->DATA = cr_buffer[uptr->COL++]; if (uptr->STATUS & DATA_RDY) { uptr->STATUS |= DATA_MISS; } @@ -259,8 +264,6 @@ cr_attach(UNIT * uptr, CONST char *file) if ((r = sim_card_attach(uptr, file)) != SCPE_OK) return r; - if (uptr->BUFFER == 0) - uptr->BUFFER = malloc(sizeof(uint16)*80); if ((uptr->STATUS & (READING|CARD_IN_READ)) == 0) { uptr->STATUS |= RDY_READ; uptr->STATUS &= ~(HOPPER_EMPTY|STOP|TROUBLE|CELL_ERROR|PICK_ERROR); @@ -273,9 +276,6 @@ cr_attach(UNIT * uptr, CONST char *file) t_stat cr_detach(UNIT * uptr) { - if (uptr->BUFFER != 0) - free(uptr->BUFFER); - uptr->BUFFER = 0; if (uptr->flags & UNIT_ATT) { uptr->STATUS |= TROUBLE|HOPPER_EMPTY; if (uptr->STATUS & TROUBLE_EN) diff --git a/PDP10/ka10_dp.c b/PDP10/ka10_dp.c index 01a7cf9..fbc676b 100644 --- a/PDP10/ka10_dp.c +++ b/PDP10/ka10_dp.c @@ -275,8 +275,24 @@ MTAB dp_mod[] = { {0} }; +REG dpa_reg[] = { + {BRDATA(BUFF, &dp_buf[0][0], 16, 64, RP_NUMWD), REG_HRO}, + {BRDATA(UNIT, &dp_cur_unit[0], 16, 8, 1), REG_HRO}, + {FLDATA(READIN, readin_flag, 0), REG_HRO}, + {ORDATA(STATUS, dp_df10[0].status, 18), REG_RO}, + {ORDATA(CIA, dp_df10[0].cia, 18)}, + {ORDATA(CCW, dp_df10[0].ccw, 18)}, + {ORDATA(WCR, dp_df10[0].wcr, 18)}, + {ORDATA(CDA, dp_df10[0].cda, 18)}, + {ORDATA(DEVNUM, dp_df10[0].devnum, 9), REG_HRO}, + {ORDATA(BUF, dp_df10[0].buf, 36), REG_HRO}, + {ORDATA(NXM, dp_df10[0].nxmerr, 8), REG_HRO}, + {ORDATA(COMP, dp_df10[0].ccw_comp, 8), REG_HRO}, + {0} +}; + DEVICE dpa_dev = { - "DPA", dp_unit, NULL, dp_mod, + "DPA", dp_unit, dpa_reg, dp_mod, NUM_UNITS_DP, 8, 18, 1, 8, 36, NULL, NULL, &dp_reset, &dp_boot, &dp_attach, &dp_detach, &dp_dib[0], DEV_DISABLE | DEV_DEBUG, 0, dev_debug, @@ -284,8 +300,23 @@ DEVICE dpa_dev = { }; #if (NUM_DEVS_DP > 1) +REG dpb_reg[] = { + {BRDATA(BUFF, &dp_buf[1][0], 16, 64, RP_NUMWD), REG_HRO}, + {BRDATA(DF10, &dp_cur_unit[1], 16, 8, 1), REG_HRO}, + {ORDATA(STATUS, dp_df10[1].status, 18), REG_RO}, + {ORDATA(CIA, dp_df10[1].cia, 18)}, + {ORDATA(CCW, dp_df10[1].ccw, 18)}, + {ORDATA(WCR, dp_df10[1].wcr, 18)}, + {ORDATA(CDA, dp_df10[1].cda, 18)}, + {ORDATA(DEVNUM, dp_df10[1].devnum, 9), REG_HRO}, + {ORDATA(BUF, dp_df10[1].buf, 36), REG_HRO}, + {ORDATA(NXM, dp_df10[1].nxmerr, 8), REG_HRO}, + {ORDATA(COMP, dp_df10[1].ccw_comp, 8), REG_HRO}, + {0} +}; + DEVICE dpb_dev = { - "DPB", &dp_unit[010], NULL, dp_mod, + "DPB", &dp_unit[010], dpb_reg, dp_mod, NUM_UNITS_DP, 8, 18, 1, 8, 36, NULL, NULL, &dp_reset, &dp_boot, &dp_attach, &dp_detach, &dp_dib[1], DEV_DISABLE | DEV_DEBUG, 0, dev_debug, @@ -293,8 +324,23 @@ DEVICE dpb_dev = { }; #if (NUM_DEVS_DP > 2) +REG dpc_reg[] = { + {BRDATA(BUFF, &dp_buf[2][0], 16, 64, RP_NUMWD), REG_HRO}, + {BRDATA(DF10, &dp_cur_unit[2], 16, 8, 1), REG_HRO}, + {ORDATA(STATUS, dp_df10[2].status, 18), REG_RO}, + {ORDATA(CIA, dp_df10[2].cia, 18)}, + {ORDATA(CCW, dp_df10[2].ccw, 18)}, + {ORDATA(WCR, dp_df10[2].wcr, 18)}, + {ORDATA(CDA, dp_df10[2].cda, 18)}, + {ORDATA(DEVNUM, dp_df10[2].devnum, 9), REG_HRO}, + {ORDATA(BUF, dp_df10[2].buf, 36), REG_HRO}, + {ORDATA(NXM, dp_df10[2].nxmerr, 8), REG_HRO}, + {ORDATA(COMP, dp_df10[2].ccw_comp, 8), REG_HRO}, + {0} +}; + DEVICE dpc_dev = { - "DPC", &dp_unit[020], NULL, dp_mod, + "DPC", &dp_unit[020], dpc_reg, dp_mod, NUM_UNITS_DP, 8, 18, 1, 8, 36, NULL, NULL, &dp_reset, &dp_boot, &dp_attach, &dp_detach, &dp_dib[2], DEV_DISABLE | DEV_DEBUG, 0, dev_debug, @@ -302,8 +348,23 @@ DEVICE dpc_dev = { }; #if (NUM_DEVS_DP > 3) +REG dpd_reg[] = { + {BRDATA(BUFF, &dp_buf[3][0], 16, 64, RP_NUMWD), REG_HRO}, + {BRDATA(DF10, &dp_cur_unit[3], 16, 8, 1), REG_HRO}, + {ORDATA(STATUS, dp_df10[3].status, 18), REG_RO}, + {ORDATA(CIA, dp_df10[3].cia, 18)}, + {ORDATA(CCW, dp_df10[3].ccw, 18)}, + {ORDATA(WCR, dp_df10[3].wcr, 18)}, + {ORDATA(CDA, dp_df10[3].cda, 18)}, + {ORDATA(DEVNUM, dp_df10[3].devnum, 9), REG_HRO}, + {ORDATA(BUF, dp_df10[3].buf, 36), REG_HRO}, + {ORDATA(NXM, dp_df10[3].nxmerr, 8), REG_HRO}, + {ORDATA(COMP, dp_df10[3].ccw_comp, 8), REG_HRO}, + {0} +}; + DEVICE dpd_dev = { - "DPD", &dp_unit[030], NULL, dp_mod, + "DPD", &dp_unit[030], dpd_reg, dp_mod, NUM_UNITS_DP, 8, 18, 1, 8, 36, NULL, NULL, &dp_reset, &dp_boot, &dp_attach, &dp_detach, &dp_dib[3], DEV_DISABLE | DEV_DEBUG, 0, dev_debug, diff --git a/PDP10/ka10_dt.c b/PDP10/ka10_dt.c index 43697c2..44a4fd9 100644 --- a/PDP10/ka10_dt.c +++ b/PDP10/ka10_dt.c @@ -299,8 +299,9 @@ REG dt_reg[] = { { ORDATA (DTSA, dtsa, 18) }, { ORDATA (DTSB, dtsb, 18) }, { ORDATA (DTDB, dtdb, 18) }, + { ORDATA (MPX, dt_mpx_lvl, 3) }, { URDATA (POS, dt_unit[0].pos, 10, T_ADDR_W, 0, - DT_NUMDR, PV_LEFT | REG_RO) }, + DT_NUMDR, PV_LEFT | REG_RO | REG_UNIT) }, { NULL } }; diff --git a/PDP10/ka10_imp.c b/PDP10/ka10_imp.c index 9175659..d2ad535 100644 --- a/PDP10/ka10_imp.c +++ b/PDP10/ka10_imp.c @@ -506,7 +506,7 @@ t_stat imp_devio(uint32 dev, uint64 *data) uptr->STATUS |= IMPO32; if (*data & IMPODS) //Set output done. uptr->STATUS |= IMPOD; - if (*data & IMPIR) { //Enable interrup on IMP ready. + if (*data & IMPIR) { //Enable interrupt on IMP ready. uptr->STATUS |= IMPIC; uptr->STATUS &= ~IMPERR; } @@ -1069,7 +1069,7 @@ imp_packet_out(struct imp_device *imp, ETH_PACK *packet) { (uint8 *)(&imp->ip), sizeof(in_addr_t)); /* See if we need to change the sequence number */ for (i = 0; i < 64; i++) { - if (imp->port_map[i].sport == sport && + if (imp->port_map[i].sport == sport && imp->port_map[i].dport == dport) { /* Check if SYN */ if (ntohs(tcp_hdr->flags) & 02) { diff --git a/PDP10/ka10_lp.c b/PDP10/ka10_lp.c index 8047546..a612f7e 100644 --- a/PDP10/ka10_lp.c +++ b/PDP10/ka10_lp.c @@ -65,7 +65,6 @@ t_stat lpt_detach (UNIT *uptr); t_stat lpt_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr); const char *lpt_description (DEVICE *dptr); -int32 lpt_stopioe; char lpt_buffer[134 * 3]; uint8 lpt_chbuf[5]; /* Read in Character buffers */ @@ -84,9 +83,8 @@ UNIT lpt_unit = { }; REG lpt_reg[] = { - { DRDATA (STATUS, lpt_unit.STATUS, 18), PV_LEFT }, - { DRDATA (TIME, lpt_unit.wait, 24), PV_LEFT }, - { FLDATA (STOP_IOE, lpt_stopioe, 0) }, + { DRDATA (STATUS, lpt_unit.STATUS, 18), PV_LEFT | REG_UNIT }, + { DRDATA (TIME, lpt_unit.wait, 24), PV_LEFT | REG_UNIT }, { BRDATA(BUFF, lpt_buffer, 16, 8, sizeof(lpt_buffer)), REG_HRO}, { BRDATA(CBUFF, lpt_chbuf, 16, 8, sizeof(lpt_chbuf)), REG_HRO}, { NULL } @@ -207,7 +205,7 @@ uint16 utf_code[32] = { 0x222b, /* Integral */ 0x00b1, /* Plus minus */ 0x2295, /* Circle plus */ - 0x221e, /* Infinity */ + 0x221e, /* Infinity */ 0x2202, /* Partial derivitive */ 0x2282, /* Subset of */ 0x2283, /* Superset of */ @@ -252,7 +250,7 @@ lpt_output(UNIT *uptr, char c) { lpt_buffer[uptr->POS++] = c; uptr->COL++; } - if (uptr->COL == 132) + if (uptr->COL == 132) lpt_printline(uptr, 1); return; } diff --git a/PDP10/ka10_mt.c b/PDP10/ka10_mt.c index de57b58..2571893 100644 --- a/PDP10/ka10_mt.c +++ b/PDP10/ka10_mt.c @@ -197,9 +197,31 @@ MTAB mt_mod[] = { {0} }; +REG mt_reg[] = { + {BRDATA(BUFF, &mt_buffer[0], 16, 64, BUFFSIZE), REG_HRO}, + {ORDATA(PIA, pia, 3)}, + {ORDATA(UNIT, unit, 3)}, + {ORDATA(NUNIT, next_unit, 3)}, + {FLDATA(READIN, hri_mode, 0), REG_HRO}, + {FLDATA(WREOR, wr_eor, 0), REG_HRO}, + {ORDATA(STATUS, status, 18), REG_HRO}, + {ORDATA(HOLD, hold_reg, 36), REG_HRO}, + {ORDATA(MPX, mt_mpx_lvl, 3)}, + {ORDATA(CC, cc, 3), REG_RO}, + {ORDATA(DSTATUS, mt_df10.status, 18), REG_RO}, + {ORDATA(CIA, mt_df10.cia, 18)}, + {ORDATA(CCW, mt_df10.ccw, 18)}, + {ORDATA(WCR, mt_df10.wcr, 18)}, + {ORDATA(CDA, mt_df10.cda, 18)}, + {ORDATA(DEVNUM, mt_df10.devnum, 9), REG_HRO}, + {ORDATA(BUF, mt_df10.buf, 36), REG_HRO}, + {ORDATA(NXM, mt_df10.nxmerr, 8), REG_HRO}, + {ORDATA(COMP, mt_df10.ccw_comp, 8), REG_HRO}, + {0} +}; DEVICE mt_dev = { - "MTA", mt_unit, NULL, mt_mod, + "MTA", mt_unit, mt_reg, mt_mod, 8, 8, 15, 1, 8, 8, NULL, NULL, &mt_reset, &mt_boot, &mt_attach, &mt_detach, &mt_dib, DEV_DISABLE | DEV_DEBUG | DEV_TAPE, 0, dev_debug, diff --git a/PDP10/ka10_pt.c b/PDP10/ka10_pt.c index 0c4d1e0..e91e8dd 100644 --- a/PDP10/ka10_pt.c +++ b/PDP10/ka10_pt.c @@ -73,8 +73,8 @@ UNIT ptp_unit = { }; REG ptp_reg[] = { - { DRDATA (STATUS, ptp_unit.STATUS, 18), PV_LEFT }, - { DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT }, + { DRDATA (STATUS, ptp_unit.STATUS, 18), PV_LEFT | REG_UNIT}, + { DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT | REG_UNIT}, { NULL } }; @@ -97,8 +97,8 @@ UNIT ptr_unit = { }; REG ptr_reg[] = { - { DRDATA (STATUS, ptr_unit.STATUS, 18), PV_LEFT }, - { DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT }, + { DRDATA (STATUS, ptr_unit.STATUS, 18), PV_LEFT | REG_UNIT}, + { DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT | REG_UNIT}, { NULL } }; @@ -169,7 +169,7 @@ t_stat ptp_svc (UNIT *uptr) if ((uptr->flags & UNIT_ATT) == 0) { uptr->STATUS |= NO_TAPE_PP; - return SCPE_UNATT; + return SCPE_OK; } fputc (uptr->CHR, uptr->fileref); /* print char */ uptr->pos = ftell (uptr->fileref); @@ -267,7 +267,7 @@ t_stat ptr_svc (UNIT *uptr) set_interrupt(PR_DEVNUM, uptr->STATUS); if ((uptr->flags & UNIT_ATT) == 0) /* attached? */ - return SCPE_UNATT; + return SCPE_OK; word = 0; while (count > 0) { if ((temp = getc (uptr->fileref)) == EOF) { diff --git a/PDP10/ka10_rc.c b/PDP10/ka10_rc.c index 51fd1d9..74c5f53 100644 --- a/PDP10/ka10_rc.c +++ b/PDP10/ka10_rc.c @@ -162,8 +162,23 @@ MTAB rc_mod[] = { {0} }; +REG rca_reg[] = { + {BRDATA(BUFF, &rc_buf[0][0], 16, 64, RM10_WDS), REG_HRO}, + {ORDATA(IPR, rc_ipr[0], 2), REG_HRO}, + {ORDATA(STATUS, rc_df10[0].status, 18), REG_RO}, + {ORDATA(CIA, rc_df10[0].cia, 18)}, + {ORDATA(CCW, rc_df10[0].ccw, 18)}, + {ORDATA(WCR, rc_df10[0].wcr, 18)}, + {ORDATA(CDA, rc_df10[0].cda, 18)}, + {ORDATA(DEVNUM, rc_df10[0].devnum, 9), REG_HRO}, + {ORDATA(BUF, rc_df10[0].buf, 36), REG_HRO}, + {ORDATA(NXM, rc_df10[0].nxmerr, 8), REG_HRO}, + {ORDATA(COMP, rc_df10[0].ccw_comp, 8), REG_HRO}, + {0} +}; + DEVICE rca_dev = { - "FHA", rc_unit, NULL, rc_mod, + "FHA", rc_unit, rca_reg, rc_mod, NUM_UNITS_RC, 8, 18, 1, 8, 36, NULL, NULL, &rc_reset, &rc_boot, &rc_attach, &rc_detach, &rc_dib[0], DEV_DISABLE | DEV_DEBUG, 0, dev_debug, @@ -171,8 +186,23 @@ DEVICE rca_dev = { }; #if (NUM_DEVS_RC > 1) +REG rcb_reg[] = { + {BRDATA(BUFF, &rc_buf[1][0], 16, 64, RM10_WDS), REG_HRO}, + {ORDATA(IPR, rc_ipr[1], 2), REG_HRO}, + {ORDATA(STATUS, rc_df10[1].status, 18), REG_RO}, + {ORDATA(CIA, rc_df10[1].cia, 18)}, + {ORDATA(CCW, rc_df10[1].ccw, 18)}, + {ORDATA(WCR, rc_df10[1].wcr, 18)}, + {ORDATA(CDA, rc_df10[1].cda, 18)}, + {ORDATA(DEVNUM, rc_df10[1].devnum, 9), REG_HRO}, + {ORDATA(BUF, rc_df10[1].buf, 36), REG_HRO}, + {ORDATA(NXM, rc_df10[1].nxmerr, 8), REG_HRO}, + {ORDATA(COMP, rc_df10[1].ccw_comp, 8), REG_HRO}, + {0} +}; + DEVICE rcb_dev = { - "FHB", &rc_unit[010], NULL, rc_mod, + "FHB", &rc_unit[010], rcb_reg, rc_mod, NUM_UNITS_RC, 8, 18, 1, 8, 36, NULL, NULL, &rc_reset, &rc_boot, &rc_attach, &rc_detach, &rc_dib[1], DEV_DISABLE | DEV_DEBUG, 0, dev_debug, diff --git a/PDP10/ka10_rp.c b/PDP10/ka10_rp.c index 4e657eb..b438c42 100644 --- a/PDP10/ka10_rp.c +++ b/PDP10/ka10_rp.c @@ -398,8 +398,30 @@ MTAB rp_mod[] = { {0} }; +REG rpa_reg[] = { + {ORDATA(IVECT, rp_ivect[0], 18)}, + {FLDATA(IMODE, rp_imode[0], 0)}, + {ORDATA(XFER, rp_xfer_drive[0], 3), REG_HRO}, + {ORDATA(DRIVE, rp_drive[0], 3), REG_HRO}, + {ORDATA(REG, rp_reg[0], 6), REG_RO}, + {ORDATA(RAE, rp_rae[0], 8), REG_RO}, + {ORDATA(ATTN, rp_attn[0], 8), REG_RO}, + {FLDATA(READIN, readin_flag, 0), REG_HRO}, + {ORDATA(STATUS, rp_df10[0].status, 18), REG_RO}, + {ORDATA(CIA, rp_df10[0].cia, 18)}, + {ORDATA(CCW, rp_df10[0].ccw, 18)}, + {ORDATA(WCR, rp_df10[0].wcr, 18)}, + {ORDATA(CDA, rp_df10[0].cda, 18)}, + {ORDATA(DEVNUM, rp_df10[0].devnum, 9), REG_HRO}, + {ORDATA(BUF, rp_df10[0].buf, 36), REG_HRO}, + {ORDATA(NXM, rp_df10[0].nxmerr, 8), REG_HRO}, + {ORDATA(COMP, rp_df10[0].ccw_comp, 8), REG_HRO}, + {BRDATA(BUFF, &rp_buf[0][0], 16, 64, RP_NUMWD), REG_HRO}, + {0} +}; + DEVICE rpa_dev = { - "RPA", rp_unit, NULL, rp_mod, + "RPA", rp_unit, rpa_reg, rp_mod, NUM_UNITS_RP, 8, 18, 1, 8, 36, NULL, NULL, &rp_reset, &rp_boot, &rp_attach, &rp_detach, &rp_dib[0], DEV_DISABLE | DEV_DEBUG, 0, dev_debug, @@ -407,8 +429,29 @@ DEVICE rpa_dev = { }; #if (NUM_DEVS_RP > 1) +REG rpb_reg[] = { + {ORDATA(IVECT, rp_ivect[1], 18)}, + {FLDATA(IMODE, rp_imode[1], 0)}, + {ORDATA(XFER, rp_xfer_drive[1], 3), REG_HRO}, + {ORDATA(DRIVE, rp_drive[1], 3), REG_HRO}, + {ORDATA(REG, rp_reg[1], 6), REG_RO}, + {ORDATA(RAE, rp_rae[1], 8), REG_RO}, + {ORDATA(ATTN, rp_attn[1], 8), REG_RO}, + {ORDATA(STATUS, rp_df10[1].status, 18), REG_RO}, + {ORDATA(CIA, rp_df10[1].cia, 18)}, + {ORDATA(CCW, rp_df10[1].ccw, 18)}, + {ORDATA(WCR, rp_df10[1].wcr, 18)}, + {ORDATA(CDA, rp_df10[1].cda, 18)}, + {ORDATA(DEVNUM, rp_df10[1].devnum, 9), REG_HRO}, + {ORDATA(BUF, rp_df10[1].buf, 36), REG_HRO}, + {ORDATA(NXM, rp_df10[1].nxmerr, 8), REG_HRO}, + {ORDATA(COMP, rp_df10[1].ccw_comp, 8), REG_HRO}, + {BRDATA(BUFF, &rp_buf[1][0], 16, 64, RP_NUMWD), REG_HRO}, + {0} +}; + DEVICE rpb_dev = { - "RPB", &rp_unit[010], NULL, rp_mod, + "RPB", &rp_unit[010], rpb_reg, rp_mod, NUM_UNITS_RP, 8, 18, 1, 8, 36, NULL, NULL, &rp_reset, &rp_boot, &rp_attach, &rp_detach, &rp_dib[1], DEV_DISABLE | DEV_DEBUG, 0, dev_debug, @@ -416,8 +459,29 @@ DEVICE rpb_dev = { }; #if (NUM_DEVS_RP > 2) +REG rpc_reg[] = { + {ORDATA(IVECT, rp_ivect[2], 18)}, + {FLDATA(IMODE, rp_imode[2], 0)}, + {ORDATA(XFER, rp_xfer_drive[2], 3), REG_HRO}, + {ORDATA(DRIVE, rp_drive[2], 3), REG_HRO}, + {ORDATA(REG, rp_reg[2], 6), REG_RO}, + {ORDATA(RAE, rp_rae[2], 8), REG_RO}, + {ORDATA(ATTN, rp_attn[2], 8), REG_RO}, + {ORDATA(STATUS, rp_df10[2].status, 18), REG_RO}, + {ORDATA(CIA, rp_df10[2].cia, 18)}, + {ORDATA(CCW, rp_df10[2].ccw, 18)}, + {ORDATA(WCR, rp_df10[2].wcr, 18)}, + {ORDATA(CDA, rp_df10[2].cda, 18)}, + {ORDATA(DEVNUM, rp_df10[2].devnum, 9), REG_HRO}, + {ORDATA(BUF, rp_df10[2].buf, 36), REG_HRO}, + {ORDATA(NXM, rp_df10[2].nxmerr, 8), REG_HRO}, + {ORDATA(COMP, rp_df10[2].ccw_comp, 8), REG_HRO}, + {BRDATA(BUFF, &rp_buf[2][0], 16, 64, RP_NUMWD), REG_HRO}, + {0} +}; + DEVICE rpc_dev = { - "RPC", &rp_unit[020], NULL, rp_mod, + "RPC", &rp_unit[020], rpc_reg, rp_mod, NUM_UNITS_RP, 8, 18, 1, 8, 36, NULL, NULL, &rp_reset, &rp_boot, &rp_attach, &rp_detach, &rp_dib[2], DEV_DISABLE | DEV_DIS | DEV_DEBUG, 0, dev_debug, @@ -425,8 +489,29 @@ DEVICE rpc_dev = { }; #if (NUM_DEVS_RP > 3) +REG rpd_reg[] = { + {ORDATA(IVECT, rp_ivect[3], 18)}, + {FLDATA(IMODE, rp_imode[3], 0)}, + {ORDATA(XFER, rp_xfer_drive[3], 3), REG_HRO}, + {ORDATA(DRIVE, rp_drive[3], 3), REG_HRO}, + {ORDATA(REG, rp_reg[3], 6), REG_RO}, + {ORDATA(RAE, rp_rae[3], 8), REG_RO}, + {ORDATA(ATTN, rp_attn[3], 8), REG_RO}, + {ORDATA(STATUS, rp_df10[3].status, 18), REG_RO}, + {ORDATA(CIA, rp_df10[3].cia, 18)}, + {ORDATA(CCW, rp_df10[3].ccw, 18)}, + {ORDATA(WCR, rp_df10[3].wcr, 18)}, + {ORDATA(CDA, rp_df10[3].cda, 18)}, + {ORDATA(DEVNUM, rp_df10[3].devnum, 9), REG_HRO}, + {ORDATA(BUF, rp_df10[3].buf, 36), REG_HRO}, + {ORDATA(NXM, rp_df10[3].nxmerr, 8), REG_HRO}, + {ORDATA(COMP, rp_df10[3].ccw_comp, 8), REG_HRO}, + {BRDATA(BUFF, &rp_buf[3][0], 16, 64, RP_NUMWD), REG_HRO}, + {0} +}; + DEVICE rpd_dev = { - "RPD", &rp_unit[030], NULL, rp_mod, + "RPD", &rp_unit[030], rpd_reg, rp_mod, NUM_UNITS_RP, 8, 18, 1, 8, 36, NULL, NULL, &rp_reset, &rp_boot, &rp_attach, &rp_detach, &rp_dib[3], DEV_DISABLE | DEV_DIS | DEV_DEBUG, 0, dev_debug, diff --git a/PDP10/ka10_rs.c b/PDP10/ka10_rs.c index 24fe795..9464f18 100644 --- a/PDP10/ka10_rs.c +++ b/PDP10/ka10_rs.c @@ -283,8 +283,30 @@ MTAB rs_mod[] = { {0} }; +REG rsa_reg[] = { + {ORDATA(IVECT, rs_ivect[0], 18)}, + {FLDATA(IMODE, rs_imode[0], 0)}, + {ORDATA(XFER, rs_xfer_drive[0], 3), REG_HRO}, + {ORDATA(DRIVE, rs_drive[0], 3), REG_HRO}, + {ORDATA(REG, rs_reg[0], 6), REG_RO}, + {ORDATA(RAE, rs_rae[0], 8), REG_RO}, + {ORDATA(ATTN, rs_attn[0], 8), REG_RO}, + {FLDATA(READIN, readin_flag, 0), REG_HRO}, + {ORDATA(STATUS, rs_df10[0].status, 18), REG_RO}, + {ORDATA(CIA, rs_df10[0].cia, 18)}, + {ORDATA(CCW, rs_df10[0].ccw, 18)}, + {ORDATA(WCR, rs_df10[0].wcr, 18)}, + {ORDATA(CDA, rs_df10[0].cda, 18)}, + {ORDATA(DEVNUM, rs_df10[0].devnum, 9), REG_HRO}, + {ORDATA(BUF, rs_df10[0].buf, 36), REG_HRO}, + {ORDATA(NXM, rs_df10[0].nxmerr, 8), REG_HRO}, + {ORDATA(COMP, rs_df10[0].ccw_comp, 8), REG_HRO}, + {BRDATA(BUFF, &rs_buf[0][0], 16, 64, RS_NUMWD), REG_HRO}, + {0} +}; + DEVICE rsa_dev = { - "FSA", rs_unit, NULL, rs_mod, + "FSA", rs_unit, rsa_reg, rs_mod, NUM_UNITS_RS, 8, 18, 1, 8, 36, NULL, NULL, &rs_reset, &rs_boot, &rs_attach, &rs_detach, &rs_dib[0], DEV_DISABLE | DEV_DIS | DEV_DEBUG, 0, dev_debug, diff --git a/PDP10/ka10_tu.c b/PDP10/ka10_tu.c index 24d78fc..e39c48e 100644 --- a/PDP10/ka10_tu.c +++ b/PDP10/ka10_tu.c @@ -266,6 +266,30 @@ MTAB tu_mod[] = { {0} }; +REG tua_reg[] = { + {ORDATA(IVECT, tu_ivect[0], 18)}, + {FLDATA(IMODE, tu_imode[0], 0)}, + {ORDATA(FRAME, tu_frame[0], 16)}, + {ORDATA(TCR, tu_tcr[0], 16)}, + {ORDATA(XFER, tu_xfer_drive[0], 3), REG_HRO}, + {ORDATA(DRIVE, tu_drive[0], 3), REG_HRO}, + {ORDATA(REG, tu_reg[0], 6), REG_RO}, + {ORDATA(RAE, tu_rae[0], 8), REG_RO}, + {ORDATA(ATTN, tu_attn[0], 8), REG_RO}, + {FLDATA(READIN, readin_flag, 0), REG_HRO}, + {ORDATA(STATUS, tu_df10[0].status, 18), REG_RO}, + {ORDATA(CIA, tu_df10[0].cia, 18)}, + {ORDATA(CCW, tu_df10[0].ccw, 18)}, + {ORDATA(WCR, tu_df10[0].wcr, 18)}, + {ORDATA(CDA, tu_df10[0].cda, 18)}, + {ORDATA(DEVNUM, tu_df10[0].devnum, 9), REG_HRO}, + {ORDATA(BUF, tu_df10[0].buf, 36), REG_HRO}, + {ORDATA(NXM, tu_df10[0].nxmerr, 8), REG_HRO}, + {ORDATA(COMP, tu_df10[0].ccw_comp, 8), REG_HRO}, + {BRDATA(BUFF, &tu_buf[0][0], 16, 64, TU_NUMFR), REG_HRO}, + {0} +}; + DEVICE tua_dev = { "TUA", tu_unit, NULL, tu_mod, NUM_UNITS_TU, 8, 18, 1, 8, 36,