mirror of
https://github.com/rcornwell/sims.git
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KA10: Fixed PTR to boot correctly, Fixed Rim Loader.
Fixed PTR to boot correctly. RIM appears to leave device running. Fixed MTA to read in a ITS tape. Fixed load of RIM10 file to be correct.
This commit is contained in:
Richard Cornwell
parent
387ae9aa53
commit
49b580a727
@ -50,8 +50,7 @@
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#define MTUF_7TRK (1 << MTUF_V_UF)
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#define BUFFSIZE (32 * 1024)
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#define UNIT_MT(x) UNIT_ATTABLE | UNIT_DISABLE | UNIT_ROABLE | \
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UNIT_S_CHAN(x)
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#define UNIT_MT UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+UNIT_ROABLE
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#define LT 66 /* Time per char low density */
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#define HT 16 /* Time per char high density */
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@ -160,22 +159,14 @@ uint8 mt_buffer[BUFFSIZE];
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UNIT mt_unit[] = {
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/* Controller 1 */
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{UDATA(&mt_srv, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE, 0)}, /* 0 */
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{UDATA(&mt_srv, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE, 0)}, /* 1 */
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{UDATA(&mt_srv, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE, 0)}, /* 2 */
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{UDATA(&mt_srv, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE, 0)}, /* 3 */
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{UDATA(&mt_srv, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE, 0)}, /* 4 */
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{UDATA(&mt_srv, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE, 0)}, /* 5 */
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{UDATA(&mt_srv, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE, 0)}, /* 6 */
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{UDATA(&mt_srv, UNIT_FIX+UNIT_ATTABLE+UNIT_DISABLE+
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UNIT_ROABLE, 0)}, /* 7 */
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{UDATA(&mt_srv, UNIT_MT, 0)}, /* 0 */
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{UDATA(&mt_srv, UNIT_MT, 0)}, /* 1 */
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{UDATA(&mt_srv, UNIT_MT, 0)}, /* 2 */
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{UDATA(&mt_srv, UNIT_MT, 0)}, /* 3 */
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{UDATA(&mt_srv, UNIT_MT, 0)}, /* 4 */
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{UDATA(&mt_srv, UNIT_MT, 0)}, /* 5 */
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{UDATA(&mt_srv, UNIT_MT, 0)}, /* 6 */
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{UDATA(&mt_srv, UNIT_MT, 0)}, /* 7 */
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};
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DIB mt_dib = {MT_DEVNUM, 2, &mt_devio, NULL};
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@ -793,6 +784,7 @@ mt_boot(int32 unit_num, DEVICE * dptr)
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r = sim_tape_rewind(uptr);
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if (r != SCPE_OK)
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return r;
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uptr->u3 = 022200; /* Read 800 BPI, Core */
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r = sim_tape_rdrecf(uptr, &mt_buffer[0], &reclen, BUFFSIZE);
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if (r != SCPE_OK)
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return r;
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@ -805,11 +797,12 @@ mt_boot(int32 unit_num, DEVICE * dptr)
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while (wc != 0) {
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wc = (wc + 1) & RMASK;
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addr = (addr + 1) & RMASK;
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if ((uint32)uptr->u6 >= reclen) {
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if ((uint32)uptr->u6 >= uptr->hwmark) {
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r = sim_tape_rdrecf(uptr, &mt_buffer[0], &reclen, BUFFSIZE);
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if (r != SCPE_OK)
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return r;
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uptr->u6 = 0;
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uptr->hwmark = reclen;
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}
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mt_read_word(uptr);
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if (addr < 020)
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@ -817,7 +810,18 @@ mt_boot(int32 unit_num, DEVICE * dptr)
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else
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M[addr] = mt_df10.buf;
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}
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PC = addr;
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if (addr < 020)
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FM[addr] = mt_df10.buf;
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else
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M[addr] = mt_df10.buf;
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/* If not at end of record and TMA continue record read */
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if ((uptr->u6 < uptr->hwmark) && (dptr->flags & MTDF_TYPEB) == 0) {
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uptr->u3 |= MT_MOTION|MT_BUSY;
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uptr->u3 &= ~(MT_BRFUL|MT_BUFFUL);
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sim_activate(uptr, 300);
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}
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PC = mt_df10.buf & RMASK;
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return SCPE_OK;
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}
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@ -69,7 +69,7 @@ const char *ptr_description (DEVICE *dptr);
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DIB ptp_dib = { PP_DEVNUM, 1, &ptp_devio, NULL };
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UNIT ptp_unit = {
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UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_TEXT, 0), SERIAL_OUT_WAIT
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UDATA (&ptp_svc, UNIT_ATTABLE+UNIT_TEXT, 0), SERIAL_OUT_WAIT
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};
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REG ptp_reg[] = {
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@ -93,7 +93,7 @@ DEVICE ptp_dev = {
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DIB ptr_dib = { PR_DEVNUM, 1, &ptr_devio, NULL };
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UNIT ptr_unit = {
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UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_TEXT, 0), SERIAL_OUT_WAIT
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UDATA (&ptr_svc, UNIT_ATTABLE+UNIT_TEXT, 0), SERIAL_OUT_WAIT
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};
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REG ptr_reg[] = {
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@ -295,15 +295,15 @@ t_stat ptr_svc (UNIT *uptr)
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uint64
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ptr_read_word(UNIT *uptr) {
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int i, ch;
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uint64 word;
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uint64 word = 0;
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for(i = 0; i <= 6;) {
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if ((ch = getc (uptr->fileref)) == EOF) {
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if (ch & 0200) {
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word <<= 6;
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word |= (uint64)(ch & 077);
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i++;
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}
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for(i = 0; i < 6;) {
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if ((ch = getc (uptr->fileref)) == EOF)
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return word;
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if (ch & 0200) {
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word <<= 6;
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word |= (uint64)(ch & 077);
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i++;
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}
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}
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return word;
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@ -332,7 +332,15 @@ ptr_boot(int32 unit_num, DEVICE * dptr)
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else
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M[addr] = word;
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}
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PC = addr;
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if (addr < 020)
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FM[addr] = word;
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else
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M[addr] = word;
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uptr->STATUS = BUSY_FLG|BIN_FLG|TAPE_PR;
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uptr->CHR = 0;
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uptr->CHL = 0;
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sim_activate (&ptr_unit, ptr_unit.wait);
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PC = word & RMASK;
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return SCPE_OK;
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}
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@ -206,22 +206,22 @@ int32 op, i, ldrc;
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data = getrimw (fileref); /* get first word */
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if ((data < 0) || ((data & AMASK) != 0)) /* error? SA != 0? */
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return SCPE_FMT;
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ldrc = -((int32) ((data >> 18) & RMASK)); /* get loader count */
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ldrc = 1 + (RMASK ^ ((int32) ((data >> 18) & RMASK))); /* get loader count */
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if (ldrc == 016) /* 16? RIM10B */
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its_rim = FALSE;
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else if (ldrc == 017) /* 17? ITS RIM */
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its_rim = TRUE;
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else SCPE_FMT; /* unknown */
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else return SCPE_FMT; /* unknown */
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for (i = 0; i < ldrc; i++) { /* skip the loader */
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data = getrimw (fileref);
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if (data < 0)
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if (data == RIM_EOF)
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return SCPE_FMT;
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}
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for ( ;; ) { /* loop until JRST */
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count = cksm = getrimw (fileref); /* get header */
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if (count == RIM_EOF) /* read err? */
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if (count == RIM_EOF) /* read err? */
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return SCPE_FMT;
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if (TSTS (count)) { /* hdr = IOWD? */
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for ( ; TSTS (count); count = AOB (count)) {
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@ -229,29 +229,27 @@ for ( ;; ) { /* loop until JRST */
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if (data == RIM_EOF)
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return SCPE_FMT;
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if (its_rim) { /* ITS RIM? */
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cksm = (((cksm << 1) | (cksm >> 35)) + data) & FMASK;
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cksm = (((cksm << 1) | (cksm >> 35))) & FMASK;
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/* add to rotated cksm */
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pa = ((uint32) count) & RMASK; /* store */
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pa = ((uint32) count) & RMASK; /* store */
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}
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else { /* RIM10B */
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cksm = (cksm + data) & FMASK; /* add to cksm */
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pa = ((uint32) count + 1) & RMASK; /* store */
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pa = ((uint32) count + 1) & RMASK; /* store */
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}
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cksm = cksm + data; /* add to cksm */
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pa = ((uint32) count + 1) & RMASK; /* store */
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cksm = (cksm + data) & FMASK; /* add to cksm */
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M[pa] = data;
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} /* end for */
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data = getrimw (fileref); /* get cksm */
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if (data == RIM_EOF)
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return SCPE_FMT;
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if ((cksm + data) & FMASK) /* test cksm */
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if (cksm != data) /* test cksm */
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return SCPE_CSUM;
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} /* end if count */
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else {
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op = GET_OP (count); /* not IOWD */
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if (op != OP_JRST) /* JRST? */
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return SCPE_FMT;
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PC = (uint32) count & RMASK; /* set PC */
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PC = (uint32) count & RMASK; /* set PC */
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break;
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} /* end else */
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} /* end for */
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