From 51d47a7346b00d8f62a1a96d1e655fc2ff9bf7b5 Mon Sep 17 00:00:00 2001 From: AZBevier Date: Sat, 23 Jan 2021 15:42:16 -0700 Subject: [PATCH] SEL32: Correct right halfword nop processing. SEL32: Add track/sector replacement support for HSDP. SEL32: DO some general code cleanup. --- SEL32/README.md | 4 +- SEL32/sel32_chan.c | 72 ++-- SEL32/sel32_com.c | 4 +- SEL32/sel32_con.c | 17 +- SEL32/sel32_cpu.c | 172 +++++----- SEL32/sel32_disk.c | 54 ++- SEL32/sel32_ec.c | 13 +- SEL32/sel32_hsdp.c | 808 +++++++++++++++++++++++++++++---------------- SEL32/sel32_mt.c | 6 +- SEL32/sel32_scfi.c | 10 + SEL32/sel32_scsi.c | 76 +++-- 11 files changed, 760 insertions(+), 476 deletions(-) diff --git a/SEL32/README.md b/SEL32/README.md index 7565ffd..90edb71 100644 --- a/SEL32/README.md +++ b/SEL32/README.md @@ -49,7 +49,7 @@ diag.tap bootable level one diagnostic tape w/auto testing. Set cpu models now run all diagnostics provided on the diagnostic tape. Running DEXP stand alone causes input to stop after a few characters are entered. More - itesting is still required. + testing is still required. CV.CSL - Firmware control diag. Disabled in auto testing. CV.CP1 - CPU diag part 1 runs OK. @@ -93,5 +93,5 @@ Other MPX verion support: disk image of a bootable system. James C. Bevier -06/30/2020 +01/23/2021 diff --git a/SEL32/sel32_chan.c b/SEL32/sel32_chan.c index fd96750..2d980c4 100644 --- a/SEL32/sel32_chan.c +++ b/SEL32/sel32_chan.c @@ -224,7 +224,6 @@ int32 RDYQ_Put(uint32 entry) //ZZwaitrdyq = 8; //XXwaitrdyq = 5; // waitrdyq = 2; -// waitrdyq = 1; /* wait at least 1 instruction */ waitrdyq = 1; /* wait at least 1 instruction */ #endif return SCPE_OK; /* all OK */ @@ -510,6 +509,14 @@ int readfull(CHANP *chp, uint32 maddr, uint32 *word) } *word = RMW(maddr); /* get 1 word */ sim_debug(DEBUG_XIO, &cpu_dev, "READFULL read %08x from addr %08x\n", *word, maddr); +#if 0 +#define DO_DYNAMIC_DEBUG +#ifdef DO_DYNAMIC_DEBUG + if (*word == 0x0a0030a1) { + cpu_dev.dctrl |= DEBUG_INST; /* start instruction trace */ + } +#endif +#endif return 0; /* return OK */ } @@ -614,7 +621,7 @@ loop: return 1; } -#ifdef WHATISTHIS +#ifdef DONOTUSETHIS /* Check if we have status modifier set */ if (chp->chan_status & STATUS_MOD) { chp->chan_caw += 8; /* move to next IOCD */ @@ -645,6 +652,16 @@ loop: chp->chan_caw = (chp->chan_caw & 0xfffffc) + 8; /* point to next IOCD */ chp->ccw_cmd = (word1 >> 24) & 0xff; /* set command from IOCD wd 1 */ + /* Check if we had data chaining in previous iocd */ + /* if we did, use previous cmd value */ + if (((chp->chan_info & INFO_SIOCD) == 0) && /* see if 1st IOCD in channel prog */ + (chp->ccw_flags & FLAG_DC)) { /* last IOCD have DC set? */ + sim_debug(DEBUG_CMD, &cpu_dev, + "ec_iocl @%06x DO DC, ccw_flags %04x cmd %02x\n", + chp->chan_caw, chp->ccw_flags, chp->ccw_cmd); + } else + chp->ccw_cmd = (word1 >> 24) & 0xff; /* set new command from IOCD wd 1 */ + if (!MEM_ADDR_OK(word1 & MASK24)) { /* see if memory address invalid */ chp->chan_status |= STATUS_PCHK; /* bad, program check */ //** uptr->SNS |= SNS_INAD; /* invalid address status */ @@ -699,7 +716,6 @@ loop: "load_ccw tic cmd bad address chan %02x tic caw %06x IOCD wd 1 %08x\n", chan, chp->chan_caw, word1); chp->chan_status |= STATUS_PCHK; /* program check for invalid tic */ -// chp->chan_caw = word1; /* get new IOCD address */ chp->chan_caw = word1 & MASK24; /* get new IOCD address */ //** uptr->SNS |= SNS_CMDREJ; /* cmd rejected status */ //** uptr->SNS |= SNS_INAD; /* invalid address status */ @@ -712,7 +728,6 @@ loop: chan, chp->chan_caw, word1); goto loop; /* restart the IOCD processing */ } -// chp->chan_caw = word1; /* get new IOCD address */ chp->chan_caw = word1 & MASK24; /* get new IOCD address */ chp->chan_status |= STATUS_PCHK; /* program check for invalid tic */ //** uptr->SNS |= SNS_CMDREJ; /* cmd rejected status */ @@ -754,7 +769,6 @@ loop: #ifndef NOT_FOR_EVERYONE /* DC can only be used with a read/write cmd */ if (chp->ccw_flags & FLAG_DC) { -// if ((chp->ccw_cmd != DSK_RD) && (chp->ccw_cmd != DSK_WD)) { if ((chp->ccw_cmd != 0x02) && (chp->ccw_cmd != 0x01)) { chp->chan_status |= STATUS_PCHK; /* program check for invalid DC */ //** uptr->SNS |= SNS_CHER; /* chaining error */ @@ -799,8 +813,6 @@ loop: if (chp->chan_status & (STATUS_ATTN|STATUS_ERROR)) { chp->chan_status |= STATUS_CEND; /* channel end status */ chp->ccw_flags = 0; /* no flags */ -// /* see if chan_end already called */ -// if (chp->chan_byte == BUFF_NEXT) { /* see if chan_end already called */ if (chp->chan_info & INFO_CEND) { sim_debug(DEBUG_EXP, &cpu_dev, @@ -821,7 +833,7 @@ loop: /* NOTE this code needed for MPX 1.X to run! */ /* see if command completed */ /* we have good status */ - /* TODO Test if chan_end called? */ + /* TODO Test if chan_end called? */ if (chp->chan_status & (STATUS_DEND|STATUS_CEND)) { uint16 chsa = GET_UADDR(uptr->u3); /* get channel & sub address */ chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* show I/O complete */ @@ -898,8 +910,7 @@ int test_write_byte_end(uint16 chsa) return 1; /* return done */ if (chp->ccw_count == 0) { if ((chp->ccw_flags & FLAG_DC) == 0) { /* see if we have data chaining */ -//1003 chp->chan_status |= STATUS_CEND; /* no, end of data */ -/*122320*/ chp->chan_byte = BUFF_CHNEND; /* thats all the data we want */ + chp->chan_byte = BUFF_CHNEND; /* thats all the data we want */ //sim_debug(DEBUG_EXP, &cpu_dev, //"test_write_byte BUFF_CHNEND chp %p chan_byte %04x\n", chp, chp->chan_byte); return 1; /* return done */ @@ -1165,7 +1176,6 @@ void chan_end(uint16 chsa, uint16 flags) { store_csw(chp); /* store the status */ /* change chan_byte to BUFF_POST */ chp->chan_byte = BUFF_POST; /* show done with data */ -// chp->chan_status = 0; /* no status anymore */ chp->ccw_cmd = 0; /* no command anymore */ if (chp->chan_status & STATUS_ERROR) { /* check channel error status */ @@ -1263,7 +1273,6 @@ int16 post_csw(CHANP *chp, uint32 rstat) chsa, FIFO_Num(chsa), incha, chan_icb, sw1, sw2); return 1; /* show we posted status */ } - // 717 added sim_debug(DEBUG_EXP, &cpu_dev, "post_csw %04x chp %p READ FIFO #%1x inch %06x No Status chan_byte %02x\n", chsa, chp, FIFO_Num(chsa), incha, chp->chan_byte); @@ -1289,6 +1298,8 @@ void store_csw(CHANP *chp) sim_debug(DEBUG_XIO, &cpu_dev, "store_csw FIFO #%1x write chsa %04x sw1 %08x sw2 %08x incha %08x cmd %02x\n", FIFO_Num(chsa), chsa, stwd1, stwd2, chp->chan_inch_addr, chp->ccw_cmd); + /* added 011321 */ + INTS[chp->chan_int] |= INTS_REQ; /* request an interrupt for channel */ irq_pend = 1; /* wakeup controller */ } @@ -1386,7 +1397,10 @@ t_stat startxio(uint16 lchsa, uint32 *status) { uint16 lchan = get_chan(lchsa); /* get the logical channel number */ uint16 chsa; uint32 tempa, inta, spadent, chan, incha; - uint32 word1, word2, cmd, itva; + uint32 word1, word2, cmd; +#ifdef DEBUG_DISK + uint32 itva; +#endif DEVICE *dptr; sim_debug(DEBUG_XIO, &cpu_dev, "startxio entry logical chsa %04x\n", lchsa); @@ -1399,13 +1413,9 @@ t_stat startxio(uint16 lchsa, uint32 *status) { sim_debug(DEBUG_XIO, &cpu_dev, "startxio entry inta %02x lchan %04x spadent %08x rchsa %04x\n", inta, lchan, spadent, chsa); - dibp = dib_unit[chsa & 0x7f00]; /* get the device information pointer */ -// uptr = find_unit_ptr(chsa); /* find pointer to unit on channel */ - /* FIXME */ - /* chp will be NULL for odd disk address */ -// chp = find_chanp_ptr(chsa); /* find the chanp pointer */ - uptr = find_unit_ptr(chsa&0x7f00); /* get unit 0 unit pointer */ + dibp = dib_unit[chsa & 0x7f00]; /* get the device information pointer */ + uptr = find_unit_ptr(chsa & 0x7f00); /* get unit 0 unit pointer */ if (uptr != NULL) { dptr = get_dev(uptr); /* get device address */ if ((dptr != NULL) && @@ -1413,8 +1423,8 @@ t_stat startxio(uint16 lchsa, uint32 *status) { chsa = chsa & 0x7ffe; /* clear the odd subaddress */ } } -#ifndef DEBUG_DISK -// chan_icb = find_int_icb(lchsa); /* Interrupt level context block address */ + chan_icb = find_int_icb(lchsa); /* Interrupt level context block address */ +#ifdef DEBUG_DISK itva = SPAD[0xf1] + (inta<<2); /* int vector address */ chan_icb = RMW(itva); /* Interrupt context block addr */ iocla = RMW(chan_icb+16); /* iocla is in wd 4 of ICB */ @@ -1456,8 +1466,8 @@ missing: return SCPE_OK; /* not found, CC3 */ } +#ifdef FOR_DEBUG // inta = find_int_lev(chsa); /* Interrupt Level for channel */ -#ifndef FOR_DEBUG if ((INTS[inta]&INTS_ACT) || (SPAD[inta+0x80]&SINT_ACT)) { /* look for level active */ /* just output a warning */ sim_debug(DEBUG_XIO, &cpu_dev, @@ -1478,7 +1488,6 @@ missing: /* ethernet controller wants an interrupt for busy status */ if ((dptr != NULL) && (DEV_TYPE(dptr) == DEV_ETHER)) { /* see if this is ethernet */ -// if (DEV_TYPE(dptr) == DEV_ETHER) { *status = CC1BIT; /* CCs = 1, SIO accepted & queued, no echo status */ /* handle an Ethernet controller busy by sending interrupt/status */ chp->chan_status = STATUS_BUSY|STATUS_CEND|STATUS_DEND; /* set busy status */ @@ -1685,7 +1694,6 @@ t_stat testxio(uint16 lchsa, uint32 *status) { /* test XIO */ "TIO rchsa %04x LOOK FIFO #%1x irq %02x inch %06x chp %p icba %06x chan_byte %02x\n", rchsa, FIFO_Num(rchsa), inta, chp->chan_inch_addr, chp, chan_icb, chp->chan_byte); if (post_csw(chp, 0)) { -//120120/*112120*/ chp->chan_byte = BUFF_DONE; /* show done & not busy */ sim_debug(DEBUG_IRQ, &cpu_dev, "TIO rchsa %04x POST FIFO #%1x irq %02x inch %06x chan_icba+20 %08x chan_byte %02x\n", rchsa, FIFO_Num(rchsa), inta, chp->chan_inch_addr, RMW(chan_icb+20), chp->chan_byte); @@ -1805,7 +1813,6 @@ t_stat stopxio(uint16 lchsa, uint32 *status) { /* stop XIO */ chp->ccw_count = 0; /* zero the count */ /* post status for UTX */ if (post_csw(chp, ((STATUS_PCI) << 16))) { -//120120/*112120*/ chp->chan_byte = BUFF_DONE; /* show done & not busy */ INTS[inta] &= ~INTS_REQ; /* clear any level request */ *status = CC2BIT; /* status stored */ sim_debug(DEBUG_CMD, &cpu_dev, @@ -1872,9 +1879,7 @@ t_stat rschnlxio(uint16 lchsa, uint32 *status) { /* reset channel XIO */ sim_debug(DEBUG_XIO, &cpu_dev, "rschnlxio entry lchan %04x rchan %04x\n", lchan, rchan); /* get the device entry for the logical channel in SPAD */ -// dibp = dib_chan[get_chan(rchsa)]; /* get the channel device information pointer */ dibp = dib_unit[rchsa]; /* get the channel device information pointer */ -// chp = find_chanp_ptr(rchan); /* find the channel chanp pointer */ chp = find_chanp_ptr(rchsa); /* find the channel chanp pointer */ if (dibp == 0 || chp == 0) { /* if no dib or channel ptr, CC3 return */ @@ -2011,7 +2016,6 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */ chp->ccw_count = 0; /* zero the count */ /* post status for UTX */ if (post_csw(chp, ((STATUS_PCI) << 16))) { -//120120/*112120*/ chp->chan_byte = BUFF_DONE; /* show done & not busy */ INTS[inta] &= ~INTS_REQ; /* clear any level request */ *status = CC2BIT; /* status stored */ sim_debug(DEBUG_CMD, &cpu_dev, @@ -2070,7 +2074,6 @@ t_stat haltxio(uint16 lchsa, uint32 *status) { /* halt XIO */ #ifndef JUNK chp->chan_byte = BUFF_DONE; /* we are done */ sim_debug(DEBUG_EXP, &cpu_dev, "haltxio BUFF_DONE chp %p chan_byte %04x\n", chp, chp->chan_byte); -//1204 chp->chan_status = (STATUS_DEND|STATUS_CEND); /*1204*/chp->chan_status = (STATUS_DEND|STATUS_CEND|STATUS_EXPT); store_csw(chp); /* store the status */ /* change chan_byte to BUFF_POST */ @@ -2102,7 +2105,6 @@ sim_debug(DEBUG_EXP, &cpu_dev, "haltxio BUFF_DONE chp %p chan_byte %04x\n", chp, chp->ccw_count = 0; /* zero the count */ /* remove SLI, PPCI and Unit check status bits */ if (post_csw(chp, ((STATUS_PCI) << 16))) { -//120120/*112120*/ chp->chan_byte = BUFF_DONE; /* show done & not busy */ INTS[inta] &= ~INTS_REQ; /* clear any level request */ *status = CC2BIT; /* status stored from SIO, so CC2 */ sim_debug(DEBUG_CMD, &cpu_dev, @@ -2320,6 +2322,13 @@ t_stat chan_boot(uint16 chsa, DEVICE *dptr) { chp->ccw_flags = 0; /* Command chain and supress incorrect length */ chp->chan_info = INFO_SIOCD; /* show first IOCD in channel prog */ chp->ccw_cmd = 0; /* read command */ + /* moved here to not destry loc 0-0x14 on reset/go cmds */ + M[0] = 0x02000000; /* 0x00 IOCD 1 read into address 0 */ + M[1] = 0x60000078; /* 0x04 IOCD 1 CMD Chain, Suppress incor length, 120 bytes */ + M[2] = 0x53000000; /* 0x08 IOCD 2 BKSR or RZR to re-read boot code */ + M[3] = 0x60000001; /* 0x0C IOCD 2 CMD chain,Supress incor length, 1 byte */ + M[4] = 0x02000000; /* 0x10 IOCD 3 Read into address 0 */ + M[5] = 0x000006EC; /* 0x14 IOCD 3 Read 0x6EC bytes */ loading = chsa; /* show we are loading from the boot device */ sim_debug(DEBUG_CMD, &cpu_dev, "Channel Boot calling load_ccw chan %04x status %08x\n", @@ -2512,7 +2521,7 @@ uint32 scan_chan(uint32 *ilev) { #else if (CPUSTATUS & BIT24) { /* interrupts blocked? */ #endif - if (waitqcnt) /* interrupts blocked? */ + if (waitqcnt) /* doing wait delay? */ sim_debug(DEBUG_DETAIL, &cpu_dev, // sim_debug(DEBUG_IRQ, &cpu_dev, "scan_chan waitqcnt %02x\n", waitqcnt); @@ -2587,7 +2596,6 @@ uint32 scan_chan(uint32 *ilev) { "scan_chan %04x LOOK FIFO #%1x irq %02x inch %06x chp %p icba %06x chan_byte %02x\n", chsa, FIFO_Num(chan), i, chp->chan_inch_addr, chp, chan_icba, chp->chan_byte); if (post_csw(chp, 0)) { -//120120/*112120*/ chp->chan_byte = BUFF_DONE; /* show done & not busy */ sim_debug(DEBUG_IRQ, &cpu_dev, "scan_chanx %04x POST FIFO #%1x irq %02x inch %06x chan_icba+20 %08x chan_byte %02x\n", chan, FIFO_Num(chan), i, chp->chan_inch_addr, RMW(chan_icba+20), chp->chan_byte); diff --git a/SEL32/sel32_com.c b/SEL32/sel32_com.c index 406682f..a8b041b 100644 --- a/SEL32/sel32_com.c +++ b/SEL32/sel32_com.c @@ -376,7 +376,9 @@ void com_ini(UNIT *uptr, t_bool f) DEVICE *dptr = get_dev(uptr); sim_debug(DEBUG_CMD, dptr, "COM init device %s controller 0x7e00\n", dptr->name); - sim_activate(uptr, 1000); /* time increment */ +//01sim_activate(uptr, 1000); /* time increment */ + sim_cancel(uptr); /* stop input poll */ + sim_activate(uptr, 1000); /* start input poll */ } /* called from sel32_chan to start an I/O operation */ diff --git a/SEL32/sel32_con.c b/SEL32/sel32_con.c index 1eaeb70..032df1d 100644 --- a/SEL32/sel32_con.c +++ b/SEL32/sel32_con.c @@ -54,13 +54,13 @@ /* Status held in u3 */ /* controller/unit address in upper 16 bits */ -#define CON_INPUT 0x0100 /* Input ready for unit */ -#define CON_CR 0x0200 /* Output at beginning of line */ -#define CON_REQ 0x0400 /* Request key pressed */ -#define CON_EKO 0x0800 /* Echo input character */ -#define CON_OUTPUT 0x1000 /* Output ready for unit */ -#define CON_READ 0x2000 /* Read mode selected */ #define CON_ATAT 0x4000 /* working on @@A input */ +#define CON_READ 0x2000 /* Read mode selected */ +#define CON_OUTPUT 0x1000 /* Output ready for unit */ +#define CON_EKO 0x0800 /* Echo input character */ +#define CON_REQ 0x0400 /* Request key pressed */ +#define CON_CR 0x0200 /* Output at beginning of line */ +#define CON_INPUT 0x0100 /* Input ready for unit */ /* Input buffer pointer held in u4 */ @@ -156,7 +156,10 @@ void con_ini(UNIT *uptr, t_bool f) { con_data[unit].incnt = 0; /* no input data */ uptr->CMD &= LMASK; /* leave only chsa */ uptr->SNS = SNS_RDY|SNS_ONLN; /* status is online & ready */ - sim_activate(uptr, 1000); /* time increment */ + if (unit == 0) { + sim_cancel(uptr); /* stop input poll */ + sim_activate(uptr, 1000); /* start input poll */ + } } /* start a console operation */ diff --git a/SEL32/sel32_cpu.c b/SEL32/sel32_cpu.c index bde180a..659f3a2 100644 --- a/SEL32/sel32_cpu.c +++ b/SEL32/sel32_cpu.c @@ -1656,11 +1656,13 @@ t_stat Mem_read(uint32 addr, uint32 *data) } /* everybody else has read access */ } - sim_debug(DEBUG_DETAIL, &cpu_dev, "Mem_read addr %06x realaddr %06x data %08x prot %02x\n", + sim_debug(DEBUG_DETAIL, &cpu_dev, + "Mem_read addr %06x realaddr %06x data %08x prot %02x\n", addr, realaddr, *data, prot); } else { /* RealAddr returned an error */ - sim_debug(DEBUG_EXP, &cpu_dev, "Mem_read error addr %06x realaddr %06x data %08x prot %02x status %04x\n", + sim_debug(DEBUG_EXP, &cpu_dev, + "Mem_read error addr %06x realaddr %06x data %08x prot %02x status %04x\n", addr, realaddr, *data, prot, status); if (status == NPMEM) { /* operand nonpresent memory error */ if ((CPU_MODEL == MODEL_97) || (CPU_MODEL == MODEL_V9)) { @@ -1891,11 +1893,19 @@ wait_loop: sim_interval--; /* count down */ +#ifndef NOT_NEEDED_0120 if (drop_nop) { /* need to drop a nop? */ - PSD1 = (PSD1 + 2) | (((PSD1 & 2) >> 1) & 1); /* skip this instruction */ - PSD1 &= ~BIT31; /* clear bit 31, no lr */ +// int sav = PSD1; +// PSD1 = (PSD1 + 2) | (((PSD1 & 2) >> 1) & 1); /* skip this instruction */ +// PSD1 &= ~BIT31; /* clear bit 31, no lr */ drop_nop = 0; /* we dropped the nop */ + sim_debug(DEBUG_CMD, &cpu_dev, +// "CPU Drop NOP BF PSD1 %08x AF PSD1 %08x\n", sav, PSD1); + "CPU Drop NOP PSD1 %08x\n", PSD1); } +#else + drop_nop = 0; /* we dropped the nop */ +#endif if (skipinstr) { /* need to skip interrupt test? */ skipinstr = 0; /* skip only once */ @@ -1981,7 +1991,8 @@ wait_loop: M[int_icb>>2] = PSD1&0xfffffffe;/* store PSD 1 */ M[(int_icb>>2)+1] = PSD2; /* store PSD 2 */ PSD1 = M[(int_icb>>2)+2]; /* get new PSD 1 */ - PSD2 = (M[(int_icb>>2)+3] & ~0x3ff8) | bc; /* get new PSD 2 w/old cpix */ +//0120 PSD2 = (M[(int_icb>>2)+3] & ~0x3ff8) | bc; /* get new PSD 2 w/old cpix */ + PSD2 = (M[(int_icb>>2)+3] & ~0x3fff) | bc; /* get new PSD 2 w/old cpix */ /* I/O status DW address will be in WD 6 */ /* set new map mode and interrupt blocking state in CPUSTATUS */ @@ -2065,7 +2076,8 @@ wait_loop: goto skipi; /* skip int test */ } } -#ifndef NEEDS_FIXING + + /* process IOCL entries that are waiting */ if (RDYQ_Num()) { uint32 chsa; /* channel/sub adddress */ CHANP *chp; /* get channel prog pointer */ @@ -2096,30 +2108,6 @@ wait_loop: } } } -#else - if (RDYQ_Num()) { - uint32 chsa; /* channel/sub adddress */ - int32 stat; - - /* we have entries, continue channel program */ - if (RDYQ_Get(&chsa) == SCPE_OK) { /* get chsa for program */ - CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */ - sim_debug(DEBUG_XIO, &cpu_dev, - "scan_chan CPU RDYQ entry for chsa %04x starting byte %02x\n", - chsa, chp->chan_byte); - stat = cont_chan(chsa); /* resume the channel program */ - if (stat == SCPE_OK) - sim_debug(DEBUG_XIO, &cpu_dev, - "scan_chan CPU RDYQ entry for chsa %04x processed byte %04x\n", - chsa, chp->chan_byte); - else - sim_debug(DEBUG_XIO, &cpu_dev, - "scan_chan CPU RDYQ entry for chsa %04x processed w/error byte %04x\n", - chsa, chp->chan_byte); - } -// goto wait_loop; /*1119*/ /* continue waiting */ - } -#endif /* see if in wait instruction */ if (wait4int) { /* keep waiting */ @@ -2194,6 +2182,7 @@ skipi: "2Rt HW instruction skipinstr %1x is set PSD1 %08x PSD2 %08x CPUSTATUS %08x\n", skipinstr, PSD1, PSD2, CPUSTATUS); goto skipi; /* go read next instruction */ +/////0122 goto wait_loop; /* continue waiting */ } if (skipinstr) sim_debug(DEBUG_IRQ, &cpu_dev, @@ -2214,6 +2203,8 @@ skipi: if ((IR & 0xffff) == 0x0002) { /* see if rt hw is a nop */ /* treat this as a fw instruction */ drop_nop = 1; /* we need to skip nop next time */ + sim_debug(DEBUG_DETAIL, &cpu_dev, + "CPU setting Drop NOP PSD1 %08x IR %08x\n", PSD1, IR); } } } @@ -2227,8 +2218,8 @@ exec: /* Split instruction into pieces */ PC = PSD1 & 0xfffffe; /* get 24 bit addr from PSD1 */ - sim_debug(DEBUG_DETAIL, &cpu_dev, "-----Instr @ PC %08x PSD1 %08x PSD2 %08x IR %08x\n", - PC, PSD1, PSD2, IR); + sim_debug(DEBUG_DETAIL, &cpu_dev, "-----Instr @ PC %08x PSD1 %08x PSD2 %08x IR %08x drop_nop %x\n", + PC, PSD1, PSD2, IR, drop_nop); /* Update history for this instruction */ if (hst_lnt) { @@ -2582,7 +2573,6 @@ exec: } sim_debug(DEBUG_EXP, &cpu_dev, "Starting HALT instruction\n"); -// if (cpu_dev.dctrl & DEBUG_EXP) { sim_debug(DEBUG_EXP, &cpu_dev, "\n[][][][][][][][][][] HALT [][][][][][][][][][]\n"); sim_debug(DEBUG_EXP, &cpu_dev, "PSD1 %.8x PSD2 %.8x TRAPME %.4x CPUSTATUS %08x\n", PSD1, PSD2, TRAPME, CPUSTATUS); @@ -2590,7 +2580,7 @@ exec: sim_debug(DEBUG_EXP, &cpu_dev, "GPR[%d] %.8x GPR[%d] %.8x\n", ix, GPR[ix], ix+1, GPR[ix+1]); } sim_debug(DEBUG_EXP, &cpu_dev, "[][][][][][][][][][] HALT [][][][][][][][][][]\n"); -// } + fprintf(stdout, "\r\n[][][][][][][][][][] HALT [][][][][][][][][][]\r\n"); fprintf(stdout, "PSD1 %.8x PSD2 %.8x TRAPME %.4x\r\n", PSD1, PSD2, TRAPME); for (ix=0; ix<8; ix+=2) { @@ -2631,7 +2621,7 @@ exec: wait4int = 1; /* show we are waiting for interrupt */ /* tell simh we will be waiting */ sim_idle(TMR_RTC, 0); /* wait for next pending device event */ -/*719*/ irq_pend = 1; /* start scanning interrupts again */ + irq_pend = 1; /* start scanning interrupts again */ i_flags |= BT; /* keep PC from being incremented while waiting */ break; case 0x2: /* NOP */ @@ -2954,21 +2944,8 @@ exec: if ((GPR[reg] & 0x80000000) && (CPU_MODEL == MODEL_V9)) { /* if bit 0 of reg set, return Cache/Shadow Configuration Word */ CMSMC = 0xffff0000; /* no CPU/IPU Cache/Shadow unit present */ -//@42 CMSMC = 0x00ff0000; /* no IPU Cache/Shadow unit present */ -//@42 CMSMC = 0x00000000; /* no IPU Cache/Shadow unit present */ /*@42*/ CMSMC |= 0x00000000; /* CPU Cache/Shadow unit present */ -//@42 CMSMC |= 0x0000c000; /* MACC not present in CP1/CP2 */ -// CMSMC |= 0x00000000; /* MACC present in CP1 */ -//@42 CMSMC |= 0x00008000; /* MACC not present in CP1 */ -// CMSMC |= 0x00000000; /* MACC present in CP2 */ -//@42 CMSMC |= 0x00004000; /* MACC not present in CP1/CP2 */ -//@42 CMSMC |= 0x00003000; /* CP1/CP2 not present */ -// CMSMC |= 0x00000000; /* CP1 present */ -//@42 CMSMC |= 0x00002000; /* CP1 not present */ -// CMSMC |= 0x00000000; /* CP2 present */ -//@42 CMSMC |= 0x00001000; /* CP2 not present */ CMSMC |= 0x00000800; /* bit 20, IPU not present */ -//@42 CMSMC |= 0x00000400; /* Shared Memory not configured */ CMSMC |= 0x00000200; /* bit 22, Access Protection ECO present */ CMSMC |= 0x0000001f; /* CPU Firmware Version 1/Rev level 0 */ dest = CMSMC; /* return starus */ @@ -3639,7 +3616,6 @@ tbr: /* handle basemode TBR too * CPUSTATUS |= BIT22; /* HS Floating is set to off */ /* make sure WCS is off and prom mode set to 0 (on) */ CPUSTATUS &= ~(BIT20|BIT21); /* make zero */ -// sim_debug(DEBUG_EXP, &cpu_dev, sim_debug(DEBUG_CMD, &cpu_dev, "SETCPU orig %08x user bits %08x New CPUSTATUS %08x\n", temp2, temp, CPUSTATUS); @@ -3778,7 +3754,8 @@ skipit: M[t>>2] = PSD1 & 0xfffffffe; /* store PSD 1 + 1HW to point to next instruction */ M[(t>>2)+1] = PSD2; /* store PSD 2 */ PSD1 = M[(t>>2)+2]; /* get new PSD 1 */ - PSD2 = (M[(t>>2)+3] & ~0x3ff8) | bc; /* get new PSD 2 w/old cpix */ +//0120 PSD2 = (M[(t>>2)+3] & ~0x3ff8) | bc; /* get new PSD 2 w/old cpix */ + PSD2 = (M[(t>>2)+3] & ~0x3fff) | bc; /* get new PSD 2 w/old cpix */ M[(t>>2)+4] = opr & 0x03FF; /* store calm number in bits 6-15 */ /* set the mode bits and CCs from the new PSD */ @@ -5372,6 +5349,7 @@ doovr2: case 0x6: /* SVC none - none */ /* Supervisor Call Trap */ int32c = CPUSTATUS; /* keep for retain blocking state */ addr = SPAD[0xf0]; /* get trap table memory address from SPAD (def 80) */ + int32a = addr; if (addr == 0 || addr == 0xffffffff) { /* see if secondary vector table set up */ TRAPME = ADDRSPEC_TRAP; /* Not setup, error */ goto newpsd; /* program error */ @@ -5388,16 +5366,30 @@ doovr2: TRAPME = ADDRSPEC_TRAP; /* Not setup, error */ goto newpsd; /* program error */ } +#if 0 +#define DO_DYNAMIC_DEBUG +#ifdef DO_DYNAMIC_DEBUG + if ((IR&0xfff) == 0x37) { + cpu_dev.dctrl |= (DEBUG_INST|DEBUG_DETAIL); /* start instruction trace */ + } +#endif +#endif +#ifdef NOT_NOW +sim_debug(DEBUG_IRQ, &cpu_dev, +"SVC IR %08x #%02x call #%03x TTA %04x SVCTA %06x 2ndTTA %06x\n", +IR, temp2>>2, IR&0xFFF, int32a, temp, t); +#endif bc = PSD2 & 0x3ff8; /* get copy of cpix */ M[t>>2] = (PSD1+4) & 0xfffffffe; /* store PSD 1 + 1W to point to next instruction */ M[(t>>2)+1] = PSD2; /* store PSD 2 */ PSD1 = M[(t>>2)+2]; /* get new PSD 1 */ - PSD2 = (M[(t>>2)+3] & ~0x3ff8) | bc; /* get new PSD 2 w/old cpix */ +//0120 PSD2 = (M[(t>>2)+3] & ~0x3ff8) | bc; /* get new PSD 2 w/old cpix */ + PSD2 = (M[(t>>2)+3] & ~0x3fff) | bc; /* get new PSD 2 w/old cpix */ M[(t>>2)+4] = IR&0xFFF; /* store call number */ #ifdef NOT_NOW sim_debug(DEBUG_IRQ, &cpu_dev, "SVC #%02x call #%03x PSD1 %08x PSD2 %08x CPUSTATUS %08x\n", -temp2, IR&0xFFF, PSD1, PSD2, CPUSTATUS); +temp2>>2, IR&0xFFF, PSD1, PSD2, CPUSTATUS); #endif /* set the mode bits and CCs from the new PSD */ CC = PSD1 & 0x78000000; /* extract bits 1-4 from PSD1 */ @@ -6009,7 +6001,8 @@ temp2, IR&0xFFF, PSD1, PSD2, CPUSTATUS); TRAPSTATUS |= BIT18; /* set bit 18 of trap status */ goto newpsd; /* memory read error or map fault */ } - PSD2 = temp2; /* PSD2 access good, so save it */ +//0120 PSD2 = temp2; /* PSD2 access good, so save it */ + PSD2 = temp2 & 0xfffffff8; /* PSD2 access good, clean & ave it */ } else { if ((TRAPME = Mem_read(addr+4, &temp2))) { /* get PSD2 from memory */ if ((CPU_MODEL == MODEL_97) || (CPU_MODEL == MODEL_V9)) { @@ -6020,8 +6013,11 @@ temp2, IR&0xFFF, PSD1, PSD2, CPUSTATUS); goto newpsd; /* memory read error or map fault */ } /* lpsd can not change cpix, so keep it */ - PSD2 = ((PSD2 & 0x3fff) | (temp2 & 0xffffc000)); /* use current cpix */ +//0120 PSD2 = ((PSD2 & 0x3fff) | (temp2 & 0xffffc000)); /* use current cpix */ + PSD2 = ((PSD2 & 0x3ff8) | (temp2 & 0xffffc000)); /* use current cpix */ } + sim_debug(DEBUG_IRQ, &cpu_dev, + "LPSD(CM) load New PSD1 %08x PSD2 %08x\n", PSD1, PSD2); PSD1 = temp; /* PSD1 good, so set it */ /* set the mode bits and CCs from the new PSD */ @@ -6061,14 +6057,14 @@ temp2, IR&0xFFF, PSD1, PSD2, CPUSTATUS); } else { #ifdef NOTRIGHT /* handle retain blocking state */ - PSD2 &= ~RETMBIT; /* turn off retain bit in PSD2 */ + PSD2 &= ~RETMBIT; /* turn off retain bit in PSD2 */ #endif /* set new blocking state in PSD2 */ - PSD2 &= ~(SETBBIT|RETBBIT); /* clear bit 48 & 49 to be unblocked */ - MODES &= ~(BLKMODE|RETMODE);/* reset blocked & retain mode bits */ - if (bc & BIT24) { /* see if old mode is blocked */ - PSD2 |= SETBBIT; /* set to blocked state */ - MODES |= BLKMODE; /* set blocked mode */ + PSD2 &= ~(SETBBIT|RETBBIT); /* clear bit 48 & 49 to be unblocked */ + MODES &= ~(BLKMODE|RETMODE); /* reset blocked & retain mode bits */ + if (bc & BIT24) { /* see if old mode is blocked */ + PSD2 |= SETBBIT; /* set to blocked state */ + MODES |= BLKMODE; /* set blocked mode */ } } @@ -6077,13 +6073,16 @@ temp2, IR&0xFFF, PSD1, PSD2, CPUSTATUS); if (PSD2 & MAPBIT) { /* set mapped mode in cpu status */ CPUSTATUS |= BIT8; /* set bit 8 of cpu status */ - sim_debug(DEBUG_DETAIL, &cpu_dev, +#ifdef NOT_NOW +// sim_debug(DEBUG_DETAIL, &cpu_dev, + sim_debug(DEBUG_IRQ, &cpu_dev, "B4 LPSDCM temp %06x TPSD %08x %08x PSD %08x %08x\n", temp, TPSD[0], TPSD[1], PSD1, PSD2); - sim_debug(DEBUG_DETAIL, &cpu_dev, +// sim_debug(DEBUG_DETAIL, &cpu_dev, + sim_debug(DEBUG_IRQ, &cpu_dev, "B4 LPSDCM BPIX %04x CPIX %04x CPIXPL %04x\n", BPIX, CPIX, CPIXPL); - +#endif /* this mod fixes MPX 1.X 1st swapr load */ /* any O/S or user maps yet? */ if (((CPIX != 0) && (CPIXPL == 0)) && (PSD2 & RETMBIT)) { @@ -6114,6 +6113,7 @@ TPSD[0], TPSD[1], PSD1, PSD2, TRAPME); if ((PSD2 & RETMBIT) == 0) { /* don't load maps if retain bit set */ /* we need to load the new maps */ TRAPME = load_maps(PSD, 0); /* load maps for new PSD */ +#ifdef NOT_NOW // sim_debug(DEBUG_DETAIL, &cpu_dev, sim_debug(DEBUG_IRQ, &cpu_dev, "AF LPSDCM TPSD %08x %08x PSD %08x %08x TRAPME %02x\n", @@ -6131,6 +6131,7 @@ TPSD[0], TPSD[1], PSD1, PSD2, TRAPME); "AF LPSDCM US MAPC[%x-%x] %08x %08x %08x %08x %08x %08x\n", BPIX, BPIX+5, MAPC[BPIX], MAPC[BPIX+1], MAPC[BPIX+2], MAPC[BPIX+3], MAPC[BPIX+4], MAPC[BPIX+5]); +#endif } PSD2 &= ~RETMBIT; /* turn off retain bit in PSD2 */ SPAD[0xf5] = PSD2; /* save the current PSD2 */ @@ -6450,6 +6451,9 @@ TPSD[0], TPSD[1], PSD1, PSD2, TRAPME); sim_debug(DEBUG_XIO, &cpu_dev, "$$ XIO SYSTEMCHK lchan %04x sa %04x spad %08x BLK %1x INTS[%02x] %08x\n", lchan, suba, t, CPUSTATUS&0x80?1:0, ix, INTS[ix]); + sim_debug(DEBUG_XIO, &cpu_dev, + "$$ XIO SYSTEMCHK2 IR %08x temp2 %04x lchsa %04x opr %02x GPR[%02x] %08x\n", + IR, temp2, lchsa, (opr>>3)&0xf, reg, GPR[reg]); TRAPME = SYSTEMCHK_TRAP; /* trap condition if F class */ TRAPSTATUS |= BIT0; /* class F error bit */ TRAPSTATUS &= ~BIT1; /* I/O processing error */ @@ -6536,11 +6540,9 @@ mcheck: break; case 0x02: /* Start I/O SIO */ -// chsa = temp2 & 0x7fff; /* logical address */ sim_debug(DEBUG_XIO, &cpu_dev, "SIO b4 call PSD1 %08x rchsa %04x lchsa %04x BLK %1x\n", PSD1, rchsa, lchsa, CPUSTATUS&0x80?1:0); -// PSD1, lchan, lchsa, CPUSTATUS&0x80?1:0); if ((TRAPME = startxio(lchsa, &rstatus))) goto newpsd; /* error returned, trap cpu */ PSD1 = ((PSD1 & 0x87fffffe) | (rstatus & 0x78000000)); /* insert status */ @@ -6550,7 +6552,6 @@ mcheck: break; case 0x03: /* Test I/O TIO */ -// lchsa = (lchan << 8) | suba; /* logical address */ if ((TRAPME = testxio(lchsa, &rstatus))) { sim_debug(DEBUG_TRAP, &cpu_dev, "TIO ret PSD1 %x rchsa %x lchsa %x status %x BLK %1x\n", @@ -6821,11 +6822,17 @@ mcheck: PSD1 = (PSD1 + 4) | (((PSD1 & 2) >> 1) & 1); EXM_EXR = 0; /* reset PC increment for EXR */ } else - if (i_flags & HLF) { - PSD1 = (PSD1 + 2) | (((PSD1 & 2) >> 1) & 1); + if (i_flags & HLF) { /* if nop in rt hw, bump pc a word */ + if ((drop_nop) && ((CPU_MODEL == MODEL_67) || (CPU_MODEL == MODEL_V6))) + { + PSD1 = (PSD1 + 4) | (((PSD1 & 2) >> 1) & 1); + } else { + PSD1 = (PSD1 + 2) | (((PSD1 & 2) >> 1) & 1); + } } else { PSD1 = (PSD1 + 4) | (((PSD1 & 2) >> 1) & 1); } + drop_nop = 0; /* no NOP to drop */ } else { EXM_EXR = 0; /* reset PC increment for EXR */ drop_nop = 0; /* no NOP to drop */ @@ -6928,7 +6935,7 @@ newpsd: /* drop through */ default: sim_debug(DEBUG_TRAP, &cpu_dev, - "##TRAPME %04x LOAD MAPS PSD1 %08x PSD2 %08x CPUSTATUS %08x drop_nop %1x i_flags %04x\n", + "##TRAPME %02x LOAD MAPS PSD1 %08x PSD2 %08x CPUSTATUS %08x drop_nop %1x i_flags %04x\n", TRAPME, PSD1, PSD2, CPUSTATUS, drop_nop, i_flags); /* adjust PSD1 to next instruction */ /* Update instruction pointer to next instruction */ @@ -6939,12 +6946,12 @@ newpsd: EXM_EXR = 0; /* reset PC increment for EXR */ } else if (i_flags & HLF) { /* if nop in rt hw, bump pc a word */ - if ((drop_nop) && ((CPU_MODEL == MODEL_67) || (CPU_MODEL == MODEL_V6))) - { + if ((drop_nop) && ((CPU_MODEL == MODEL_67) || (CPU_MODEL == MODEL_V6))) { PSD1 = (PSD1 + 4) | (((PSD1 & 2) >> 1) & 1); - drop_nop = 0; - } else + } else { PSD1 = (PSD1 + 2) | (((PSD1 & 2) >> 1) & 1); + } + drop_nop = 0; } else { PSD1 = (PSD1 + 4) | (((PSD1 & 2) >> 1) & 1); //DIAG fix for test 34/10 in MMM diag, reset bit 31 @@ -6970,14 +6977,14 @@ newpsd: PSD1 &= ~BIT31; /* force off last right */ /* pfault will have 11 bit page number and bit 0 set if op fetch */ sim_debug(DEBUG_TRAP, &cpu_dev, - "##PAGEFAULT TRAPS %04x page# %04x LOAD MAPS PSD1 %08x PSD2 %08x CPUSTATUS %08x\n", + "##PAGEFAULT TRAPS %02x page# %04x LOAD MAPS PSD1 %08x PSD2 %08x CPUSTATUS %08x\n", TRAPME, pfault, PSD1, PSD2, CPUSTATUS); } sim_debug(DEBUG_TRAP, &cpu_dev, - "At TRAPME %04x PSD1 %08x PSD2 %08x CPUSTATUS %08x drop_nop %02x\n", + "At TRAPME %02x PSD1 %08x PSD2 %08x CPUSTATUS %08x drop_nop %02x\n", TRAPME, PSD1, PSD2, CPUSTATUS, drop_nop); sim_debug(DEBUG_TRAP, &cpu_dev, - "At TRAP %04x IR %08x PSD1 %08x PSD2 %08x CPUSTATUS %08x ovr %01x drop_nop %01x\n", + "At TRAP %02x IR %08x PSD1 %08x PSD2 %08x CPUSTATUS %08x ovr %01x drop_nop %01x\n", TRAPME, IR, PSD1, PSD2, CPUSTATUS, ovr, drop_nop); tta = tta + (TRAPME - 0x80); /* tta has mem addr of trap vector */ @@ -7020,14 +7027,14 @@ newpsd: uint32 oldstatus = CPUSTATUS; /* keep for retain blocking state */ /* valid vector, so store the PSD, fetch new PSD */ bc = PSD2 & 0x3ff8; /* get copy of cpix */ - if ((TRAPME) && ((CPU_MODEL <= MODEL_27) )) - /* Privlege Mode Halt Trap on 27 has bit 31 reset */ - M[tvl>>2] = PSD1 & 0xfffffffe; /* store PSD 1 */ - else + if ((TRAPME) && ((CPU_MODEL <= MODEL_27))) { + /* Traps on 27 have bit 31 reset */ + M[tvl>>2] = PSD1 & 0xfffffffe; /* store PSD 1 */ + } else M[tvl>>2] = PSD1 & 0xffffffff; /* store PSD 1 */ M[(tvl>>2)+1] = PSD2; /* store PSD 2 */ PSD1 = M[(tvl>>2)+2]; /* get new PSD 1 */ - PSD2 = (M[(tvl>>2)+3] & ~0x3ff8) | bc; /* get new PSD 2 w/old cpix */ + PSD2 = (M[(tvl>>2)+3] & ~0x3fff) | bc; /* get new PSD 2 w/old cpix */ M[(tvl>>2)+4] = TRAPSTATUS; /* store trap status */ if (TRAPME == DEMANDPG_TRAP) { /* 0xC4 Demand Page Fault Trap (V6&V9 Only) */ M[(tvl>>2)+5] = pfault; /* store page fault number */ @@ -7221,12 +7228,15 @@ t_stat cpu_reset(DEVICE *dptr) SPAD[0xff] = 0x00ffffff; /* interrupt level 7f 1's complament */ } /* set low memory bootstrap code */ +#if 0 + /* mode to boot code in sel32_chan.c so we can reset system and not destroy memory */ M[0] = 0x02000000; /* 0x00 IOCD 1 read into address 0 */ M[1] = 0x60000078; /* 0x04 IOCD 1 CMD Chain, Suppress incor length, 120 bytes */ M[2] = 0x53000000; /* 0x08 IOCD 2 BKSR or RZR to re-read boot code */ M[3] = 0x60000001; /* 0x0C IOCD 2 CMD chain,Supress incor length, 1 byte */ M[4] = 0x02000000; /* 0x10 IOCD 3 Read into address 0 */ M[5] = 0x000006EC; /* 0x14 IOCD 3 Read 0x6EC bytes */ +#endif loading = 0; /* not loading yet */ /* we are good to go or error from device setup */ if (devs != SCPE_OK) diff --git a/SEL32/sel32_disk.c b/SEL32/sel32_disk.c index e5ca81c..4f79385 100644 --- a/SEL32/sel32_disk.c +++ b/SEL32/sel32_disk.c @@ -761,6 +761,16 @@ loop: chp->chan_caw = (chp->chan_caw & 0xfffffc) + 8; /* point to next IOCD */ chp->ccw_cmd = (word1 >> 24) & 0xff; /* set command from IOCD wd 1 */ + /* Check if we had data chaining in previous iocd */ + /* if we did, use previous cmd value */ + if (((chp->chan_info & INFO_SIOCD) == 0) && /* see if 1st IOCD in channel prog */ + (chp->ccw_flags & FLAG_DC)) { /* last IOCD have DC set? */ + sim_debug(DEBUG_CMD, dptr, + "ec_iocl @%06x DO DC, ccw_flags %04x cmd %02x\n", + chp->chan_caw, chp->ccw_flags, chp->ccw_cmd); + } else + chp->ccw_cmd = (word1 >> 24) & 0xff; /* set new command from IOCD wd 1 */ + if (!MEM_ADDR_OK(word1 & MASK24)) { /* see if memory address invalid */ chp->chan_status |= STATUS_PCHK; /* bad, program check */ uptr->SNS |= SNS_INAD; /* invalid address status */ @@ -861,7 +871,6 @@ loop: return 1; /* error return */ } -#ifndef NOT_FOR_EVERYONE /* DC can only be used with a read/write cmd */ if (chp->ccw_flags & FLAG_DC) { if ((chp->ccw_cmd != DSK_RD) && (chp->ccw_cmd != DSK_WD)) { @@ -872,7 +881,6 @@ loop: return 1; /* error return */ } } -#endif chp->chan_byte = BUFF_BUSY; /* busy & no bytes transferred yet */ @@ -1569,9 +1577,6 @@ iha_error: sim_debug(DEBUG_CMD, dptr, "disk_srv STAR unit=%02x star %02x %02x %02x %02x\n", unit, buf[0], buf[1], buf[2], buf[3]); -// sim_debug(DEBUG_DETAIL, dptr, -// "disk_srv seek unit=%02x star %02x %02x %02x %02x\n", -// unit, buf[0], buf[1], buf[2], buf[3]); /* save STAR (target sector) data in STAR */ uptr->STAR = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | (buf[3]); @@ -1620,11 +1625,6 @@ iha_error: /* calc the new sector address of data */ /* calculate file position in bytes of requested sector */ - /* file offset in bytes */ -//29 tstart = STAR2SEC(uptr->STAR, SPT(type), SPC(type)) * SSB(type); - /* set new STAR value using old cyl value */ -// uptr->CHS = CHS2STAR(STAR2CYL(uptr->CHS), trk, buf[3]); - /* set new STAR value using new values */ /*05*/ uptr->STAR = CHS2STAR(cyl, trk, sec); /* file offset in bytes to std or alt track */ @@ -1910,10 +1910,10 @@ iha_error: "disk_srv after READ chsa %04x buffer %06x count %04x\n", chsa, chp->ccw_addr, chp->ccw_count); sim_debug(DEBUG_CMD, dptr, - "disk_srv after READ buffer %06x count %04x data %02x%02x%02x%02x %02x%02x%02x%02x\n", -// chp->ccw_addr, chp->ccw_count, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); - chp->ccw_addr, chp->ccw_count, buf[1016], buf[1017], buf[1018], buf[1019], - buf[1020], buf[1021], buf[1022], buf[1023]); + "hsdp_srv READ data %02x%02x%02x%02x %02x%02x%02x%02x " + "%02x%02x%02x%02x %02x%02x%02x%02x\n", + buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7], + buf[8], buf[9], buf[10], buf[11], buf[12], buf[13], buf[14], buf[15]); uptr->CHS++; /* next sector number */ /* process the next sector of data */ @@ -2137,11 +2137,13 @@ iha_error: } sim_debug(DEBUG_CMD, dptr, - "disk_srv after WRITE buffer %06x count %04x data %02x%02x%02x%02x %02x%02x%02x%02x\n", -// chp->ccw_addr, chp->ccw_count, -// buf2[0], buf2[1], buf2[2], buf2[3], buf2[4], buf2[5], buf2[6], buf2[7]); - chp->ccw_addr, chp->ccw_count, buf2[1016], buf2[1017], buf2[1018], buf2[1019], - buf2[1020], buf2[1021], buf2[1022], buf2[1023]); + "hsdp_srv after WRITE buffer %06x count %04x\n", + chp->ccw_addr, chp->ccw_count); + sim_debug(DEBUG_CMD, dptr, + "hsdp_srv WRITE data %02x%02x%02x%02x %02x%02x%02x%02x " + "%02x%02x%02x%02x %02x%02x%02x%02x\n", + buf2[0], buf2[1], buf2[2], buf2[3], buf2[4], buf2[5], buf2[6], buf2[7], + buf2[8], buf2[9], buf2[10], buf2[11], buf2[12], buf2[13], buf2[14], buf2[15]); sim_debug(DEBUG_CMD, dptr, "disk_srv after WRITE CAP %06x DIAG %06x\n", CAP(type), (((CYL(type) - 3) * HDS(type)) * SPT(type))); /* diag start */ @@ -3096,8 +3098,7 @@ t_stat disk_attach(UNIT *uptr, CONST char *file) "Disk %s cyl %d hds %d sec %d ssiz %d capacity %d\n", disk_type[type].name, disk_type[type].cyl, disk_type[type].nhds, disk_type[type].spt, ssize, uptr->capac); /* disk capacity */ - printf( - "Disk %s cyl %d hds %d sec %d ssiz %d capacity %d\r\n", + printf("Disk %s cyl %d hds %d sec %d ssiz %d capacity %d\r\n", disk_type[type].name, disk_type[type].cyl, disk_type[type].nhds, disk_type[type].spt, ssize, uptr->capac); /* disk capacity */ @@ -3121,8 +3122,7 @@ t_stat disk_attach(UNIT *uptr, CONST char *file) j = (CAP(type) - (s/ssize)); /* get # sectors to write */ sim_debug(DEBUG_CMD, dptr, "Disk attach for MPX 1.X needs %04d more sectors added to disk\n", j); - printf( - "Disk attach for MPX 1.X needs %04d more sectors added to disk\r\n", j); + printf("Disk attach for MPX 1.X needs %04d more sectors added to disk\r\n", j); /* must be MPX 1.X disk, extend to MPX 3.X size */ /* write sectors of zero to end of disk to fill it out */ for (i=0; ifileref, (CAP(type))*ssize, SEEK_SET)) != 0) { sim_debug(DEBUG_CMD, dptr, "Disk attach SEEK last sector failed\n"); - printf( "Disk attach SEEK last sector failed\r\n"); + printf("Disk attach SEEK last sector failed\r\n"); goto fmt; } s = ftell(uptr->fileref); /* get current file position */ @@ -3196,8 +3196,7 @@ add_size: sim_debug(DEBUG_CMD, dptr, "Disk format error buf0 %02x buf1 %02x buf2 %02x buf3 %02x\n", buff[0], buff[1], buff[2], buff[3]); - printf( - "Disk format error buf0 %02x buf1 %02x buf2 %02x buf3 %02x\r\n", + printf("Disk format error buf0 %02x buf1 %02x buf2 %02x buf3 %02x\r\n", buff[0], buff[1], buff[2], buff[3]); fmt: /* format the drive */ @@ -3222,8 +3221,7 @@ ldone: sim_debug(DEBUG_CMD, dptr, "File %s attached to %s creating labels\n", file, disk_type[type].name); - printf( - "File %s attached to %s creating labels\r\n", + printf("File %s attached to %s creating labels\r\n", file, disk_type[type].name); i = disk_label(uptr); /* label disk */ if (i != 0) { diff --git a/SEL32/sel32_ec.c b/SEL32/sel32_ec.c index cd1bca6..b2d4e0c 100644 --- a/SEL32/sel32_ec.c +++ b/SEL32/sel32_ec.c @@ -388,7 +388,6 @@ loop: chp->chan_caw = (chp->chan_caw & 0xfffffc) + 8; /* point to next IOCD */ -#ifndef NOT_HERE /* Check if we had data chaining in previous iocd */ /* if we did, use previous cmd value */ if (((chp->chan_info & INFO_SIOCD) == 0) && /* see if 1st IOCD in channel prog */ @@ -396,16 +395,8 @@ loop: sim_debug(DEBUG_CMD, dptr, "ec_iocl @%06x DO DC, ccw_flags %04x cmd %02x\n", chp->chan_caw, chp->ccw_flags, chp->ccw_cmd); -// chp->ccw_flags = (word2 >> 16) & 0xf800;/* get flags from bits 0-4 of WD 2 of IOCD */ -// if (chp->ccw_cmd == EC_READ) /* Force SLI on READ */ -// chp->ccw_flags |= FLAG_SLI; -// chp->ccw_count = word2 & 0xffff; /* get 16 bit byte count from IOCD WD 2 */ -// return 0; } else chp->ccw_cmd = (word1 >> 24) & 0xff; /* set new command from IOCD wd 1 */ -#else - chp->ccw_cmd = (word1 >> 24) & 0xff; /* set command from IOCD wd 1 */ -#endif chp->ccw_count = 0; if (!MEM_ADDR_OK(word1 & MASK24)) { /* see if memory address invalid */ @@ -942,7 +933,7 @@ wr_end: pck = (uint8 *)(&ec_data.rec_buff[ec_data.xtr_ptr].msg[0]); len = (int)(ec_data.rec_buff[ec_data.xtr_ptr].len); if (len < ec_data.conf[9]) { - sim_debug(DEBUG_DETAIL, &ec_dev, "ec_srv short read size %x %x %x\n",chp->ccw_count, i, ec_data.conf[9]); + sim_debug(DEBUG_DETAIL, &ec_dev, "ec_srv short read size %x %x\n",chp->ccw_count, ec_data.conf[9]); ec_data.xtr_ptr = (ec_data.xtr_ptr + 1) & 0xf; chp->ccw_count = 0; /* diags wants prog check instead of unit check */ @@ -1162,8 +1153,6 @@ wr_end: "ec_startcmd CMD sense excess cnt %02x\n", chp->ccw_count); break; } -/*JB*/ ec_data.rec_buff[ec_data.xtr_ptr].len = 0; /* reset last buffer length */ - uptr->SNS &= ~(SNS_CMDREJ|SNS_EQUCHK); /* clear old status */ chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */ diff --git a/SEL32/sel32_hsdp.c b/SEL32/sel32_hsdp.c index 26c9ad8..d647ebf 100644 --- a/SEL32/sel32_hsdp.c +++ b/SEL32/sel32_hsdp.c @@ -293,6 +293,44 @@ Byte 1 bits 7-15 30 uint32 lcrc; Label CRC-32 value */ +/* track label / sector label definations */ +/* + 0 short lcyl; cylinder + 2 char ltkn; track + 3 char lid; sector id + 4 char lflg1; track/sector status flags + bit 0 good + 1 alternate + 2 spare + 3 reserved + 4 flaw + 5 last track + 6 start of alternate + 5 char lflg2; + 6 short lspar1; + 8 short lspar2; +10 short ldef1; +12 int ldeallp; DMAP block number trk0 +16 int lumapp; UMAP block number sec1 +20 short ladef3; +22 short laltcyl; +24 char lalttk; sectors per track +25 char ldscnt; number of heads +26 char ldatrflg; device attributes + bit 0 n/u + 1 disk is mhd + 2 n/u + 3 n/u + 4 n/u + 5 dual ported + 6/7 00 768 bytes/blk + 01 1024 bytes/blk + 10 2048 bytes/blk +27 char ldatrscnt; sectors per track (again) +28 char ldatrmhdc; MHD head count +29 char ldatrfhdc; FHD head count + */ + #define CMD u3 /* u3 */ /* in u3 is device command code and status */ @@ -337,12 +375,28 @@ Byte 1 bits 7-15 #define DSK_REC 0xB2 /* Read ECC correction mask */ #define DSK_INC 0xFF /* Initialize Controller */ -#define STAR u4 -/* u4 - sector target address register (STAR) */ +#define DAI u4 +/* u4 holds the current disk attribute value from the INCH command */ +/* for the current drive. */ /* Holds the current cylinder, head(track), sector */ -#define DISK_CYL 0xFFFF0000 /* cylinder mask */ -#define DISK_TRACK 0x0000FF00 /* track mask */ -#define DISK_SECTOR 0x000000ff /* sector mask */ + +/* this attribute information is provided by the INCH command */ +/* for each device and is saved. It is reconstructed from */ +/* the disk_t structure data for the assigned disk */ +/* +bits 0-7 - Flags + bits 0&1 - 00=Reserved, 01=MHD, 10=FHD, 11=MHD with FHD option + bit 2 - 1=Cartridge module drive + bit 3 - 0=Reserved + bit 4 - 1=Drive not present + bit 5 - 1=Dual Port + bit 6 - 0=Reserved 00 768 byte sec + bit 7 - 0=Reserved 01 1024 byte sec +bits 8-15 - sector count (sectors per track)(F16=16, F20=20) +bits 16-23 - MHD Head count (number of heads on MHD) +bits 24-31 - FHD head count (number of heads on FHD or + number head on FHD option of mini-module) +*/ #define SNS u5 /* u5 */ @@ -411,28 +465,19 @@ Byte 1 bits 7-15 #define SNS_NU2 0x01 /* Spare 2 */ #define CHS u6 -/* u6 holds the current cyl, hd, sec for the drive */ - -/* this attribute information is provided by the INCH command */ -/* for each device and is not used. It is reconstructed from */ -/* the disk_t structure data for the assigned disk */ -/* -bits 0-7 - Flags - bits 0&1 - 00=Reserved, 01=MHD, 10=FHD, 11=MHD with FHD option - bit 2 - 1=Cartridge module drive - bit 3 - 0=Reserved - bit 4 - 1=Drive not present - bit 5 - 1=Dual Port - bit 6 - 0=Reserved 00 768 byte sec - bit 7 - 0=Reserved 01 1024 byte sec -bits 8-15 - sector count (sectors per track)(F16=16, F20=20) -bits 16-23 - MHD Head count (number of heads on MHD) -bits 24-31 - FHD head count (number of heads on FHD or number head on FHD option of - mini-module) -*/ +/* u6 - sector target address register (STAR) */ +/* Holds the current cylinder, head(track), sector */ +#define DISK_CYL 0xFFFF0000 /* cylinder mask */ +#define DISK_TRACK 0x0000FF00 /* track mask */ +#define DISK_SECTOR 0x000000FF /* sector mask */ /* Not Used up7 */ +#define LSC us10 +/* us10 */ +/* us10 byte 0 unused */ +/* us10 byte 1 holds logical sector count from track 0 byte 25 */ + static uint8 obuf[1024], bbuf[1024]; static uint32 decc[512] = {0}; @@ -455,22 +500,22 @@ hsdp_type[] = { /* Class F Disc Devices */ /* For MPX */ - {"MH040", 5, 192, 20, 407, 411, 0x40}, /* 0 411 40M XXXX */ -// {"MH080", 5, 192, 20, 819, 823, 0x40}, /* 1 823 80M 8138 */ - {"MH080", 5, 192, 22, 819, 823, 0x40}, /* 1 823 80M 8138 */ - {"MH160", 10, 192, 20, 819, 823, 0x40}, /* 2 823 160M 8148 */ - {"MH300", 19, 192, 20, 819, 823, 0x40}, /* 3 823 300M 9346 */ - {"MH600", 40, 192, 20, 839, 843, 0x40}, /* 4 843 600M 8155 */ - {"MH689", 16, 192, 54, 861, 865, 0x40}, /* 5 823 674M 8888 DP689 */ + {"MH040", 5, 192, 20, 407, 411, 0x40}, /* 0 411 40M XXXX */ +// {"MH080", 5, 192, 20, 819, 823, 0x40}, /* 1 823 80M 8138 */ + {"MH080", 5, 192, 22, 819, 823, 0x40}, /* 1 823 80M 8138 */ + {"MH160", 10, 192, 20, 819, 823, 0x40}, /* 2 823 160M 8148 */ + {"MH300", 19, 192, 20, 819, 823, 0x40}, /* 3 823 300M 9346 */ + {"MH600", 40, 192, 20, 839, 843, 0x40}, /* 4 843 600M 8155 */ + {"MH689", 16, 192, 54, 861, 865, 0x40}, /* 5 823 674M 8888 DP689 */ /* For UTX */ - {"9342", 5, 256, 16, 819, 823, 0x41}, /* 6 823 80M 9342 MH080 */ - {"8148", 10, 256, 16, 819, 823, 0x41}, /* 7 823 160M 8146 MH160 */ - {"9346", 19, 256, 16, 819, 823, 0x41}, /* 8 823 300M 9344 MH300 */ - {"8858", 24, 256, 16, 707, 711, 0x41}, /* 9 711 340M 8858 DC340 */ - {"8887", 10, 256, 35, 819, 823, 0x41}, /* 10 823 337M 8887 DP337 */ - {"8155", 40, 256, 16, 839, 843, 0x41}, /* 11 843 600M 8155 MH600 */ - {"8888", 16, 256, 43, 861, 865, 0x41}, /* 12 823 674M 8888 DP689 */ - {NULL, 0} + {"9342", 5, 256, 16, 819, 823, 0x41}, /* 6 823 80M 9342 MH080 */ + {"8148", 10, 256, 16, 819, 823, 0x41}, /* 7 823 160M 8146 MH160 */ + {"9346", 19, 256, 16, 819, 823, 0x41}, /* 8 823 300M 9344 MH300 */ + {"8858", 24, 256, 16, 707, 711, 0x41}, /* 9 711 340M 8858 DC340 */ + {"8887", 10, 256, 35, 819, 823, 0x41}, /* 10 823 337M 8887 DP337 */ + {"8155", 40, 256, 16, 839, 843, 0x41}, /* 11 843 600M 8155 MH600 */ + {"8888", 16, 256, 43, 861, 865, 0x41}, /* 12 823 674M 8888 DP689 */ + {NULL} }; uint16 hsdp_preio(UNIT *uptr, uint16 chan) ; @@ -736,13 +781,13 @@ uint32 get_dpatrk(UNIT *uptr, uint32 star, uint8 buf[]) } /* now write track label data to log */ - sim_debug(DEBUG_DETAIL, dptr, "Dpatrk %08x label", nstar); + sim_debug(DEBUG_CMD, dptr, "Dpatrk %08x label", nstar); for (i = 0; i < 30; i++) { if (i == 16) - sim_debug(DEBUG_DETAIL, dptr, "\nDpatrl %08x label", nstar); - sim_debug(DEBUG_DETAIL, dptr, " %02x", buf[i]); + sim_debug(DEBUG_CMD, dptr, "\nDpatrl %08x label", nstar); + sim_debug(DEBUG_CMD, dptr, " %02x", buf[i]); } - sim_debug(DEBUG_DETAIL, dptr, "\n"); + sim_debug(DEBUG_CMD, dptr, "\n"); if (buf[4] == 0x08) { /* see if defective track */ uptr->SNS |= SNS_DEFTRK; /* flag as defective */ @@ -752,7 +797,7 @@ uint32 get_dpatrk(UNIT *uptr, uint32 star, uint8 buf[]) trk = buf[24]; /* get the track */ //bad sec = 0; /* sec is zero */ nstar = CHS2STAR(cyl, trk, sec); - sim_debug(DEBUG_DETAIL, dptr, + sim_debug(DEBUG_CMD, dptr, "Track %08x is defective, new track %08x\n", tstart, nstar); } /* see if we had it in our cache */ @@ -788,21 +833,21 @@ uint16 hsdp_preio(UNIT *uptr, uint16 chan) DIB* dibp = (DIB *)dptr->ctxt; /* get the DIB pointer */ int32 cnt; - sim_debug(DEBUG_DETAIL, dptr, "hsdp_preio CMD %08x unit %02x\n", uptr->CMD, unit); + sim_debug(DEBUG_CMD, dptr, "hsdp_preio CMD %08x unit %02x\n", uptr->CMD, unit); //1215 if (IOCLQ_Num(&dibp->ioclq_ptr[unit]) == IOCLQ_SIZE) { //1217 1f ((cnt = IOCLQ_Num(&dibp->ioclq_ptr[unit])) >= (IOCLQ_SIZE-2)) { if ((cnt = IOCLQ_Num(&dibp->ioclq_ptr[unit])) >= (IOCLQ_SIZE)) { - sim_debug(DEBUG_DETAIL, dptr, "hsdp_preio CMD %08x unit %02x IOCLQ cnt %02x Full\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_preio CMD %08x unit %02x IOCLQ cnt %02x Full\n", uptr->CMD, unit, cnt); return SNS_BSY; /* IOCLQ is full, return busy */ } if ((uptr->CMD & 0xff) != 0) { /* just return if busy */ - sim_debug(DEBUG_DETAIL, dptr, "hsdp_preio CMD %08x unit %02x IOCLQ cnt %02x Busy\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_preio CMD %08x unit %02x IOCLQ cnt %02x Busy\n", uptr->CMD, unit, cnt); return SNS_SMS; /* busy, but IOCLQ is not full */ } - sim_debug(DEBUG_DETAIL, dptr, "hsdp_preio unit %02x chsa %04x OK not busy\n", unit, chsa); + sim_debug(DEBUG_CMD, dptr, "hsdp_preio unit %02x chsa %04x OK not busy\n", unit, chsa); return SCPE_OK; /* not busy and IOCLQ not full */ } @@ -1083,6 +1128,7 @@ uint16 hsdp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) #ifdef FAST_FOR_UTX // sim_activate(uptr, 20); /* start things off */ sim_activate(uptr, 30); /* start things off */ +//0107 sim_activate(uptr, 30); /* start things off */ #else sim_activate(uptr, 250); /* start things off */ // sim_activate(uptr, 500); /* start things off */ @@ -1121,6 +1167,7 @@ uint16 hsdp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) #ifdef FAST_FOR_UTX // sim_activate(uptr, 20); /* start things off */ // sim_activate(uptr, 30); /* start things off */ +//0107 sim_activate(uptr, 25); /* start things off */ sim_activate(uptr, 25); /* start things off */ #else sim_activate(uptr, 250); /* start things off */ @@ -1203,6 +1250,7 @@ t_stat hsdp_srv(UNIT *uptr) { uint16 chsa = GET_UADDR(uptr->CMD); DEVICE *dptr = get_dev(uptr); +// UNIT *uptr0 = dptr->units; /* get unit 0 pointer */ CHANP *chp = find_chanp_ptr(chsa); /* get channel prog pointer */ int cmd = uptr->CMD & DSK_CMDMSK; int type = GET_TYPE(uptr->flags); @@ -1210,7 +1258,7 @@ t_stat hsdp_srv(UNIT *uptr) int unit = (uptr - dptr->units); int len = chp->ccw_count; int i,j,k; - uint32 mema, ecc, cecc; /* memory address */ + uint32 mema, ecc, cecc, tstar; /* memory address */ uint8 ch; uint16 ssize = hsdp_type[type].ssiz * 4; /* disk sector size in bytes */ uint32 tstart; @@ -1267,6 +1315,7 @@ t_stat hsdp_srv(UNIT *uptr) /* the 8 words have drive data for each unit */ /* WARNING 8 drives must be defined for this controller */ /* so we will not have a map fault */ + sim_debug(DEBUG_CMD, dptr, "hsdp_srv CONT INC data:"); for (i=0; i < 32; i++) { if (chan_read_byte(chsa, &buf[i])) { if (chp->chan_status & STATUS_PCHK) /* test for memory error */ @@ -1277,18 +1326,34 @@ t_stat hsdp_srv(UNIT *uptr) chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); break; } + if (i == 16) + sim_debug(DEBUG_CMD, dptr, "\nhsdp_srv CONT INC data:"); + sim_debug(DEBUG_CMD, dptr, " %02x", buf[i]); if (((i+1)%4) == 0) { /* see if we have a word yet */ +#ifndef FOR_TESTING + int dn = i/4; /* get drive number */ +// UNIT *up = uptr0[dn]; /* get our unit pointer */ + UNIT *uptr0 = dptr->units; /* get unit 0 pointer */ +#endif /* drive attribute registers */ /* may want to use this later */ /* clear warning errors */ tstart = (buf[i-3]<<24) | (buf[i-2]<<16) | (buf[i-1]<<8) | (buf[i]); +#ifndef FOR_TESTING + uptr0[dn].DAI = tstart; /* save drive attribute register */ + /* set mode data from last byte */ + uptr0[dn].SNS &= MASK24; /* clear old mode data */ + uptr0[dn].SNS |= (buf[i] << 24); /* save mode value */ +#endif } } + sim_debug(DEBUG_CMD, dptr, "\n"); + uptr->CMD &= LMASK; /* remove old cmd */ sim_debug(DEBUG_CMD, dptr, - "hsdp_srv cmd INC chsa %04x chsa %06x count %04x completed\n", - chsa, mema, chp->ccw_count); + "hsdp_srv cmd INC chsa %04x chsa %06x count %04x mode %08x completed\n", + chsa, mema, chp->ccw_count, uptr->DAI); chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */ break; @@ -1337,6 +1402,10 @@ t_stat hsdp_srv(UNIT *uptr) (buf[2]<<8) | (buf[3]); sim_debug(DEBUG_CMD, dptr, "Inch buffer %08x", mema); } else { +#ifndef FOR_TESTING + int dn = (i-4)/4; /* get drive number */ + UNIT *uptr0 = dptr->units; /* get unit 0 pointer */ +#endif /* drive attribute registers */ /* may want to use this later */ /* clear warning errors */ @@ -1344,6 +1413,12 @@ t_stat hsdp_srv(UNIT *uptr) | (buf[i-1]<<8) | (buf[i]); if (i == 23) sim_debug(DEBUG_CMD, dptr, "\nInch buffer %08x", mema); +#ifndef FOR_TESTING + uptr0[dn].DAI = tstart; /* save drive attribute register */ + /* set mode data from last byte */ + uptr0[dn].SNS &= MASK24; /* clear old mode data */ + uptr0[dn].SNS |= (buf[i] << 24); /* save mode value */ +#endif sim_debug(DEBUG_CMD, dptr, " %08x", tstart); } } @@ -1361,8 +1436,8 @@ t_stat hsdp_srv(UNIT *uptr) } uptr->CMD &= LMASK; /* remove old cmd */ sim_debug(DEBUG_CMD, dptr, - "hsdp_srv cmd INCH %06x chsa %04x addr %06x count %04x completed\n", - chp->chan_inch_addr, chsa, mema, chp->ccw_count); + "hsdp_srv cmd INCH %06x chsa %04x addr %06x count %04x mode %08x completed\n", + chp->chan_inch_addr, chsa, mema, chp->ccw_count, tcyl); chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */ break; @@ -1396,12 +1471,12 @@ t_stat hsdp_srv(UNIT *uptr) // ch = ((sec * 2) % SPT(type)) & 0x3f; /* get index cnt */ ch = ((2*SPT(type))-1) & 0x3f; /* get index cnt */ uptr->SNS2 = (uptr->SNS2 & 0xc0ff) | ((((uint32)ch) & 0x3f) << 8); - sim_debug(DEBUG_DETAIL, dptr, + sim_debug(DEBUG_CMD, dptr, "hsdp_srv RAP %02x cyl %04x trk %02x sec %02x\n", ch, cyl&0xffff, trk, sec); if (chan_write_byte(chsa, &ch)) { /* put a byte to memory */ - sim_debug(DEBUG_DATA, dptr, + sim_debug(DEBUG_CMD, dptr, "HSDP RAP %02x for addr /%04x/%02x/%02x\n", ch, ((uptr->CHS)>>16)&0xffff, ((uptr->CHS)>>8)&0xff, (uptr->CHS)&0xff); if (chp->chan_status & STATUS_PCHK) { /* test for memory error */ @@ -1422,7 +1497,7 @@ t_stat hsdp_srv(UNIT *uptr) trk = (uptr->CHS >> 8) & 0xff; /* get trk/head */ sec = 0; /* set sec to zero for this head */ - sim_debug(DEBUG_DETAIL, dptr, + sim_debug(DEBUG_CMD, dptr, "hsdp_srv IHA cyl %04x trk %02x sec %02x unit=%02x\n", cyl&0xffff, trk, sec, unit); @@ -1447,8 +1522,11 @@ t_stat hsdp_srv(UNIT *uptr) /* set new STAR value using new values */ uptr->CHS = CHS2STAR(cyl, trk, sec); + sim_debug(DEBUG_CMD, dptr, + "hsdp_srv IHA unit=%02x STAR %08x %04x/%02x/%02x\n", + unit, uptr->CHS, cyl, trk, sec); /* get alternate track if this one is defective */ -//sim_debug(DEBUG_DETAIL, dptr, "Dpatrk1 %08x label\n", uptr->CHS); +//sim_debug(DEBUG_CMD, dptr, "Dpatrk1 %08x label\n", uptr->CHS); tempt = get_dpatrk(uptr, uptr->CHS, lbuf); /* file offset in bytes to std or alt track */ tstart = STAR2SEC(tempt, SPT(type), SPC(type)) * SSB(type); @@ -1566,59 +1644,74 @@ iha_error: } /* bytes 0,1 - Cyl entry from CHS reg */ ch = (uptr->CHS >> 24) & 0xff; - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv sense CHS b0 unit=%02x 1 %02x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_srv sense CHS b0 unit=%02x 1 %02x\n", unit, ch); chan_write_byte(chsa, &ch); ch = (uptr->CHS >> 16) & 0xff; - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv sense CHS b1 unit=%02x 2 %02x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_srv sense CHS b1 unit=%02x 2 %02x\n", unit, ch); chan_write_byte(chsa, &ch); /* byte 2 - Track entry from CHS reg */ ch = (uptr->CHS >> 8) & 0xff; - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv sense CHS b2 unit=%02x 3 %02x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_srv sense CHS b2 unit=%02x 3 %02x\n", unit, ch); chan_write_byte(chsa, &ch); /* byte 3 - Sector entry from CHS reg */ ch = (uptr->CHS) & 0xff; sec = ch; /* save sec num for later */ - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv sense CHS b3 unit=%02x 4 %02x\n", +#ifndef FOR_TESTING + /* get STAR (target sector) data in STAR */ + cyl = STAR2CYL(uptr->CHS); /* get current cyl */ + trk = (uptr->CHS >> 8) & 0xff; /* get trk/head */ + if ((trk == (hsdp_type[type].nhds-1)) && /* see if last trk */ + ((cyl == hsdp_type[type].cyl-1)) && /* see if last cyl */ + (sec == 0)) { /* sec is zero */ +// ch = 0xff; /* show last track */ + ch = 0; /* show last track */ + } +#endif + sim_debug(DEBUG_CMD, dptr, "hsdp_srv sense CHS b3 unit=%02x 4 %02x\n", unit, ch); chan_write_byte(chsa, &ch); /* bytes 4 - mode reg, byte 0 of SNS */ ch = (uptr->SNS >> 24) & 0xff; /* return the sense data */ - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv sense unit=%02x 1 %02x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_srv sense unit=%02x 1 %02x\n", unit, ch); chan_write_byte(chsa, &ch); /* bytes 5-7 - status bytes, bytes 1-3 of SNS */ ch = (uptr->SNS >> 16) & 0xff; - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv sense unit=%02x 2 %02x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_srv sense unit=%02x 2 %02x\n", unit, ch); chan_write_byte(chsa, &ch); ch = (uptr->SNS >> 8) & 0xff; - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv sense unit=%02x 3 %02x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_srv sense unit=%02x 3 %02x\n", unit, ch); chan_write_byte(chsa, &ch); ch = (uptr->SNS) & 0xff; - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv sense unit=%02x 4 %02x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_srv sense unit=%02x 4 %02x\n", unit, ch); chan_write_byte(chsa, &ch); /* bytes 8-11 - drive mode register entries from assigned hsdp */ ch = hsdp_type[type].type & 0xff; /* type byte */ - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv datr unit=%02x 1 %02x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_srv datr unit=%02x 1 %02x\n", unit, ch); chan_write_byte(chsa, &ch); ch = hsdp_type[type].spt & 0xff; /* get sectors per track */ - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv datr unit=%02x 2 %02x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_srv datr unit=%02x 2 %02x\n", unit, ch); chan_write_byte(chsa, &ch); ch = hsdp_type[type].nhds & 0xff; /* get # MHD heads */ - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv datr unit=%02x 3 %02x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_srv datr unit=%02x 3 %02x\n", unit, ch); chan_write_byte(chsa, &ch); +#ifdef FOR_TESTING + ch = (uptr->SNS >> 24) & 0xff; /* get mode data */ +#else ch = 0; /* no FHD heads */ - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv datr unit=%02x 4 %02x\n", +#endif + sim_debug(DEBUG_CMD, dptr, "hsdp_srv datr unit=%02x 4 %02x\n", unit, ch); chan_write_byte(chsa, &ch); @@ -1632,15 +1725,15 @@ iha_error: ch = ((sec * 2) % SPT(type)) & 0x3f;/* get index cnt */ uptr->SNS2 = (uptr->SNS2 & 0xc0ff) | ((((uint32)ch) & 0x3f) << 8); ch = (uptr->SNS2 >> 8) & 0xff; /* seek end and unit selected for now */ - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv dsr unit=%02x 1 %02x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_srv dsr unit=%02x 1 %02x\n", unit, ch); chan_write_byte(chsa, &ch); -// ch = 0x30; /* drive on cylinder and ready for now */ + ch = 0x30; /* drive on cylinder and ready for now */ // uptr->SNS2 &= ~uptr->SNS2; /* clean out old status */ uptr->SNS2 |= (SNS_ONC|SNS_UNR); /* on cylinder & ready */ ch = uptr->SNS2 & 0xff; /* drive on cylinder and ready for now */ - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv dsr unit=%02x 2 %02x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_srv dsr unit=%02x 2 %02x\n", unit, ch); chan_write_byte(chsa, &ch); } @@ -1655,35 +1748,19 @@ iha_error: /* If we are waiting on seek to finish, check if there yet. */ if (uptr->CMD & DSK_SEEKING) { /* file offset in bytes to std or alt track */ - tstart = STAR2SEC(uptr->STAR, SPT(type), SPC(type)) * SSB(type); - /* see if on cylinder yet */ - if (STAR2CYL(uptr->STAR) == STAR2CYL(uptr->CHS)) { - /* we are on cylinder, seek is done */ - sim_debug(DEBUG_CMD, dptr, - "hsdp_srv seek on cylinder new %04x old %04x bytes %06x\n", - uptr->STAR >> 16, uptr->CHS >> 16, tstart); - uptr->CMD &= LMASK; /* remove old status bits & cmd */ - uptr->SNS2 |= (SNS_SEND|SNS_ONC); /* On cylinder & seek done */ - /* we have already seeked to the required sector */ - /* we do not need to seek again, so move on */ - chan_end(chsa, SNS_DEVEND|SNS_CHNEND); -// return SCPE_OK; - break; - } else { - /* we have wasted enough time, we there */ - /* we are on cylinder, seek is done */ - sim_debug(DEBUG_CMD, dptr, "hsdp_srv seek over on cylinder %04x bytes %06x\n", - uptr->STAR >> 16, tstart); - uptr->CHS = uptr->STAR; /* we are there */ -#ifdef FAST_FOR_UTX -// sim_activate(uptr, 15); - sim_activate(uptr, 20); /* start things off */ -#else - sim_activate(uptr, 150); /* start things off */ -// sim_activate(uptr, 300); /* start things off */ -#endif - break; - } + tstart = STAR2SEC(uptr->CHS, SPT(type), SPC(type)) * SSB(type); + /* we are on cylinder, seek is done */ + sim_debug(DEBUG_CMD, dptr, + "hsdp_srv seek on cylinder to %04x/%02x/%02x bytes %06x\n", + (uptr->CHS >> 16) & 0xffff, (uptr->CHS >> 8) & 0xff, + uptr->CHS & 0xff, tstart); + uptr->CMD &= LMASK; /* remove old status bits & cmd */ + uptr->SNS2 |= (SNS_SEND|SNS_ONC); /* On cylinder & seek done */ + /* we have already seeked to the required sector */ + /* we do not need to seek again, so move on */ + chan_end(chsa, SNS_DEVEND|SNS_CHNEND); +// return SCPE_OK; + break; } /* not seeking, so start a new seek */ @@ -1712,7 +1789,7 @@ iha_error: if (chp->chan_status & STATUS_PCHK) /* test for memory error */ uptr->SNS |= SNS_INAD; /* invalid address */ if (i == 0) { - sim_debug(DEBUG_DETAIL, dptr, + sim_debug(DEBUG_CMD, dptr, "hsdp_srv seek error unit=%02x star %02x %02x %02x %02x\n", unit, buf[0], buf[1], buf[2], buf[3]); /* we have error, bail out */ @@ -1732,29 +1809,49 @@ iha_error: } } } - chp->ccw_count = len; /* restore count for diag, huh? */ +//0106 chp->ccw_count = len; /* restore count for diag, huh? */ /* else the cyl, trk, and sect are ready to update */ sim_debug(DEBUG_CMD, dptr, "hsdp_srv STAR unit=%02x star %02x %02x %02x %02x\n", unit, buf[0], buf[1], buf[2], buf[3]); -// sim_debug(DEBUG_DETAIL, dptr, -// "hsdp_srv seek unit=%02x star %02x %02x %02x %02x\n", -// unit, buf[0], buf[1], buf[2], buf[3]); /* save STAR (target sector) data in STAR */ - uptr->STAR = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | (buf[3]); - cyl = STAR2CYL(uptr->STAR); /* get the cylinder */ + tstar = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | (buf[3]); + cyl = STAR2CYL(tstar); /* get the cylinder */ trk = buf[2]; /* get the track */ sec = buf[3]; /* get sec */ - sim_debug(DEBUG_DETAIL, dptr, + /* see if we need to incr to next track for alt sec support */ + if (uptr->LSC != SPT(type)) { + sim_debug(DEBUG_CMD, dptr, + "hsdp_srv LSC0 B4 test/incr cyl %04x trk %02x sec %02x\n", + (tstar>>16)&0xffff, (tstar>>8)&0xff, tstar&0xff); + if ((int)(tstar&0xff) >= (int)(SPT(type)-1)) { + tstar &= 0xffffff00; /* clear sector number */ + tstar += 0x00000100; /* bump head # */ + if (((tstar>>8)&0xff) >= (HDS(type))) { + tstar &= 0xffff00ff; /* clear head number */ + tstar += 0x00010000; /* bump cyl # */ + } + } + sim_debug(DEBUG_CMD, dptr, + "hsdp_srv LSC0 AF test/incr cyl %04x trk %02x sec %02x\n", + (tstar>>16)&0xffff, (tstar>>8)&0xff, tstar&0xff); +//#define DO_DYNAMIC_DEBUG +#ifdef DO_DYNAMIC_DEBUG +// cpu_dev.dctrl |= DEBUG_INST|DEBUG_TRAP|DEBUG_CMD|DEBUG_DETAIL; /* start instruction trace */ +#endif + } + + sim_debug(DEBUG_CMD, dptr, "hsdp_srv NEW SEEK cyl %04x trk %02x sec %02x unit=%02x\n", cyl&0xffff, trk, buf[3], unit); /* Check if seek valid */ if (cyl >= hsdp_type[type].cyl || trk >= hsdp_type[type].nhds || - buf[3] >= hsdp_type[type].spt) { +//0118 buf[3] >= hsdp_type[type].spt) { + buf[3] >= uptr->LSC) { sim_debug(DEBUG_CMD, dptr, "hsdp_srv seek ERROR cyl %04x trk %02x sec %02x unit=%02x\n", @@ -1772,76 +1869,60 @@ iha_error: break; } - /* set new STAR value using new values */ - tempt = CHS2STAR(cyl, trk, sec); /* get alternate track if this one is defective */ -//sim_debug(DEBUG_DETAIL, dptr, "Dpatrk2 %08x label\n", tempt); - tempt = get_dpatrk(uptr, tempt, lbuf); - /* file offset in bytes to std or alt track */ - tstart = STAR2SEC(tempt, SPT(type), SPC(type)) * SSB(type); +//sim_debug(DEBUG_CMD, dptr, "Dpatrk2 %08x label\n", tempt); + tempt = get_dpatrk(uptr, tstar, lbuf); - if ((tempt == 0) && (uptr->STAR != 0)) { + if ((tempt == 0) && (tstar != 0)) { /* we have error */ sim_debug(DEBUG_EXP, dptr, - "hsdp_srv SEEK get_dpatrk return error tempt %06x tstart %06x, STAR %08x\n", - tempt, tstart, uptr->STAR); + "hsdp_srv SEEK get_dpatrk return error tempt %06x STAR %08x\n", + tempt, tstar); + uptr->CMD &= LMASK; /* remove old status bits & cmd */ + chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); + break; } - /* calc the new sector address of data */ - /* calculate file position in bytes of requested sector */ - /* file offset in bytes */ -// tstart = STAR2SEC(uptr->STAR, SPT(type), SPC(type)) * SSB(type); - /* set new STAR value using old cyl value */ -// uptr->CHS = CHS2STAR(STAR2CYL(uptr->CHS), trk, buf[3]); - - /* set new STAR value using new values */ -/*05*/ uptr->STAR = CHS2STAR(cyl, trk, sec); /* file offset in bytes to std or alt track */ -/*05*/ tstart = STAR2SEC(uptr->STAR, SPT(type), SPC(type)) * SSB(type); + tstart = STAR2SEC(tempt, SPT(type), SPC(type)) * SSB(type); + /* set new STAR value using new values */ + uptr->CHS = tstar; - sim_debug(DEBUG_DETAIL, dptr, + sim_debug(DEBUG_CMD, dptr, "hsdp_srv seek start %04x cyl %04x trk %02x sec %02x CHS %08x\n", tstart, cyl, trk, buf[3], uptr->CHS); /* just seek to the location where we will r/w data */ if ((sim_fseek(uptr->fileref, tstart, SEEK_SET)) != 0) { /* seek home */ - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv Error on seek to %08x\n", tstart); + sim_debug(DEBUG_CMD, dptr, "hsdp_srv Error on seek to %08x\n", tstart); uptr->CMD &= LMASK; /* remove old status bits & cmd */ chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); break; // return SCPE_OK; } - /* Check if already on correct cylinder */ - /* if not, do a delay to slow things down */ - if (STAR2CYL(uptr->STAR) != STAR2CYL(uptr->CHS)) { - int diff = ((int)tcyl - (int)cyl); - if (diff < 0) - diff = -diff; - /* Do a fake seek to kill time */ - uptr->CMD |= DSK_SEEKING; /* show we are seeking */ - sim_debug(DEBUG_DETAIL, dptr, - "hsdp_srv seeking unit=%02x to %04x/%02x/%02x from cyl %04x (%04x)\n", - unit, cyl, trk, buf[3], tcyl, diff); + /* do a delay to slow things down */ + if (STAR2CYL(uptr->CHS) != tcyl) { + k = ((int)tcyl - (int)cyl); + if (k < 0) + k = -k; + } else { + k = 20; + } + /* Do a fake seek to kill time */ + uptr->CMD |= DSK_SEEKING; /* show we are seeking */ + sim_debug(DEBUG_CMD, dptr, + "hsdp_srv seeking unit=%02x to %04x/%02x/%02x from cyl %04x (%04x)\n", + unit, cyl, trk, buf[3], tcyl, k); #ifdef FAST_FOR_UTX sim_activate(uptr, 15); // sim_activate(uptr, 20); /* start things off */ -// sim_activate(uptr, 20+diff); /* start us off */ +// sim_activate(uptr, 20+k); /* start us off */ #else // sim_activate(uptr, 150); /* start things off */ - sim_activate(uptr, 200+diff); /* start us off */ -// sim_activate(uptr, 400+diff); /* start us off */ + sim_activate(uptr, 200+k); /* start us off */ +// sim_activate(uptr, 400+k); /* start us off */ #endif - } else { - /* we are on cylinder/track/sector, so go on */ - sim_debug(DEBUG_DETAIL, dptr, - "hsdp_srv done seeking to %04x cyl %04x trk %02x sec %02x\n", - tstart, cyl, trk, buf[3]); - /* set new STAR value */ - uptr->CHS = CHS2STAR(cyl, trk, buf[3]); - uptr->CMD &= LMASK; /* remove old status bits & cmd */ - chan_end(chsa, SNS_DEVEND|SNS_CHNEND); - } break; // return SCPE_OK; @@ -1849,7 +1930,6 @@ iha_error: sim_debug(DEBUG_CMD, dptr, "RD REZERO IPL unit=%02x seek 0\n", unit); /* Do a seek to 0 */ - uptr->STAR = 0; /* set STAR to 0, 0, 0 */ uptr->CHS = 0; /* set current CHS to 0, 0, 0 */ uptr->CMD &= LMASK; /* remove old status bits & cmd */ uptr->CMD |= DSK_SKC; /* show as seek command */ @@ -1864,7 +1944,7 @@ iha_error: // return SCPE_OK; } /* we are on cylinder/track/sector zero, so go on */ - sim_debug(DEBUG_DETAIL, dptr, "hsdp_srv done seek trk 0\n"); + sim_debug(DEBUG_CMD, dptr, "hsdp_srv done seek trk 0\n"); uptr->CMD &= LMASK; /* remove old status bits & cmd */ chan_end(chsa, SNS_DEVEND|SNS_CHNEND); // return SCPE_OK; @@ -1873,7 +1953,7 @@ iha_error: case DSK_LMR: /* 0x1F */ sim_debug(DEBUG_CMD, dptr, "Load Mode Reg unit=%02x\n", unit); /* Read in 1 character of mode data */ - if (chan_read_byte(chsa, &buf[0])) { + if (chan_read_byte(chsa, &buf[0])) { if (chp->chan_status & STATUS_PCHK) /* test for memory error */ uptr->SNS |= SNS_INAD; /* invalid address */ /* we have error, bail out */ @@ -1902,7 +1982,7 @@ iha_error: sim_debug(DEBUG_CMD, dptr, "HSDP Format starting CMD %08x chsa %04x buffer %06x count %04x\n", uptr->CMD, chsa, chp->ccw_addr, chp->ccw_count); - sim_debug(DEBUG_DETAIL, dptr, "Format %x label", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, "Format %x label", uptr->CHS); /* now read sector label data */ len = chp->ccw_count; for (i = 0; i < len; i++) { @@ -1917,10 +1997,10 @@ iha_error: break; } if ((i%16) == 0) - sim_debug(DEBUG_DETAIL, dptr, "\nFormat %x label", uptr->CHS); - sim_debug(DEBUG_DETAIL, dptr, " %02x", buf[i]); + sim_debug(DEBUG_CMD, dptr, "\nFormat %x label", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, " %02x", buf[i]); } - sim_debug(DEBUG_DETAIL, dptr, "\n"); + sim_debug(DEBUG_CMD, dptr, "\n"); chan_end(chsa, SNS_CHNEND|SNS_DEVEND); // chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); // return SCPE_OK; @@ -1941,12 +2021,12 @@ iha_error: uptr->CHS = hsdpsec2star(tstart, type); /* get alternate track if this one is defective */ -//sim_debug(DEBUG_DETAIL, dptr, "Dpatrk3 %08x label\n", uptr->CHS); +//sim_debug(DEBUG_CMD, dptr, "Dpatrk3 %08x label\n", uptr->CHS); tempt = get_dpatrk(uptr, uptr->CHS, lbuf); /* file offset in bytes to std or alt track */ tstart = STAR2SEC(tempt, SPT(type), SPC(type)) * SSB(type); - if ((tempt == 0) && (uptr->STAR != 0)) { + if ((tempt == 0) && (uptr->CHS != 0)) { /* we have error */ sim_debug(DEBUG_EXP, dptr, "hsdp_srv READ get_dpatrk return error tempt %06x tstart %06x\n", tempt, tstart); @@ -2005,10 +2085,10 @@ iha_error: "hsdp_srv after READ chsa %04x buffer %06x count %04x\n", chsa, chp->ccw_addr, chp->ccw_count); sim_debug(DEBUG_CMD, dptr, - "hsdp_srv after READ buffer %06x count %04x data %02x%02x%02x%02x %02x%02x%02x%02x\n", - chp->ccw_addr, chp->ccw_count, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7]); -// chp->ccw_addr, chp->ccw_count, buf[1016], buf[1017], buf[1018], buf[1019], -// buf[1020], buf[1021], buf[1022], buf[1023]); + "hsdp_srv READ data %02x%02x%02x%02x %02x%02x%02x%02x " + "%02x%02x%02x%02x %02x%02x%02x%02x\n", + buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7], + buf[8], buf[9], buf[10], buf[11], buf[12], buf[13], buf[14], buf[15]); uptr->CHS++; /* next sector number */ /* process the next sector of data */ @@ -2017,7 +2097,7 @@ iha_error: if (chan_write_byte(chsa, &ch)) { /* put a byte to memory */ if (chp->chan_status & STATUS_PCHK) /* test for memory error */ uptr->SNS |= SNS_INAD; /* invalid address */ - sim_debug(DEBUG_DATA, dptr, + sim_debug(DEBUG_CMD, dptr, "HSDP Read %04x bytes leaving %04x from diskfile /%04x/%02x/%02x\n", i, chp->ccw_count, ((uptr->CHS)>>16)&0xffff, ((uptr->CHS)>>8)&0xff, (uptr->CHS)&0xff); @@ -2083,6 +2163,24 @@ iha_error: ssize, chp->ccw_count, chp->ccw_addr, ((uptr->CHS)>>16)&0xffff, ((uptr->CHS)>>8)&0xff, (uptr->CHS)&0xff); + /* see if we need to incr to next track for alt sec support */ + if (uptr->LSC != SPT(type)) { + sim_debug(DEBUG_CMD, dptr, + "hsdp_srv LSC B4 test/incr cyl %04x trk %02x sec %02x\n", + (uptr->CHS>>16)&0xffff, (uptr->CHS>>8)&0xff, uptr->CHS&0xff); + if ((uptr->CHS&0xff) >= (SPT(type)-1)) { + uptr->CHS &= 0xffffff00; /* clear sector number */ + uptr->CHS += 0x00000100; /* bump head # */ + if (((uptr->CHS>>8)&0xff) >= (HDS(type))) { + uptr->CHS &= 0xffff00ff; /* clear head number */ + uptr->CHS += 0x00010000; /* bump cyl # */ + } + } + sim_debug(DEBUG_CMD, dptr, + "hsdp_srv LSC AF test/incr cyl %04x trk %02x sec %02x\n", + (uptr->CHS>>16)&0xffff, (uptr->CHS>>8)&0xff, uptr->CHS&0xff); + } + /* get sector offset */ tstart = STAR2SEC(uptr->CHS, SPT(type), SPC(type)); @@ -2101,7 +2199,7 @@ iha_error: /* see if we are done reading data */ if (test_write_byte_end(chsa)) { /* EOM reached, abort */ - sim_debug(DEBUG_DATA, dptr, + sim_debug(DEBUG_CMD, dptr, "HSDP Read complete for read from disk @ %04x/%02x/%02x\n", STAR2CYL(uptr->CHS), (uptr->CHS >> 8)&0xff, (uptr->CHS&0xff)); uptr->CMD &= LMASK; /* remove old status bits & cmd */ @@ -2109,7 +2207,7 @@ iha_error: break; } - sim_debug(DEBUG_DATA, dptr, + sim_debug(DEBUG_CMD, dptr, "HSDP sector read complete, %x bytes to go from diskfile /%04x/%02x/%02x\n", chp->ccw_count, STAR2CYL(uptr->CHS), ((uptr->CHS) >> 8)&0xff, (uptr->CHS&0xff)); #ifdef FAST_FOR_UTX @@ -2148,12 +2246,12 @@ iha_error: tstart = tstart * SSB(type); /* get alternate track if this one is defective */ -//sim_debug(DEBUG_DETAIL, dptr, "Dpatrk4 %08x label\n", uptr->CHS); +//sim_debug(DEBUG_CMD, dptr, "Dpatrk4 %08x label\n", uptr->CHS); tempt = get_dpatrk(uptr, uptr->CHS, lbuf); /* file offset in bytes to std or alt track */ tstart = STAR2SEC(tempt, SPT(type), SPC(type)) * SSB(type); - if ((tempt == 0) && (uptr->STAR != 0)) { + if ((tempt == 0) && (uptr->CHS != 0)) { /* we have error */ sim_debug(DEBUG_EXP, dptr, "hsdp_srv WRITE get_dpatrk return error tempt %06x tstart %06x\n", tempt, tstart); @@ -2233,24 +2331,26 @@ iha_error: } sim_debug(DEBUG_CMD, dptr, - "hsdp_srv after WRITE buffer %06x count %04x data %02x%02x%02x%02x %02x%02x%02x%02x\n", - chp->ccw_addr, chp->ccw_count, - buf2[0], buf2[1], buf2[2], buf2[3], buf2[4], buf2[5], buf2[6], buf2[7]); -// chp->ccw_addr, chp->ccw_count, buf2[1016], buf2[1017], buf2[1018], buf2[1019], -// buf2[1020], buf2[1021], buf2[1022], buf2[1023]); + "hsdp_srv after WRITE buffer %06x count %04x\n", + chp->ccw_addr, chp->ccw_count); sim_debug(DEBUG_CMD, dptr, + "hsdp_srv WRITE data %02x%02x%02x%02x %02x%02x%02x%02x " + "%02x%02x%02x%02x %02x%02x%02x%02x\n", + buf2[0], buf2[1], buf2[2], buf2[3], buf2[4], buf2[5], buf2[6], buf2[7], + buf2[8], buf2[9], buf2[10], buf2[11], buf2[12], buf2[13], buf2[14], buf2[15]); + sim_debug(DEBUG_DATA, dptr, "hsdp_srv after WRITE CAP %06x DIAG %06x\n", CAP(type), (((CYL(type) - 3) * HDS(type)) * SPT(type))); /* diag start */ /* get current sector offset */ j = STAR2SEC(tempt, SPT(type), SPC(type)); /* current sector */ i = ((CYL(type) - 3) * HDS(type)) * SPT(type); /* diag start */ - sim_debug(DEBUG_CMD, dptr, + sim_debug(DEBUG_DATA, dptr, "hsdp_srv after WRITE j %04x i %04x j-i %04x CAP %06x DIAG %06x\n", j, i, j-i, CAP(type), (((CYL(type) - 3) * HDS(type)) * SPT(type))); /* diag start */ if (j >= i) { /* only do diag sectors */ cecc = dple_ecc32(buf2, ssize); /* calc ecc for sector */ - sim_debug(DEBUG_CMD, dptr, + sim_debug(DEBUG_DATA, dptr, "ECC j %02x i %02x data write Old %08x Cur %08x cyl %04x hds %02x sec %02x\n", j, i, decc[j-i], cecc, STAR2CYL(tempt), ((tempt) >> 8)&0xff, (tempt&0xff)); decc[j-i] = cecc; /* set new ecc */ @@ -2293,13 +2393,32 @@ iha_error: uptr->CHS++; /* next sector number */ if (tcyl != 0) { /* see if done with write command */ - sim_debug(DEBUG_DATA, dptr, + sim_debug(DEBUG_CMD, dptr, "HSDP WroteB %04x bytes to diskfile cyl %04x hds %02x sec %02x\n", ssize, STAR2CYL(uptr->CHS), ((uptr->CHS) >> 8)&0xff, (uptr->CHS&0xff)); uptr->CMD &= LMASK; /* remove old status bits & cmd */ chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */ break; } + + /* see if we need to incr to next track for alt sec support */ + if (uptr->LSC != SPT(type)) { + sim_debug(DEBUG_CMD, dptr, + "hsdp_srv LSC2 B4 test/incr cyl %04x trk %02x sec %02x\n", + (uptr->CHS>>16)&0xffff, (uptr->CHS>>8)&0xff, uptr->CHS&0xff); + if ((uptr->CHS&0xff) >= (SPT(type)-1)) { + uptr->CHS &= 0xffffff00; /* clear sector number */ + uptr->CHS += 0x00000100; /* bump track # */ + if (((uptr->CHS>>8)&0xff) >= (HDS(type))) { + uptr->CHS &= 0xffff00ff; /* clear head number */ + uptr->CHS += 0x00010000; /* bump cyl # */ + } + } + sim_debug(DEBUG_CMD, dptr, + "hsdp_srv LSC2 AF test/incr cyl %04x trk %02x sec %02x\n", + (uptr->CHS>>16)&0xffff, (uptr->CHS>>8)&0xff, uptr->CHS&0xff); + } + /* get sector offset */ tstart = STAR2SEC(uptr->CHS, SPT(type), SPC(type)); @@ -2347,7 +2466,7 @@ iha_error: len = chp->ccw_count; /* get number of sectors per track */ mema = uptr->CHS+(len/30); /* save address */ - sim_debug(DEBUG_DETAIL, dptr, "before RSL Sector %x len %x\n", uptr->CHS, len); + sim_debug(DEBUG_CMD, dptr, "before RSL Sector %x len %x\n", uptr->CHS, len); /* read a 30 byte track label for each sector on track */ /* for 16 sectors per track, that is 480 bytes */ @@ -2396,22 +2515,22 @@ iha_error: break; } - sim_debug(DEBUG_DETAIL, dptr, "Sector %x label", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, "Sector %x label", uptr->CHS); /* now write sector label data */ for (i = 0; i < 30; i++) { if (chan_write_byte(chsa, &buf[i])) { /* we have write error, bail out */ uptr->CMD &= LMASK; /* remove old status bits & cmd */ - sim_debug(DEBUG_DETAIL, dptr, "\n"); + sim_debug(DEBUG_CMD, dptr, "\n"); chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); return SCPE_OK; break; } if (i == 16) - sim_debug(DEBUG_DETAIL, dptr, "\nSector %x label", uptr->CHS); - sim_debug(DEBUG_DETAIL, dptr, " %02x", buf[i]); + sim_debug(DEBUG_CMD, dptr, "\nSector %x label", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, " %02x", buf[i]); } - sim_debug(DEBUG_DETAIL, dptr, "\n"); + sim_debug(DEBUG_CMD, dptr, "\n"); /* leave STAR "unnormalized" for diags */ uptr->CHS++; /* bump to next track */ @@ -2425,7 +2544,7 @@ iha_error: uptr->CHS = mema; /* restore address */ - sim_debug(DEBUG_DETAIL, dptr, "after RSL Sector %x len %x\n", uptr->CHS, chp->ccw_count); + sim_debug(DEBUG_CMD, dptr, "after RSL Sector %x len %x\n", uptr->CHS, chp->ccw_count); /* command done */ uptr->CMD &= LMASK; /* remove old status bits & cmd */ @@ -2440,7 +2559,7 @@ iha_error: // mema = uptr->CHS+(len/30); /* save address */ mema = uptr->CHS; /* save address */ - sim_debug(DEBUG_DETAIL, dptr, "before WSL/WTF Sector %x len %x\n", uptr->CHS, len); + sim_debug(DEBUG_CMD, dptr, "before WSL/WTF Sector %x len %x\n", uptr->CHS, len); /* read a 30 byte sector label for each sector on track */ /* for 16 sectors per track, that is 480 bytes */ @@ -2448,7 +2567,7 @@ iha_error: for (j=0; jCHS); + sim_debug(DEBUG_CMD, dptr, "Sector %x label", uptr->CHS); /* now read sector label data */ for (i = 0; i < 30; i++) { if (chan_read_byte(chsa, &buf[i])) { @@ -2461,10 +2580,10 @@ iha_error: break; } if ((i%16) == 0) - sim_debug(DEBUG_DETAIL, dptr, "\nSector %x label", uptr->CHS); - sim_debug(DEBUG_DETAIL, dptr, " %02x", buf[i]); + sim_debug(DEBUG_CMD, dptr, "\nSector %x label", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, " %02x", buf[i]); } - sim_debug(DEBUG_DETAIL, dptr, "\n"); + sim_debug(DEBUG_CMD, dptr, "\n"); /* see if user trying to set invalid bit pattern */ if ((buf[4] & 0x48) == 0x48) { /* see if setting defective alternate trk */ @@ -2534,7 +2653,7 @@ iha_error: uptr->CHS = mema; /* restore address */ - sim_debug(DEBUG_DETAIL, dptr, "after WSL/WTF Sector %x len %x\n", uptr->CHS, chp->ccw_count); + sim_debug(DEBUG_CMD, dptr, "after WSL/WTF Sector %x len %x\n", uptr->CHS, chp->ccw_count); /* command done */ uptr->CMD &= LMASK; /* remove old status bits & cmd */ @@ -2545,15 +2664,10 @@ iha_error: break; case DSK_RVL: /* 0x42 Read vendor label */ - /* Read track zero to get disk geometry */ + /* Read track label to get defect information */ /* write 30 bytes, b0-b1=cyl, b1=trk, b2=sec */ - /* zero the Track Label Buffer */ -// for (i = 0; i < 30; i++) -// buf[i] = 0; - - uptr->CHS &= 0xffffff00; /* zero sector for trk read */ - mema = uptr->CHS; + mema = uptr->CHS & 0xffffff00; /* zero sector for trk read */ /* get file offset in sectors */ tstart = STAR2SEC(mema, SPT(type), SPC(type)); @@ -2599,16 +2713,16 @@ iha_error: if (buf[4] == 0x08) { /* see if defective track */ uptr->SNS |= SNS_DEFTRK; /* flag as defective */ - sim_debug(DEBUG_DETAIL, dptr, "Track %08x is defective\n", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, "Track %08x is defective\n", uptr->CHS); } if (buf[4] == 0x40) { /* see if alternate track */ uptr->SNS |= SNS_AATT; /* flag as alternate */ - sim_debug(DEBUG_DETAIL, dptr, "Track %08x is alternate\n", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, "Track %08x is alternate\n", uptr->CHS); } /* now write track label data to memory */ - sim_debug(DEBUG_DETAIL, dptr, "Track %08x label", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, "Track %08x label", uptr->CHS); for (i = 0; i < 30; i++) { if (chan_write_byte(chsa, &buf[i])) { /* we have write error, bail out */ @@ -2617,10 +2731,10 @@ iha_error: break; } if (i == 16) - sim_debug(DEBUG_DETAIL, dptr, "\nTrack %08x label", uptr->CHS); - sim_debug(DEBUG_DETAIL, dptr, " %02x", buf[i]); + sim_debug(DEBUG_CMD, dptr, "\nTrack %08x label", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, " %02x", buf[i]); } - sim_debug(DEBUG_DETAIL, dptr, "\n"); + sim_debug(DEBUG_CMD, dptr, "\n"); /* command done */ uptr->CMD &= LMASK; /* remove old status bits & cmd */ @@ -2680,16 +2794,16 @@ iha_error: if (buf[4] == 0x08) { /* see if defective track */ uptr->SNS |= SNS_DEFTRK; /* flag as defective */ - sim_debug(DEBUG_DETAIL, dptr, "Track %08x is defective\n", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, "Track %08x is defective\n", uptr->CHS); } if (buf[4] == 0x40) { /* see if alternate track */ uptr->SNS |= SNS_AATT; /* flag as alternate */ - sim_debug(DEBUG_DETAIL, dptr, "Track %08x is alternate\n", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, "Track %08x is alternate\n", uptr->CHS); } /* now write track label data to memory */ - sim_debug(DEBUG_DETAIL, dptr, "Track %08x label", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, "Track %08x label", uptr->CHS); for (i = 0; i < 30; i++) { if (chan_write_byte(chsa, &buf[i])) { /* we have write error, bail out */ @@ -2698,11 +2812,15 @@ iha_error: break; } if (i == 16) - sim_debug(DEBUG_DETAIL, dptr, "\nTrack %08x label", uptr->CHS); - sim_debug(DEBUG_DETAIL, dptr, " %02x", buf[i]); + sim_debug(DEBUG_CMD, dptr, "\nTrack %08x label", uptr->CHS); + sim_debug(DEBUG_CMD, dptr, " %02x", buf[i]); } - sim_debug(DEBUG_DETAIL, dptr, "\n"); + sim_debug(DEBUG_CMD, dptr, "\n"); + /* see if we are operating in sector replacement mode */ + /* if specified sector count will be 1 less than physical sector count */ + if (uptr->CHS == 0) /* see if trk 0 label read */ + uptr->LSC = buf[25]; /* save logical sector count from label */ /* command done */ uptr->CMD &= LMASK; /* remove old status bits & cmd */ sim_debug(DEBUG_CMD, dptr, "hsdp_srv cmd RTL done chsa %04x count %04x completed\n", @@ -2746,7 +2864,7 @@ iha_error: return SCPE_OK; } - sim_debug(DEBUG_DETAIL, dptr, "Track %08x label", uptr->CHS); + sim_debug(DEBUG_EXP, dptr, "Track %08x label", uptr->CHS); /* now read track label data from memory */ for (i = 0; i < 30; i++) { if (chan_read_byte(chsa, &buf[i])) { @@ -2759,10 +2877,10 @@ iha_error: break; } if (i == 16) - sim_debug(DEBUG_DETAIL, dptr, "\nTrack %08x label", uptr->CHS); - sim_debug(DEBUG_DETAIL, dptr, " %02x", buf[i]); + sim_debug(DEBUG_EXP, dptr, "\nTrack %08x label", uptr->CHS); + sim_debug(DEBUG_EXP, dptr, " %02x", buf[i]); } - sim_debug(DEBUG_DETAIL, dptr, "\n"); + sim_debug(DEBUG_EXP, dptr, "\n"); /* see if user trying to set invalid bit pattern */ if ((buf[4] & 0x48) == 0x48) { /* see if setting defective alternate trk */ @@ -2812,7 +2930,7 @@ iha_error: chan_end(chsa, SNS_CHNEND|STATUS_PCHK); /* return prog check */ break; } - sim_debug(DEBUG_DETAIL, dptr, + sim_debug(DEBUG_CMD, dptr, "hsdp_srv done cmd %02x chsa %04x chs %04x/%02x/%02x\n", cmd, chsa, ((uptr->CHS)>>16)&0xffff, ((uptr->CHS)>>8)&0xff, (uptr->CHS)&0xff); return SCPE_OK; @@ -2826,7 +2944,6 @@ void hsdp_ini(UNIT *uptr, t_bool f) /* start out at sector 0 */ uptr->CHS = 0; /* set CHS to cyl/hd/sec = 0 */ - uptr->STAR = 0; /* set STAR to cyl/hd/sec = 0 */ uptr->CMD &= LMASK; /* clear out the flags but leave ch/sa */ /* total sectors on disk */ uptr->capac = CAP(i); /* size in sectors */ @@ -2861,7 +2978,7 @@ t_stat hsdp_reset(DEVICE *dptr) /* The next lower track contains the UTX media map (UMAP) and is pointed */ /* to by word 3 of sector label 1 and is placed there by the UTX prep program */ /* Add track and sector labels to disk */ -int hsdp_label(UNIT *uptr) { +int hsdp_label(UNIT *uptr, int use_strep) { int type = GET_TYPE(uptr->flags); DEVICE *dptr = get_dev(uptr); uint32 trk, cyl, sec; @@ -2874,15 +2991,23 @@ int hsdp_label(UNIT *uptr) { uint8 label[34]; /* track/sector label */ int32 i, j; /* get sector address of vendor defect table VDT */ - /* put data = 0xf0000000 0xf4000000 */ + /* put data = 0xf0000004 0xf4000000 */ int32 vaddr = (CYL(type)-4) * SPC(type) + (HDS(type)-1) * SPT(type); + /* make logical */ + int32 logva = vaddr*(SPT(type)-1)/(SPT(type)); + /* get sector address of utx diag map (DMAP) track 0 pointer */ /* put data = 0xf0000000 + (cyl-1), 0x8a000000 + daddr, */ /* 0x9a000000 + (cyl-1), 0xf4000000 */ int32 daddr = (CYL(type)-4) * SPC(type) + (HDS(type)-2) * SPT(type); + /* make logical */ + int32 logda = daddr*(SPT(type)-1)/(SPT(type)); + /* get sector address of utx flaw map sec 1 pointer */ /* use this address for sec 1 label pointer */ int32 uaddr = (CYL(type)-4) * SPC(type) + (HDS(type)-3) * SPT(type); + /* make logical */ + int32 logua = uaddr*(SPT(type)-1)/(SPT(type)); /* write 30 byte track labels for all tracks on disk */ /* tot_tracks entries will be created starting at end of disk */ @@ -2916,7 +3041,7 @@ int hsdp_label(UNIT *uptr) { sec = (CHS) & 0xff; /* get the sector */ } - sim_debug(DEBUG_CMD, dptr, "hsdp_format WTL STAR %08x disk geom %08x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_label WTL STAR %08x disk geom %08x\n", CHS, GEOM(type)); /* set buf data to current STAR values */ @@ -2930,17 +3055,60 @@ int hsdp_label(UNIT *uptr) { label[4] |= 0x04; /* set last track flag */ } - sim_debug(DEBUG_DETAIL, dptr, - "hsdp_format RTL star %02x %02x %02x %02x\n", + sim_debug(DEBUG_CMD, dptr, + "hsdp_label RTL star %02x %02x %02x %02x\n", label[0], label[1], label[2], label[3]); /* daddr has dmap value for track zero label */ if (CHS == 0) { /* only write dmap address in trk 0 */ - /* output last sector address of disk */ - label[12] = (daddr >> 24) & 0xff; /* lumapp DMAP pointer */ - label[13] = (daddr >> 16) & 0xff; - label[14] = (daddr >> 8) & 0xff; - label[15] = (daddr) & 0xff; +#if 1 + if (use_strep) { + /* output logical diag defect map address of disk */ + label[12] = (logda >> 24) & 0xff; /* ldeallp DMAP pointer */ + label[13] = (logda >> 16) & 0xff; + label[14] = (logda >> 8) & 0xff; + label[15] = (logda) & 0xff; + printf("hsdp_label WTL logda@daddr %08x -> %08x\r\n", logda, 0); + sim_debug(DEBUG_CMD, dptr, + "hsdp_label WTL logda@daddr %08x -> %08x\n", logda, 0); + } else +#endif + { + /* output physical diag defect map address of disk */ + label[12] = (daddr >> 24) & 0xff; /* ldeallp DMAP pointer */ + label[13] = (daddr >> 16) & 0xff; + label[14] = (daddr >> 8) & 0xff; + label[15] = (daddr) & 0xff; + printf("hsdp_label WTL daddr@daddr %08x -> %08x\r\n", daddr, 0); + sim_debug(DEBUG_CMD, dptr, + "hsdp_label WTL daddr@daddr %08x -> %08x\n", vaddr, 0); + } + } + + /* write vaddr to track label for dmap */ + if ((i*SPT(type)) == daddr) { /* get track address in sectors */ +#if 0 + if (use_strep) { + /* output logical vendor defect map address of disk */ + label[12] = (logva >> 24) & 0xff; /* Vaddr pointer vdt */ + label[13] = (logva >> 16) & 0xff; + label[14] = (logva >> 8) & 0xff; + label[15] = (logva) & 0xff; + printf("hsdp_label WTL logva@vaddr %08x -> %08x\r\n", logva, vaddr); + sim_debug(DEBUG_CMD, dptr, + "hsdp_label WTL logva@vaddr %08x -> %08x\n", logva, vaddr); + } else +#endif + { + /* output physical vendor defect map address of disk */ + label[12] = (vaddr >> 24) & 0xff; /* Vaddr pointer vdt */ + label[13] = (vaddr >> 16) & 0xff; + label[14] = (vaddr >> 8) & 0xff; + label[15] = (vaddr) & 0xff; + printf("hsdp_label WTL vaddr@vaddr %08x -> %08x\r\n", vaddr, vaddr); + sim_debug(DEBUG_CMD, dptr, + "hsdp_label WTL vaddr@vaddr %08x -> %08x\n", vaddr, vaddr); + } } /* if this is removed, UTX is unable to create newfs */ @@ -2949,22 +3117,53 @@ int hsdp_label(UNIT *uptr) { /* maybe not needed, but left anyway */ /* uaddr has umap value for track zero label */ if (CHS == 0) { /* only write dmap address in trk 0 */ - /* output last sector address of disk */ - label[16] = (uaddr >> 24) & 0xff; /* lumapp UMAP physical pointer */ - label[17] = (uaddr >> 16) & 0xff; - label[18] = (uaddr >> 8) & 0xff; - label[19] = (uaddr) & 0xff; +#if 1 + if (use_strep) { + /* output logical umap address */ + label[16] = (logua >> 24) & 0xff; /* lumapp UMAP physical pointer */ + label[17] = (logua >> 16) & 0xff; + label[18] = (logua >> 8) & 0xff; + label[19] = (logua) & 0xff; + } else +#endif + { + /* output physical umap address */ + label[16] = (uaddr >> 24) & 0xff; /* lumapp UMAP physical pointer */ + label[17] = (uaddr >> 16) & 0xff; + label[18] = (uaddr >> 8) & 0xff; + label[19] = (uaddr) & 0xff; + } } #endif - /* the tech doc shows the cyl/trk/sec data is in the first 4 bytes */ + /* the tech doc shows the cyl/trk/sec data is in the first 4 bytes */ /* of the track label, BUT it is really in the configuration data */ /* area too. Byte 27 is sectors/track and byte 28 is number of heads. */ /* Byte 26 is mode. Byte 25 is copy of byte 27. */ - label[25] = SPT(type) & 0xff; +#if 1 + if ((use_strep) && (daddr == (i*SPT(type)) || (i == 0))) { +// if ((use_strep) && (daddr == (i*SPT(type)) )) { + label[25] = (SPT(type)-1) & 0xff; + if (CHS == 0) /* see if trk 0 label read */ + uptr->LSC = label[25]; /* save logical sector count from label */ + } else +#endif + { + if (CHS == 0) /* see if trk 0 label read */ + uptr->LSC = label[25]; /* save logical sector count from label */ + label[25] = SPT(type) & 0xff; + } label[26] = hsdp_type[type].type & 0xfd; /* zero bits 6 & set 7 in type byte */ // buf[26] = hsdp_type[type].type | 1; /* mode data is 0x41 */ - label[27] = SPT(type) & 0xff; +#if 1 + if ((use_strep) && (daddr == (i*SPT(type)) || (i == 0))) { +// if ((use_strep) && (daddr == (i*SPT(type)) )) { + label[27] = (SPT(type)-1) & 0xff; + } else +#endif + { + label[27] = SPT(type) & 0xff; + } label[28] = HDS(type) & 0xff; if ((sim_fwrite((char *)&label, sizeof(uint8), 30, uptr->fileref)) != 30) { @@ -3002,7 +3201,7 @@ int hsdp_label(UNIT *uptr) { trk = (CHS >> 8) & 0xff; /* get the track */ sec = (CHS) & 0xff; /* get the sector */ - sim_debug(DEBUG_CMD, dptr, "hsdp_format WSL STAR %08x disk geom %08x\n", + sim_debug(DEBUG_CMD, dptr, "hsdp_label WSL STAR %08x disk geom %08x\n", CHS, GEOM(type)); /* set buf data to current STAR values */ @@ -3012,8 +3211,8 @@ int hsdp_label(UNIT *uptr) { label[3] = sec & 0xff; /* lid sector ID */ label[4] = 0x80; /* show good sector */ - sim_debug(DEBUG_DETAIL, dptr, - "hsdp_format WSL star %02x %02x %02x %02x\n", + sim_debug(DEBUG_CMD, dptr, + "hsdp_label WSL star %02x %02x %02x %02x\n", label[0], label[1], label[2], label[3]); label[12] = 0; @@ -3021,29 +3220,28 @@ int hsdp_label(UNIT *uptr) { label[14] = 0; label[15] = 0; - /* write vaddr to sector label for dmap */ - if (i == daddr) { /* get track address in sectors */ - /* output last sector address of disk */ - label[12] = (vaddr >> 24) & 0xff; /* Vaddr pointer */ - label[13] = (vaddr >> 16) & 0xff; - label[14] = (vaddr >> 8) & 0xff; - label[15] = (vaddr) & 0xff; - sim_debug(DEBUG_DETAIL, dptr, - "hsdp_format WSL vaddr@daddr %08x -> %08x\n", vaddr, daddr); - } /* if this is written, UTX will not be able to do a newfs */ /* gets preposterous size 0 error */ -#ifdef XXXX_121720 +#ifndef XXXX_121720 + /* maybe not needed, but left anyway */ /* uaddr has umap value for sector one label */ - if (CHS == 1) { /* only write dmap address in trk 0 */ - /* output last sector address of disk */ - label[12] = (luaddr >> 24) & 0xff; /* logical UMAP pointer */ - label[13] = (luaddr >> 16) & 0xff; - label[14] = (luaddr >> 8) & 0xff; - label[15] = (luaddr) & 0xff; - sim_debug(DEBUG_DETAIL, dptr, - "hsdp_format WSL uaddr star %02x %02x %02x %02x\n", - label[16], label[17], label[18], label[19]); + if (CHS == 1) { /* write umap address in sec 1 */ +#if 1 + if (use_strep) { + /* output logical umap address */ + label[12] = (logua >> 24) & 0xff; /* lumapp UMAP physical pointer */ + label[13] = (logua >> 16) & 0xff; + label[14] = (logua >> 8) & 0xff; + label[15] = (logua) & 0xff; + } else +#endif + { + /* output physical umap address */ + label[12] = (uaddr >> 24) & 0xff; /* lumapp UMAP physical pointer */ + label[13] = (uaddr >> 16) & 0xff; + label[14] = (uaddr >> 8) & 0xff; + label[15] = (uaddr) & 0xff; + } } #endif /* the tech doc shows the cyl/trk/sec data is in the first 4 bytes */ @@ -3086,25 +3284,30 @@ int hsdp_format(UNIT *uptr) { uint32 cylv = cyl; /* number of cylinders */ uint8 *buff; int i; + int use_st_format = 1; /* last sector address of disk (cyl * hds * spt) - 1 */ uint32 laddr = CAP(type) - 1; /* last sector of disk */ /* make logical */ - int32 logla = laddr*(SPC(type)-1)/(SPC(type)); + int32 logla = laddr*(SPT(type)-1)/(SPT(type)); /* get sector address of vendor defect table VDT */ - /* put data = 0xf0000000 0xf4000000 */ + /* put data = 0xf0000004 0xf4000000 */ int32 vaddr = (CYL(type)-4) * SPC(type) + (HDS(type)-1) * SPT(type); + /* make logical */ + int32 logva = vaddr*(SPT(type)-1)/(SPT(type)); /* get sector address of utx diag map (DMAP) track 0 pointer */ /* put data = 0xf0000000 + (cyl-1), 0x8a000000 + daddr, */ /* 0x9a000000 + (cyl-1), 0xf4000000 */ + // int32 daddr = vaddr - SPT(type); int32 daddr = (CYL(type)-4) * SPC(type) + (HDS(type)-2) * SPT(type); /* make logical */ - int32 logda = daddr*(SPC(type)-1)/(SPC(type)); + int32 logda = daddr*(SPT(type)-1)/(SPT(type)); - int32 uaddr = daddr - SPT(type); +// int32 uaddr = daddr - SPT(type); + int32 uaddr = (CYL(type)-4) * SPC(type) + (HDS(type)-3) * SPT(type); /* NULL vendor flaw map */ uint32 vmap[2] = {0xf0000004, 0xf4000000}; @@ -3112,13 +3315,17 @@ int hsdp_format(UNIT *uptr) { /* NULL diag flaw map */ uint32 pdmap[4] = {0xf0000000 | (cap-1), 0x8a000000 | daddr, 0x9a000000 | (cap-1), 0xf4000000}; - uint32 dmap[4] = {0xf0000000 | logla, 0x8a000000 | logda, - 0x9a000000 | logla, 0xf4000000}; + uint32 dmap[4] = {0xf0000000 | (((cap-1)*(SPT(type)-1))/(SPT(type))), + 0x8a000000 | logda, + 0x9a000000 | (((cap-1)*(SPT(type)-1))/(SPT(type))), 0xf4000000}; /* see if user wants to initialize the disk */ if (!get_yn("Initialize disk? [Y] ", TRUE)) { return 1; } + if (!get_yn("Use Sector/Track replacement format? [Y] ", TRUE)) { + use_st_format = 0; + } /* get physical sector address of media defect table */ /* VDT 286965 (819/9/0) 0x460f5 for 8887 - 823/10/35 */ @@ -3214,26 +3421,35 @@ int hsdp_format(UNIT *uptr) { daddr, daddr*ssize); return 1; } - if ((sim_fwrite((char *)&pdmap, sizeof(uint32), 4, uptr->fileref)) != 4) { - sim_debug(DEBUG_CMD, dptr, - "Error writing DMAP to sect %06x offset %06x\n", - daddr, daddr*ssize); - return 1; + if (use_st_format) { + if ((sim_fwrite((char *)&dmap, sizeof(uint32), 4, uptr->fileref)) != 4) { + sim_debug(DEBUG_CMD, dptr, + "Error writing LDMAP to sect %06x offset %06x\n", + daddr, daddr*ssize); + return 1; + } + } else { + if ((sim_fwrite((char *)&pdmap, sizeof(uint32), 4, uptr->fileref)) != 4) { + sim_debug(DEBUG_CMD, dptr, + "Error writing DMAP to sect %06x offset %06x\n", + daddr, daddr*ssize); + return 1; + } } printf("Disk %s has %x (%d) cyl, %x (%d) hds, %x (%d) sec\r\n", hsdp_type[type].name, CYL(type), CYL(type), HDS(type), HDS(type), SPT(type), SPT(type)); - printf("writing to vmap sec %x (%d) bytes %x (%d)\n", + printf("writing to vmap sec %x (%d) bytes %x (%d)\r\n", vaddr, vaddr, (vaddr)*ssize, (vaddr)*ssize); - printf("writing dmap to %x %d %x %d dmap to %x %d %x %d\n", + printf("writing dmap to %x %d %x %d dmap to %x %d %x %d\r\n", cap-1, cap-1, (cap-1)*ssize, (cap-1)*ssize, daddr, daddr, daddr*ssize, daddr*ssize); - printf("writing to umap sec %x (%d) bytes %x (%d)\n", + printf("writing to umap sec %x (%d) bytes %x (%d)\r\n", uaddr, uaddr, (uaddr)*ssize, (uaddr)*ssize); /* create labels for disk */ - i = hsdp_label(uptr); /* label disk */ + i = hsdp_label(uptr, use_st_format); /* label disk */ /* seek home again */ if ((sim_fseek(uptr->fileref, 0, SEEK_SET)) != 0) { /* seek home */ @@ -3292,8 +3508,7 @@ t_stat hsdp_attach(UNIT *uptr, CONST char *file) hsdp_type[type].name, hsdp_type[type].cyl, hsdp_type[type].nhds, hsdp_type[type].spt, ssize, uptr->capac); /* hsdp capacity */ - printf( - "Disk %s cyl %d hds %d sec %d ssiz %d capacity %d\r\n", + printf("Disk %s cyl %d hds %d sec %d ssiz %d capacity %d\r\n", hsdp_type[type].name, hsdp_type[type].cyl, hsdp_type[type].nhds, hsdp_type[type].spt, ssize, uptr->capac); /* disk capacity */ @@ -3317,8 +3532,7 @@ t_stat hsdp_attach(UNIT *uptr, CONST char *file) j = (CAP(type) - (s/ssize)); /* get # sectors to write */ sim_debug(DEBUG_CMD, dptr, "Disk attach for MPX 1.X needs %04d more sectors added to disk\n", j); - printf( - "Disk attach for MPX 1.X needs %04d more sectors added to disk\r\n", j); + printf("Disk attach for MPX 1.X needs %04d more sectors added to disk\r\n", j); /* must be MPX 1.X disk, extend to MPX 3.X size */ /* write sectors of zero to end of disk to fill it out */ for (i=0; ifileref) != 30)) { + int use_st_format = 1; /* the disk does not have labels, add them on */ /* create labels for disk */ sim_debug(DEBUG_CMD, dptr, "File %s attached to %s creating labels\n", file, hsdp_type[type].name); - printf( - "File %s attached to %s creating labels\r\n", + printf("File %s attached to %s creating labels\r\n", file, hsdp_type[type].name); - i = hsdp_label(uptr); /* label disk */ + if (!get_yn("Use Sector/Track replacement format for labels? [Y] ", TRUE)) { + use_st_format = 0; + } + /* create labels for disk */ + i = hsdp_label(uptr, use_st_format); /* label disk */ + +//0111 i = hsdp_label(uptr); /* label disk */ +// i = hsdp_format(uptr); /* label disk */ if (i != 0) { detach_unit(uptr); /* detach if error */ return SCPE_FMT; /* error */ } } + /* see if disk has labels already, seek to sector past end of disk */ + if ((sim_fseek(uptr->fileref, CAP(type)*ssize, SEEK_SET)) != 0) { /* seek end */ + detach_unit(uptr); /* detach if error */ + return SCPE_FMT; /* error */ + } + /* see if disk has labels already, read label for track 0 */ + if ((r = sim_fread(buff, sizeof(uint8), 30, uptr->fileref) != 30)) { + detach_unit(uptr); /* detach if error */ + return SCPE_FMT; /* error */ + } + uptr->LSC = buff[25]; /* save logical sector count from label */ + if ((sim_fseek(uptr->fileref, 0, SEEK_SET)) != 0) { /* seek home */ detach_unit(uptr); /* detach if error */ return SCPE_FMT; /* error */ @@ -3446,16 +3680,14 @@ ldone: "HSDP Attach %s cyl %d hds %d spt %d spc %d cap sec %d cap bytes %d\n", hsdp_type[type].name, CYL(type), HDS(type), SPT(type), SPC(type), CAP(type), CAPB(type)); - printf( - "HSDP Attach %s cyl %d hds %d spt %d spc %d cap sec %d cap bytes %d\r\n", + printf("HSDP Attach %s cyl %d hds %d spt %d spc %d cap sec %d cap bytes %d\r\n", hsdp_type[type].name, CYL(type), HDS(type), SPT(type), SPC(type), CAP(type), CAPB(type)); sim_debug(DEBUG_CMD, dptr, "HSDP File %s attached to %s\n", file, hsdp_type[type].name); - printf( - "HSDP File %s attached to %s\r\n", + printf("HSDP File %s attached to %s\r\n", file, hsdp_type[type].name); /* check for valid configured disk */ diff --git a/SEL32/sel32_mt.c b/SEL32/sel32_mt.c index 17367a1..de14edd 100644 --- a/SEL32/sel32_mt.c +++ b/SEL32/sel32_mt.c @@ -645,7 +645,8 @@ t_stat mt_srv(UNIT *uptr) break; case MT_READ: /* 0x02 */ /* read a record from the device */ - sim_debug(DEBUG_DETAIL, &mta_dev, "mt_srv cmd 2 READ unit=%02x\n", unit); +// sim_debug(DEBUG_DETAIL, &mta_dev, "mt_srv cmd 2 READ unit=%02x\n", unit); + sim_debug(DEBUG_CMD, &mta_dev, "mt_srv cmd 2 READ unit=%02x\n", unit); if (uptr->CMD & MT_READDONE) { /* is the read complete */ uptr->SNS &= ~(SNS_LOAD|SNS_EOT); /* reset BOT & EOT */ if (sim_tape_eot(uptr)) { /* see if at EOM */ @@ -703,13 +704,14 @@ t_stat mt_srv(UNIT *uptr) mt_busy[bufnum] &= ~1; /* set not busy */ chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return end status */ } else { +// sim_debug(DEBUG_CMD, &mta_dev, sim_debug(DEBUG_DETAIL, &mta_dev, "Read data @2 unit %02x cnt %04x ch %02x hwm %04x\n", unit, uptr->POS, ch, uptr->hwmark); if ((uint32)uptr->POS >= uptr->hwmark) { /* In IRG */ /* Handle end of data record */ sim_debug(DEBUG_CMD, &mta_dev, - "Read too much data unit %02x cnt %04x ch %02x hwm %04x\n", + "Read end of data unit %02x cnt %04x ch %02x hwm %04x\n", unit, uptr->POS, ch, uptr->hwmark); uptr->CMD |= MT_READDONE; /* read is done */ sim_activate(uptr, 40); /* wait again */ diff --git a/SEL32/sel32_scfi.c b/SEL32/sel32_scfi.c index 9e687b2..58c9a56 100644 --- a/SEL32/sel32_scfi.c +++ b/SEL32/sel32_scfi.c @@ -477,6 +477,16 @@ loop: chp->chan_caw = (chp->chan_caw & 0xfffffc) + 8; /* point to next IOCD */ chp->ccw_cmd = (word1 >> 24) & 0xff; /* set command from IOCD wd 1 */ + /* Check if we had data chaining in previous iocd */ + /* if we did, use previous cmd value */ + if (((chp->chan_info & INFO_SIOCD) == 0) && /* see if 1st IOCD in channel prog */ + (chp->ccw_flags & FLAG_DC)) { /* last IOCD have DC set? */ + sim_debug(DEBUG_CMD, dptr, + "ec_iocl @%06x DO DC, ccw_flags %04x cmd %02x\n", + chp->chan_caw, chp->ccw_flags, chp->ccw_cmd); + } else + chp->ccw_cmd = (word1 >> 24) & 0xff; /* set new command from IOCD wd 1 */ + if (!MEM_ADDR_OK(word1 & MASK24)) { /* see if memory address invalid */ chp->chan_status |= STATUS_PCHK; /* bad, program check */ uptr->SNS |= SNS_INAD; /* invalid address status */ diff --git a/SEL32/sel32_scsi.c b/SEL32/sel32_scsi.c index ec5adb1..f14cfd5 100644 --- a/SEL32/sel32_scsi.c +++ b/SEL32/sel32_scsi.c @@ -177,7 +177,7 @@ bits 24-31 - FHD head count (number of heads on FHD or number head on FHD option #define DSK_TCMD 0xD3 /* Transfer Command Packet (specifies CDB to send) */ //#define DSK_ICH 0xFF /* Initialize Controller */ #define DSK_FRE 0xF3 /* Reserved */ -#define DSK_SID 0x80 /* MFP stataus command */ +#define DSK_SID 0x80 /* MFP status command */ #define STAR u4 /* u4 - sector target address register (STAR) */ @@ -445,46 +445,39 @@ uint16 scsi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) if ((uptr->CMD & 0xff00) != 0) { /* if any status info, we are busy */ return SNS_BSY; } - sim_debug(DEBUG_CMD, dptr, "scsi_startcmd CMD 2 unit=%02x cmd %02x\n", unit, cmd); + sim_debug(DEBUG_CMD, dptr, "scsi_startcmd enter unit=%02x cmd %02x\n", unit, cmd); /* Unit is online, so process a command */ switch (cmd) { case DSK_INCH: /* INCH 0x00 */ #ifdef DO_DYNAMIC_DEBUG - cpu_dev.dctrl |= (DEBUG_INST | DEBUG_CMD | DEBUG_EXP | DEBUG_IRQ | DEBUG_XIO); +// cpu_dev.dctrl |= (DEBUG_INST | DEBUG_CMD | DEBUG_EXP | DEBUG_IRQ | DEBUG_XIO); #endif sim_debug(DEBUG_CMD, dptr, "scsi_startcmd starting INCH %06x cmd, chsa %04x MemBuf %08x cnt %04x\n", uptr->u4, chsa, chp->ccw_addr, chp->ccw_count); uptr->CMD |= DSK_INCH2; /* use 0xF0 for inch, just need int */ -// sim_activate(uptr, 20); /* start things off */ + /* leave the TCMD bit */ + uptr->SNS &= ~MASK24; /* clear all but old mode data */ sim_activate(uptr, 100); /* start things off */ return 0; break; - case DSK_RCAP: /* Read Capacity 0x53 */ - uptr->CMD |= cmd; /* save cmd */ - sim_debug(DEBUG_CMD, dptr, - "scsi_startcmd starting disk RCAP cmd %02x chsa %04x\n", cmd, chsa); -// sim_activate(uptr, 200); /* start things off */ - sim_activate(uptr, 100); /* start things off */ -// sim_activate(uptr, 20); /* start things off */ - return 0; - break; - case DSK_SCK: /* Seek command 0x07 */ case DSK_XEZ: /* Rezero & Read IPL record 0x1f */ case DSK_WD: /* Write command 0x01 */ case DSK_RD: /* Read command 0x02 */ case DSK_LMR: /* read mode register */ case DSK_NOP: /* NOP 0x03 */ - case DSK_SNS: /* Sense 0x04 */ -// case DSK_RCAP: /* Read Capacity 0x53 */ + case DSK_RCAP: /* Read Capacity 0x53 */ /* Transfer Command Packet (specifies CDB to send) */ case DSK_TCMD: /* Transfer command packet 0xD3 */ case DSK_SID: /* channel Sense 0x80 */ + /* leave the TCMD bit */ + uptr->SNS &= ~MASK24; /* clear all but old mode data */ + case DSK_SNS: /* Sense 0x04 */ uptr->CMD |= cmd; /* save cmd */ sim_debug(DEBUG_CMD, dptr, "scsi_startcmd starting disk seek r/w cmd %02x chsa %04x\n", cmd, chsa); @@ -644,7 +637,9 @@ t_stat scsi_srv(UNIT *uptr) chan_write_byte(chsa, &ch); /* bytes 4 - mode reg, byte 0 of SNS */ - ch = (uptr->SNS >> 24) & 0xff; /* return the sense data */ +// ch = (uptr->SNS >> 24) & 0xff; /* return the sense data */ + /* skip the TCMD bit */ + ch = (uptr->SNS >> 24) & 0xfe; /* return the sense data */ sim_debug(DEBUG_DETAIL, dptr, "scsi_srv sense unit=%02x 1 %02x\n", unit, ch); chan_write_byte(chsa, &ch); @@ -820,12 +815,16 @@ t_stat scsi_srv(UNIT *uptr) sim_debug(DEBUG_CMD, dptr, "Load Mode Reg unit=%02x old %x new %x\n", unit, (uptr->SNS)&0xff, buf[0]); uptr->CMD &= LMASK; /* remove old cmd */ - uptr->SNS &= MASK24; /* clear old mode data */ - uptr->SNS |= (buf[0] << 24); /* save mode value */ +// uptr->SNS &= MASK24; /* clear old mode data */ + /* leave the TCMD bit */ + uptr->SNS &= (MASK24 | SNS_TCMD); /* clear old mode data */ +// uptr->SNS |= (buf[0] << 24); /* save mode value */ + /* do not change TCMD bit */ + uptr->SNS |= ((buf[0]&0xfe) << 24); /* save mode value */ chan_end(chsa, SNS_CHNEND|SNS_DEVEND); break; - case DSK_RD: /* Read Data */ + case DSK_RD: /* 0x02 Read Data */ if (uptr->SNS & SNS_TCMD) { /* we need to process a read TCMD data */ int cnt = scsi_buf[bufnum][unit][4]; /* byte count of status to send */ @@ -833,9 +832,11 @@ t_stat scsi_srv(UNIT *uptr) uint32 spt = SPT(type); /* sectors per track */ uint32 ssb = SSB(type); /* sector size in bytes */ int bcnt; + /* cnt has # bytes to return (0xf0) */ uint8 pagecode = scsi_buf[bufnum][unit][2] & 0x3f; /* get page code */ uint8 pagecont = (scsi_buf[bufnum][unit][2] & 0xc0) >> 6; /* get page control */ + ch = scsi_buf[bufnum][unit][0]; /* return TCMD cmd */ uptr->SNS &= ~SNS_TCMD; /* show not presessing TCMD cmd chain */ sim_debug(DEBUG_CMD, dptr, @@ -954,6 +955,22 @@ t_stat scsi_srv(UNIT *uptr) buf[9] = (uint8)HDS(type); /* # of heads */ goto merge; /* go output data and return */ } + + case 0x12: /* inquiry */ + /* size is 0x24 = 36 bytes */ + /* ssize has sector size in bytes */ + for (i=0; iCMD &= LMASK; /* remove old status bits & cmd */ uptr->SNS |= SNS_CMDREJ|SNS_EQUCHK; chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); + return SCPE_OK; break; } } @@ -1221,6 +1239,7 @@ read_cap: /* merge point from TCMD process uptr->CMD &= LMASK; /* remove old status bits & cmd */ uptr->SNS |= SNS_CMDREJ|SNS_EQUCHK; chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); + return SCPE_OK; break; } } @@ -1231,7 +1250,7 @@ read_cap: /* merge point from TCMD process "scsi_srv cmd RCAP chsa %04x capacity %06x secsize %03x completed\n", chsa, cap, ssize); chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */ - return SCPE_OK; +// return SCPE_OK; break; /* Transfer Command Packet (specifies CDB to send) */ @@ -1269,6 +1288,7 @@ read_cap: /* merge point from TCMD process uptr->CMD &= LMASK; /* remove old status bits & cmd */ uptr->SNS |= SNS_CMDREJ|SNS_EQUCHK; chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK); + return SCPE_OK; break; } } @@ -1320,7 +1340,7 @@ void scsi_ini(UNIT *uptr, t_bool f) uptr->CHS = 0; /* set CHS to cyl/hd/sec = 0 */ uptr->STAR = 0; /* set STAR to cyl/hd/sec = 0 */ uptr->CMD &= LMASK; /* remove old status bits & cmd */ - uptr->SNS = ((uptr->SNS & MASK24) | (scsi_type[i].type << 24)); /* save mode value */ + uptr->SNS = 0; /* clear any status */ /* total sectors on disk */ uptr->capac = CAP(i); /* disk size in sectors */ @@ -1565,6 +1585,7 @@ t_stat scsi_attach(UNIT *uptr, CONST char *file) { uint32 ssize; /* sector size in bytes */ uint8 buff[1024]; + uptr->SNS = 0; /* clear any status */ if (scsi_type[type].name == 0) { /* does the assigned disk have a name */ detach_unit(uptr); /* no, reject */ return SCPE_FMT; /* error */ @@ -1577,7 +1598,10 @@ t_stat scsi_attach(UNIT *uptr, CONST char *file) { uptr->capac = CAP(type); /* disk capacity in sectors */ ssize = SSB(type); /* get sector size in bytes */ - sim_debug(DEBUG_CMD, dptr, "Disk %s %04x cyl %d hds %d sec %d ssiz %d capacity %d\n", + sim_debug(DEBUG_CMD, dptr, "SCSI Disk %s %04x cyl %d hds %d sec %d ssiz %d capacity %d\n", + scsi_type[type].name, chsa, scsi_type[type].cyl, scsi_type[type].nhds, + scsi_type[type].spt, ssize, uptr->capac); /* disk capacity */ + printf("SCSI Disk %s %04x cyl %d hds %d sec %d ssiz %d capacity %d\r\n", scsi_type[type].name, chsa, scsi_type[type].cyl, scsi_type[type].nhds, scsi_type[type].spt, ssize, uptr->capac); /* disk capacity */ @@ -1617,8 +1641,14 @@ fmt: scsi_type[type].name, chsa, CYL(type), HDS(type), SPT(type), SPC(type), CAP(type), CAPB(type)); + printf("Attach %s %04x cyl %d hds %d spt %d spc %d cap sec %d cap bytes %d\r\n", + scsi_type[type].name, chsa, CYL(type), HDS(type), SPT(type), SPC(type), + CAP(type), CAPB(type)); + sim_debug(DEBUG_CMD, dptr, "File %s at chsa %04x attached to %s\n", file, chsa, scsi_type[type].name); + printf("File %s at chsa %04x attached to %s\r\n", + file, chsa, scsi_type[type].name); /* check for valid configured disk */ /* must have valid DIB and Channel Program pointer */