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https://github.com/rcornwell/sims.git
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ICL1900: Fixes to pass FLIT diags.
This commit is contained in:
Richard Cornwell
parent
a809a48b56
commit
7923fdedf2
@ -116,6 +116,7 @@ uint8 fovr; /* Floating point overflow */
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uint8 BCarry; /* Carry bit */
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uint8 BV; /* Overflow flag */
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uint8 Mode; /* Mode */
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uint8 Zero; /* Zero suppression flag */
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uint8 exe_mode = 1; /* Executive mode */
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#define EJM 040 /* Extended jump Mode */
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#define DATUM 020 /* Datum mode */
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@ -203,13 +204,13 @@ MTAB cpu_mod[] = {
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(1), NULL, "8K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(3), NULL, "16K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(7), NULL, "32K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(8), NULL, "48K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(9), NULL, "64K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(10), NULL, "96K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(11), NULL, "128K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(12), NULL, "256K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(13), NULL, "512K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(14), NULL, "1024K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(11), NULL, "48K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(15), NULL, "64K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(23), NULL, "96K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(31), NULL, "128K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(63), NULL, "256K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(127), NULL, "512K", &cpu_set_size},
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{UNIT_MSIZE|MTAB_VDV, MEMAMOUNT(254), NULL, "1024K", &cpu_set_size},
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/* Stevenage */
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{UNIT_MODEL, MODEL(MOD1), "1901", "1901", NULL, NULL, NULL},
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{UNIT_MODEL, MODEL(MOD1A), "1901A", "1901A", NULL, NULL, NULL},
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@ -261,6 +262,29 @@ DEVICE cpu_dev = {
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/* Test if we can access a word */
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uint8 Mem_test(uint32 addr) {
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addr &= M22;
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if (!exe_mode) {
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if (addr < 8)
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return 0;
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addr = addr + RD;
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} else if (addr < 8)
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return 0;
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if (!exe_mode && RL && (addr < RD || addr >= RL)) {
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SR64 |= B1;
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return 1;
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}
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addr &= adrmask;
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if (addr > MEMSIZE) {
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SR64 |= B1;
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return 1;
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}
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return 0;
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}
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uint8 Mem_read(uint32 addr, uint32 *data, uint8 flag) {
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addr &= M22;
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@ -353,30 +377,33 @@ intr:
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Mem_write(RD+13, &facch, 0); /* Save F.P.U. */
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Mem_write(RD+12, &faccl, 0);
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RA = 0; /* Build ZSTAT */
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if (Mode & 1)
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if (Zero)
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RA |= B3;
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if (OPIP | PIP)
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RA |= B2;
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Mem_write(RD+9, &RA, 0);
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RA = RC;
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RA = RC & adrmask;
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if (BV)
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RA |= B0;
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if (BCarry)
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RA |= B1;
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#if 0
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if ((Mode & AM22) == 0 && (Mode & 1))
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if ((Mode & AM22) == 0 && Zero)
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RA |= B8;
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#endif
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Mem_write(RD+8, &RA, 0);
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for (n = 0; n < 8; n++)
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Mem_write(RD+n, &XR[n], 0);
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BV = BCarry = Mode = 0;
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BV = BCarry = Mode = Zero = 0;
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adrmask = (Mode & AM22) ? M22 : M15;
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RC = 020;
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PIP = 0;
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}
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fetch:
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if (!exe_mode && (Mode & 7) == 1)
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SR64 |= B2;
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if (Mem_read(RC, &temp, 0)) {
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if (hst_lnt) { /* history enabled? */
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hst_p = (hst_p + 1); /* next entry */
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@ -397,7 +424,6 @@ fetch:
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RC = (RC + 1) & adrmask;
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goto intr;
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}
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obey:
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RM = temp & 037777;
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RF = 0177 & (temp >> 14);
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@ -407,7 +433,7 @@ obey:
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RA = XR[RX];
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RM = RB = temp & 077777;
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if ((Mode & EJM) && (RF & 1) == 0) {
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RB |= (RB & 020000) ? 017740000 : 0; /* Sign extend RB */
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RB = RB | ((RB & 020000) ? 017740000 : 0); /* Sign extend RB */
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//fprintf(stderr, "Rel B: %08o PC=%08o -> ", RB, RC);
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RB = (RB + RC) & adrmask;
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//fprintf(stderr, " %08o\n\r", RC);
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@ -521,8 +547,11 @@ obey:
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} else {
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int t2 = (RB & B0) != 0;
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int tr = (RA & B0) != 0;
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if ((n && t2 && !tr) || (!n && !t2 && tr))
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if ((n && t2 && !tr) || (!n && !t2 && tr)) {
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BV = 1;
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if (!exe_mode && (Mode & 7) == 4)
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SR64 |= B2;
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}
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BCarry = 0;
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}
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RA &= FMASK;
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@ -660,8 +689,11 @@ obey:
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case OP_MPR: /* Multiply and Round */
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case OP_MPA: /* Multiply and Accumulate */
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if (RA == B0 && RB == B0) {
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if (RF != OP_MPA || (XR[(RX + 1) & 7] & B0) == 0)
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if (RF != OP_MPA || (XR[(RX + 1) & 7] & B0) == 0) {
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BV = 1;
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if (!exe_mode && (Mode & 7) == 4)
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SR64 |= B2;
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}
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}
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RP = RA;
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RA = RB;
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@ -730,29 +762,32 @@ obey:
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RA++;
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RB &= M23;
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if (RF == OP_CDB) {
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/* Add in RT */
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RB += RT;
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if (RB & B0)
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RA++;
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RB &= M23;
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if (RA & ~(M23))
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BV = 1;
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RA &= M23;
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/* Add in RT */
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RB += RT;
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if (RB & B0)
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RA++;
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RB &= M23;
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if (RA & ~(M23)) {
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BV = 1;
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if (!exe_mode && (Mode & 7) == 4)
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SR64 |= B2;
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}
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RA &= M23;
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} else {
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/* Save bits over 23 to char */
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m = (m == 0) ? 3 : (XR[m] >> 22) & 3;
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m = 6 * (3 - m);
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RP = (RA >> 23) & 017;
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if ((Mode & 1) != 0 && RP == 0)
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RP = 020;
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else
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Mode &= ~1;
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RA &= M23;
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RT &= ~(077 << m);
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RT |= (RP << m);
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if (Mem_write(RS, &RT, 1)) {
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goto intr;
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}
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/* Save bits over 23 to char */
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m = (m == 0) ? 3 : (XR[m] >> 22) & 3;
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m = 6 * (3 - m);
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RP = (RA >> 23) & 017;
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if (Zero && RP == 0)
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RP = 020;
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else
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Zero = 0;
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RA &= M23;
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RT &= ~(077 << m);
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RT |= (RP << m);
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if (Mem_write(RS, &RT, 1)) {
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goto intr;
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}
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}
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XR[(RX+1) & 7] = RB;
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XR[RX] = RA;
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@ -771,6 +806,8 @@ obey:
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if (RA == 0) { /* Exit on zero divisor */ /* VI */
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BV = 1;
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if (!exe_mode && (Mode & 7) == 4)
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SR64 |= B2;
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BCarry = 0;
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break;
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}
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@ -886,8 +923,11 @@ dvd2:
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//fprintf(stderr, "DVD7: %08o %08o %08o \n\r", RA, RP, RB);
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if (n)
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BCarry = 0;
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if (BCarry)
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if (BCarry) {
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BV = 1;
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if (!exe_mode && (Mode & 7) == 4)
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SR64 |= B2;
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}
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BCarry = 0;
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if (f) {
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RB = 0;
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@ -1001,16 +1041,21 @@ dvd2:
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if (BV)
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RA |= B0;
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if ((Mode & (AM22|EJM)) == 0) {
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if (Mode & 1)
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if (Zero)
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RA |= B8;
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} else {
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if (Mode & 1)
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if (Zero)
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RA |= B1;
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}
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BV = 0;
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BCarry = 0;
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XR[RX] = RA;
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branch:
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/* Monitor mode 3 -> int */
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if (!exe_mode && (Mode & 7) == 3) {
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SR64 |= B2;
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break;
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}
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if ((Mode & EJM) != 0) {
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if ((RF & 1) != 0) {
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RB &= 037777;
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@ -1027,34 +1072,43 @@ branch:
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if (hst_lnt) { /* history enabled? */
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hst[hst_p].ea = RB;
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}
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if (Mem_read(RB, &temp, 0)) {
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if (Mem_test(RB))
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goto intr;
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/* Monitor mode 2 -> Exec Mon */
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/* Read address to store from location 262. */
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/* Store address transfer address at location, increment 262 mod 128 */
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if (!exe_mode && (Mode & 7) == 2) {
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temp = M[262];
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M[temp & adrmask] = RB;
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M[262] = (temp & ~ 0177) + ((temp + 1) & 0177);
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}
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/* Monitor mode 2 -> Exec Mon */
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/* Read address to store from location 262. */
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/* Store address transfer address at location, increment 262 mod 128 */
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RC = RB;
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/* Monitor mode 3 -> int */
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goto obey;
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break;
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case OP_EXIT: /* Exit Subroutine */
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case OP_EXIT1:
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if (RA & B0)
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BV = 1;
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Mode &= ~1;
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if (RA & B0) {
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BV = 1;
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if (!exe_mode && (Mode & 7) == 4)
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SR64 |= B2;
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}
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Zero = 0;
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if ((Mode & (AM22|EJM)) == 0) {
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if (RA & B8)
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Mode |= 1;
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Zero = 1;
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} else {
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if (RA & B1)
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Mode |= 1;
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Zero = 1;
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}
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BCarry = 0;
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RM |= (RM & 020000) ? 017740000 : 0; /* Sign extend RM */
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RM = RM | ((RM & 040000) ? 017740000 : 0); /* Sign extend RM */
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RA = RA + RM;
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if (PIP)
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RA += RP;
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if (Mem_read(RA, &temp, 0)) {
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if (OPIP)
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RA = RA + RP;
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if (hst_lnt) { /* history enabled? */
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hst[hst_p].ea = RA;
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}
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if (Mem_read(RA, &temp, 0)) { /* Verify memory location accessable */
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goto intr;
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}
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RC = RA & adrmask;
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@ -1107,6 +1161,8 @@ branch:
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case 7: /* BVC */
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n = BV;
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BV = !BV;
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if (!exe_mode && (Mode & 7) == 4 && BV)
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SR64 |= B2;
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if (n == 0)
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goto branch;
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break;
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@ -1140,8 +1196,11 @@ branch:
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}
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RA <<= 1;
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RA |= n;
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if ((m & 2) && temp != (RA & B0))
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if ((m & 2) && temp != (RA & B0)) {
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BV = 1;
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if (!exe_mode && (Mode & 7) == 4)
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SR64 |= B2;
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}
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RA &= FMASK;
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RK--;
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}
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@ -1178,8 +1237,11 @@ branch:
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RB &= M23;
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n = (RA & B0) != 0;
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temp = (RA & BM1) != 0;
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if (n != temp)
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if (n != temp) {
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BV = 1;
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if (!exe_mode && (Mode & 7) == 4)
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SR64 |= B2;
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}
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}
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RA &= FMASK;
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RB &= FMASK;
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@ -1260,6 +1322,7 @@ branch:
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case OP_NORMD: /* Normalize Double -2 +FP */
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RT = RB;
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RB = (RF & 1) ? XR[(RX+1) & 07] & M23 : 0;
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//fprintf(stderr, "Norm0: %08o %08o %08o\n\r", RA, RB, RT);
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if (RT & 04000) {
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RT = 0;
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} else {
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@ -1275,8 +1338,14 @@ branch:
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RB >>= 1;
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RA >>= 1;
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RA |= RP;
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} else if (RA != 0 || RB != 0) {
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if ((RF & 1) == 0) {
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RB = RT;
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goto norm3;
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}
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//fprintf(stderr, "Norm1: %08o %08o %08o\n\r", RA, RB, RT);
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} else if (RA != 0 || RB != 0) {
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/* Shift left until sign and B1 not same */
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//fprintf(stderr, "Norm2: %08o %08o %08o\n\r", RA, RB, RT);
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while ((((RA >> 1) ^ RA) & B1) == 0) {
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RT--;
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RA <<= 1;
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@ -1286,26 +1355,39 @@ branch:
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RA &= FMASK;
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RB &= M23;
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}
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//fprintf(stderr, "Norm3: %08o %08o %08o\n\r", RA, RB, RT);
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/* Check for overflow */
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if (RT & B0) { /* < 0 */
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RA = RB = 0;
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goto norm1;
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}
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if (RT > M9) /* NO Round if overflow */
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goto norm2;
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} else
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RT = 0;
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/* Round RB if needed */
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RP = RB;
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RB += 0400;
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if (RB & B0) {
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RB = RP;
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if (((RA & M23) + 1) & B0)
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RA = RB = 0;
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if (RF & 1) { /* Round only on NORMD order codes */
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//fprintf(stderr, "Norm4: %08o %08o %08o\n\r", RA, RB, RT);
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/* Round RB if needed */
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RP = RB;
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RB += 0400;
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//fprintf(stderr, "Norm4a: %08o %08o %08o\n\r", RA, RB, RT);
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if (RB & B0 && RT <= M9) {
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RB = RP;
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if (((RA & M23) + 1) & B0)
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RA = RB = 0;
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}
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}
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RB = (RB & MMASK) | (RT & M9);
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norm2:
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RB = (RB & (MMASK|B0)) | (RT & M9);
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norm3:
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BV = 0;
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if (RT > M9) /* Exponent overlfow */
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if (RT > M9) { /* Exponent overlfow */
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BV = 1;
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norm1:
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if (!exe_mode && (Mode & 7) == 4)
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SR64 |= B2;
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}
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norm1:
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//fprintf(stderr, "Norm5: %08o %08o %08o\n\r", RA, RB, RT);
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XR[(RX+1) & 07] = RB;
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XR[RX] = RA;
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break;
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@ -1355,6 +1437,8 @@ branch:
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break;
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case OP_NULL: /* No Operation */
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if (!exe_mode && RX == 7 && (Mode & 7) > 0 && (Mode & 7) < 5)
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SR64 |= B2;
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break;
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case OP_LDCT: /* Load Count */
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@ -1375,9 +1459,8 @@ branch:
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/* On Stevenage Machines 0100 -> Carry */
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#endif
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if (exe_mode)
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Mode = RB & 077;
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else
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Mode = (Mode & 076) | (RB & 1);
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Mode = RB & 076;
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Zero = RB & 1;
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adrmask = (Mode & AM22) ? M22 : M15;
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break;
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@ -1457,8 +1540,11 @@ branch:
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RB = RA = 0;
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e1 = 0;
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}
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if (e1 != 0 || fovr)
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if (e1 != 0 || fovr) {
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BV = 1;
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if (!exe_mode && (Mode & 7) == 4)
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SR64 |= B2;
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}
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//fprintf(stderr, "FIX1: %08o %08o %08o %o %d\n\r", RA, RB, RC, RX, e1);
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if (Mem_write(RS, &RA, 1)) {
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goto intr;
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@ -1593,7 +1679,6 @@ fn:
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faccl ++;
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facch &= M23;
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faccl &= FMASK;
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// temp2 = (faccl & B0) != 0;
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/* renormalize if things changed */
|
||||
if ((RX & 2) == 0 && (((faccl >> 1) ^ faccl) & B1) == 0) {
|
||||
e1--;
|
||||
@ -1648,7 +1733,7 @@ fexp:
|
||||
RA = RT;
|
||||
//fprintf(stderr, "FMP1: %08o %08o %08o %08o %08o\n\r", RA, RB, RC, faccl, facch);
|
||||
}
|
||||
/* Extract exponents and mantissa's */
|
||||
/* Extract exponents and mantissa's */
|
||||
e1 = ((facch & M9)) - 256;
|
||||
facch &= MMASK;
|
||||
e2 = ((RB & M9)) - 256;
|
||||
@ -1911,6 +1996,8 @@ fexp:
|
||||
if (fovr) {
|
||||
RA |= B0;
|
||||
BV = 1;
|
||||
if (!exe_mode && (Mode & 7) == 4)
|
||||
SR64 |= B2;
|
||||
}
|
||||
RB++;
|
||||
if (Mem_write(RB, &RA, 1)) {
|
||||
@ -1974,10 +2061,9 @@ fexp:
|
||||
Mem_read(RB+1, &RA, 0); /* Read Limit */
|
||||
RL = RA & (M22 & ~077);
|
||||
RG |= (RA & 07);
|
||||
Mode &= ~(EJM|AM22|EXTRC);
|
||||
Mode |= (EJM|AM22|EXTRC) & RA;
|
||||
Mode = RA & 077;
|
||||
adrmask = (Mode & AM22) ? M22 : M15;
|
||||
fprintf(stderr, "Load limit: %08o D:=%08o %02o\n\r", RL, RD, Mode);
|
||||
//fprintf(stderr, "Load C=%08o limit: %08o D:=%08o %02o\n\r", RC, RL, RD, Mode);
|
||||
#endif
|
||||
if (RF & 1) /* Check if 172 or 173 order code */
|
||||
break;
|
||||
@ -1985,15 +2071,15 @@ fprintf(stderr, "Load limit: %08o D:=%08o %02o\n\r", RL, RD, Mode);
|
||||
for (n = 0; n < 8; n++) /* Restore user mode registers */
|
||||
Mem_read(RD+n, &XR[n], 0);
|
||||
Mem_read(RD+9, &RA, 0); /* Read ZStatus and mode */
|
||||
Mode &= ~1;
|
||||
Zero = 0;
|
||||
if ((Mode & AM22) && (RA & B3))
|
||||
Mode |= 1;
|
||||
Zero = 1;
|
||||
Mem_read(RD+8, &RC, 0); /* Restore C register */
|
||||
fprintf(stderr, "Load PC: %08o D:=%08o z=%08o\n\r", RC, RD, RA);
|
||||
//fprintf(stderr, "Load PC: %08o D:=%08o z=%08o\n\r", RC, RD, RA);
|
||||
if ((Mode & AM22) == 0 && (RA & B3))
|
||||
Mode |= 1;
|
||||
BV = (RC & B0) != 0;
|
||||
BCarry = (RC & B1) != 0;
|
||||
Zero = 1;
|
||||
BV = (RC & B0) != 0;
|
||||
BCarry = (RC & B1) != 0;
|
||||
RC &= adrmask;
|
||||
Mem_read(RD+12, &faccl, 0); /* Restore F.P.U. */
|
||||
Mem_read(RD+13, &facch, 0); /* Restore F.P.U. */
|
||||
@ -2039,7 +2125,7 @@ voluntary:
|
||||
Mem_write(RD+13, &facch, 0); /* Save F.P.U. */
|
||||
Mem_write(RD+12, &faccl, 0);
|
||||
RA = 0; /* Build ZSTAT */
|
||||
if (Mode & 1)
|
||||
if (Zero)
|
||||
RA |= B3;
|
||||
if (OPIP)
|
||||
RA |= B2;
|
||||
@ -2056,7 +2142,7 @@ voluntary:
|
||||
Mem_write(RD+8, &RA, 0);
|
||||
for (n = 0; n < 8; n++)
|
||||
Mem_write(RD+n, &XR[n], 0);
|
||||
Mode = 0;
|
||||
Zero = Mode = 0;
|
||||
BCarry = BV = 0;
|
||||
adrmask = (Mode & AM22) ? M22 : M15;
|
||||
XR[1] = RB;
|
||||
@ -2148,8 +2234,6 @@ cpu_set_size(UNIT * uptr, int32 val, CONST char *cptr, void *desc)
|
||||
|
||||
cpu_unit[0].flags &= ~UNIT_MSIZE;
|
||||
cpu_unit[0].flags |= val;
|
||||
cpu_unit[1].flags &= ~UNIT_MSIZE;
|
||||
cpu_unit[1].flags |= val;
|
||||
val >>= UNIT_V_MSIZE;
|
||||
val = (val + 1) * 4096;
|
||||
if ((val < 0) || (val > MAXMEMSIZE))
|
||||
@ -2174,8 +2258,6 @@ cpu_set_hist(UNIT * uptr, int32 val, CONST char *cptr, void *desc)
|
||||
t_stat r;
|
||||
|
||||
if (cptr == NULL) {
|
||||
for (i = 0; i < hst_lnt; i++)
|
||||
// hst[i].c = 0;
|
||||
hst_p = 0;
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user