mirror of
https://github.com/rcornwell/sims.git
synced 2026-05-01 22:07:31 +00:00
SCP: Updated to current version
This commit is contained in:
Richard Cornwell
455
sim_defs.h
455
sim_defs.h
@@ -243,8 +243,15 @@ typedef uint32 t_addr;
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#if defined (_WIN32) /* Actually, a GCC issue */
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#define LL_FMT "I64"
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#define LL_TYPE long long
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#else
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#if defined (__VAX) /* No 64 bit ints on VAX */
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#define LL_FMT "l"
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#define LL_TYPE long
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#else
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#define LL_FMT "ll"
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#define LL_TYPE long long
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#endif
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#endif
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#if defined (VMS) && (defined (__ia64) || defined (__ALPHA))
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@@ -267,10 +274,13 @@ typedef uint32 t_addr;
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#if defined(_MSC_VER)
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#define SIM_INLINE _inline
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#define SIM_NOINLINE _declspec (noinline)
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#elif defined(__GNUC__)
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#define SIM_INLINE inline
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#define SIM_NOINLINE __attribute__ ((noinline))
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#else
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#define SIM_INLINE
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#define SIM_NOINLINE
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#endif
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/* Storage class modifier for weak link definition for sim_vm_init() */
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@@ -301,8 +311,8 @@ typedef uint32 t_addr;
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/* Breakpoint spaces definitions */
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#define SIM_BKPT_N_SPC 16 /* max number spaces */
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#define SIM_BKPT_V_SPC 28 /* location in arg */
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#define SIM_BKPT_N_SPC (1 << (32 - SIM_BKPT_V_SPC)) /* max number spaces */
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#define SIM_BKPT_V_SPC (BRK_TYP_MAX + 1) /* location in arg */
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/* Extended switch definitions (bits >= 26) */
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@@ -310,6 +320,7 @@ typedef uint32 t_addr;
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#define SIM_SW_REST (1u << 27) /* attach/restore */
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#define SIM_SW_REG (1u << 28) /* register value */
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#define SIM_SW_STOP (1u << 29) /* stop message */
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#define SIM_SW_SHUT (1u << 30) /* shutdown */
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/* Simulator status codes
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@@ -366,9 +377,10 @@ typedef uint32 t_addr;
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#define SCPE_INVREM (SCPE_BASE + 43) /* invalid remote console command */
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#define SCPE_NOTATT (SCPE_BASE + 44) /* not attached */
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#define SCPE_EXPECT (SCPE_BASE + 45) /* expect matched */
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#define SCPE_REMOTE (SCPE_BASE + 46) /* remote console command */
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#define SCPE_AMBREG (SCPE_BASE + 46) /* ambiguous register */
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#define SCPE_REMOTE (SCPE_BASE + 47) /* remote console command */
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#define SCPE_MAX_ERR (SCPE_BASE + 47) /* Maximum SCPE Error Value */
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#define SCPE_MAX_ERR (SCPE_BASE + 48) /* Maximum SCPE Error Value */
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#define SCPE_KFLAG 0x1000 /* tti data flag */
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#define SCPE_BREAK 0x2000 /* tti break flag */
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#define SCPE_NOMESSAGE 0x10000000 /* message display supression flag */
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@@ -397,7 +409,7 @@ typedef uint32 t_addr;
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/* String match - at least one character required */
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#define MATCH_CMD(ptr,cmd) ((NULL == (ptr)) || (!*(ptr)) || strncmp ((ptr), (cmd), strlen (ptr)))
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#define MATCH_CMD(ptr,cmd) ((NULL == (ptr)) || (!*(ptr)) || sim_strncasecmp ((ptr), (cmd), strlen (ptr)))
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/* End of Linked List/Queue value */
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/* Chosen for 2 reasons: */
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@@ -418,11 +430,13 @@ typedef struct SHTAB SHTAB;
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typedef struct MTAB MTAB;
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typedef struct SCHTAB SCHTAB;
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typedef struct BRKTAB BRKTAB;
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typedef struct BRKTYPTAB BRKTYPTAB;
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typedef struct EXPTAB EXPTAB;
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typedef struct EXPECT EXPECT;
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typedef struct SEND SEND;
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typedef struct DEBTAB DEBTAB;
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typedef struct FILEREF FILEREF;
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typedef struct MEMFILE MEMFILE;
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typedef struct BITFIELD BITFIELD;
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typedef t_stat (*ACTIVATE_API)(UNIT *unit, int32 interval);
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@@ -465,6 +479,7 @@ struct DEVICE {
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/* attach help */
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void *help_ctx; /* Context available to help routines */
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const char *(*description)(DEVICE *dptr); /* Device Description */
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BRKTYPTAB *brk_types; /* Breakpoint types */
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};
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/* Device flags */
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@@ -538,10 +553,12 @@ struct UNIT {
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void *up7; /* device specific */
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void *up8; /* device specific */
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void *tmxr; /* TMXR linkage */
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t_bool (*cancel)(UNIT *);
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double usecs_remaining; /* time balance for long delays */
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char *uname; /* Unit name */
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#ifdef SIM_ASYNCH_IO
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void (*a_check_completion)(UNIT *);
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t_bool (*a_is_active)(UNIT *);
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void (*a_cancel)(UNIT *);
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UNIT *a_next; /* next asynch active */
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int32 a_event_time;
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ACTIVATE_API a_activate_call;
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@@ -552,9 +569,8 @@ struct UNIT {
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/* waiting for this unit */
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/* Asynchronous Timer control */
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double a_due_time; /* due time for timer event */
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double a_skew; /* accumulated skew being corrected */
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double a_last_fired_time; /* time last event fired */
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int32 a_usec_delay; /* time delay for timer event */
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double a_due_gtime; /* due time (in instructions) for timer event */
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double a_usec_delay; /* time delay for timer event */
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#endif
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};
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@@ -593,7 +609,8 @@ struct UNIT {
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#define UNIT_TM_POLL 0000002 /* TMXR Polling unit */
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#define UNIT_NO_FIO 0000004 /* fileref is NOT a FILE * */
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#define UNIT_DISK_CHK 0000010 /* disk data debug checking (sim_disk) */
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#define UNIT_V_DF_TAPE 4 /* Bit offset for Tape Density reservation */
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#define UNIT_TMR_UNIT 0000020 /* Unit registered as a calibrated timer */
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#define UNIT_V_DF_TAPE 5 /* Bit offset for Tape Density reservation */
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#define UNIT_S_DF_TAPE 3 /* Bits Reserved for Tape Density */
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struct BITFIELD {
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@@ -713,13 +730,26 @@ struct SCHTAB {
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struct BRKTAB {
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t_addr addr; /* address */
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uint32 typ; /* mask of types */
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#define BRK_TYP_USR_TYPES ((1 << ('Z'-'A'+1)) - 1)/* all types A-Z */
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#define BRK_TYP_DYN_STEPOVER (SWMASK ('Z'+1))
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#define BRK_TYP_DYN_USR (SWMASK ('Z'+2))
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#define BRK_TYP_DYN_ALL (BRK_TYP_DYN_USR|BRK_TYP_DYN_STEPOVER) /* Mask of All Dynamic types */
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#define BRK_TYP_TEMP (SWMASK ('Z'+3)) /* Temporary (one-shot) */
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#define BRK_TYP_MAX (('Z'-'A')+3) /* Maximum breakpoint type */
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int32 cnt; /* proceed count */
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char *act; /* action string */
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double time_fired[SIM_BKPT_N_SPC]; /* instruction count when match occurred */
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BRKTAB *next; /* list with same address value */
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};
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/* Breakpoint table */
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struct BRKTYPTAB {
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uint32 btyp; /* type mask */
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const char *desc; /* description */
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};
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#define BRKTYPE(typ,descrip) {SWMASK(typ), descrip}
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/* Expect rule */
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struct EXPTAB {
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@@ -786,13 +816,18 @@ struct DEBTAB {
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#define SIM_DBG_ACTIVATE 0x20000
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#define SIM_DBG_AIO_QUEUE 0x40000
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/* File Reference */
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/* Open File Reference */
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struct FILEREF {
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char name[CBUFSIZE]; /* file name */
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FILE *file; /* file handle */
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int32 refcount; /* reference count */
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};
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struct MEMFILE {
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char *buf; /* buffered data */
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size_t size; /* size */
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size_t pos; /* data used */
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};
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/*
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The following macros exist to help populate structure contents
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@@ -915,6 +950,8 @@ struct FILEREF {
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#if defined (SIM_ASYNCH_IO)
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#include <pthread.h>
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#define SIM_ASYNCH_CLOCKS 1
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extern pthread_mutex_t sim_asynch_lock;
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extern pthread_cond_t sim_asynch_wake;
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extern pthread_mutex_t sim_timer_lock;
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@@ -925,8 +962,6 @@ extern pthread_cond_t sim_tmxr_poll_cond;
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extern pthread_mutex_t sim_tmxr_poll_lock;
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extern pthread_t sim_asynch_main_threadid;
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extern UNIT * volatile sim_asynch_queue;
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extern UNIT * volatile sim_wallclock_queue;
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extern UNIT * volatile sim_wallclock_entry;
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extern volatile t_bool sim_idle_wait;
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extern int32 sim_asynch_check;
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extern int32 sim_asynch_latency;
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@@ -942,198 +977,43 @@ extern int32 sim_asynch_inst_latency;
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/* It is primarily used only used in debugging messages */
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#define AIO_TLS
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#endif
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#define AIO_QUEUE_CHECK(que, lock) \
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if (1) { \
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UNIT *_cptr; \
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if (lock) \
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pthread_mutex_lock (lock); \
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for (_cptr = que; \
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(_cptr != QUEUE_LIST_END); \
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_cptr = _cptr->next) \
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if (!_cptr->next) { \
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if (sim_deb) { \
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sim_debug (SIM_DBG_EVENT, sim_dflt_dev, "Queue Corruption detected\n");\
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fclose(sim_deb); \
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} \
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sim_printf("Queue Corruption detected\n"); \
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abort(); \
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} \
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if (lock) \
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pthread_mutex_unlock (lock); \
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} else (void)0
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#define AIO_QUEUE_CHECK(que, lock) \
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do { \
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UNIT *_cptr; \
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if (lock) \
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pthread_mutex_lock (lock); \
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for (_cptr = que; \
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(_cptr != QUEUE_LIST_END); \
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_cptr = _cptr->next) \
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if (!_cptr->next) { \
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if (sim_deb) { \
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sim_debug (SIM_DBG_EVENT, sim_dflt_dev, "Queue Corruption detected\n");\
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fclose(sim_deb); \
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} \
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sim_printf("Queue Corruption detected\n"); \
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abort(); \
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} \
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if (lock) \
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pthread_mutex_unlock (lock); \
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} while (0)
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#define AIO_MAIN_THREAD (pthread_equal ( pthread_self(), sim_asynch_main_threadid ))
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#define AIO_LOCK \
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pthread_mutex_lock(&sim_asynch_lock)
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#define AIO_UNLOCK \
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pthread_mutex_unlock(&sim_asynch_lock)
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#define AIO_IS_ACTIVE(uptr) (((uptr)->a_is_active ? (uptr)->a_is_active (uptr) : FALSE) || ((uptr)->a_next))
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#if !defined(SIM_ASYNCH_MUX) && !defined(SIM_ASYNCH_CLOCKS)
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#define AIO_CANCEL(uptr) \
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if ((uptr)->a_cancel) \
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(uptr)->a_cancel (uptr); \
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else \
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(void)0
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#endif /* !defined(SIM_ASYNCH_MUX) && !defined(SIM_ASYNCH_CLOCKS) */
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#if !defined(SIM_ASYNCH_MUX) && defined(SIM_ASYNCH_CLOCKS)
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#define AIO_CANCEL(uptr) \
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if ((uptr)->a_cancel) \
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(uptr)->a_cancel (uptr); \
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else { \
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AIO_UPDATE_QUEUE; \
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if ((uptr)->a_next) { \
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UNIT *cptr; \
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pthread_mutex_lock (&sim_timer_lock); \
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if ((uptr) == sim_wallclock_queue) { \
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sim_wallclock_queue = (uptr)->a_next; \
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(uptr)->a_next = NULL; \
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sim_debug (SIM_DBG_EVENT, sim_dflt_dev, "Canceling Timer Event for %s\n", sim_uname(uptr));\
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sim_timer_event_canceled = TRUE; \
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pthread_cond_signal (&sim_timer_wake); \
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} \
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else \
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for (cptr = sim_wallclock_queue; \
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(cptr != QUEUE_LIST_END); \
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cptr = cptr->a_next) \
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if (cptr->a_next == (uptr)) { \
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cptr->a_next = (uptr)->a_next; \
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(uptr)->a_next = NULL; \
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sim_debug (SIM_DBG_EVENT, sim_dflt_dev, "Canceling Timer Event for %s\n", sim_uname(uptr));\
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break; \
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} \
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if ((uptr)->a_next == NULL) \
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(uptr)->a_due_time = (uptr)->a_usec_delay = 0; \
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else { \
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int tmr; \
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for (tmr=0; tmr<SIM_NTIMERS; tmr++) { \
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if ((uptr) == sim_clock_cosched_queue[tmr]) { \
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sim_clock_cosched_queue[tmr] = (uptr)->a_next; \
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(uptr)->a_next = NULL; \
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} \
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else \
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for (cptr = sim_clock_cosched_queue[tmr]; \
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(cptr != QUEUE_LIST_END); \
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cptr = cptr->a_next) \
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if (cptr->a_next == (uptr)) { \
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cptr->a_next = (uptr)->a_next; \
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(uptr)->a_next = NULL; \
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break; \
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} \
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if ((uptr)->a_next == NULL) { \
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sim_debug (SIM_DBG_EVENT, sim_dflt_dev, "Canceling Clock Coscheduling Event for %s\n", sim_uname(uptr));\
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} \
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} \
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} \
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while (sim_timer_event_canceled) { \
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pthread_mutex_unlock (&sim_timer_lock); \
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sim_debug (SIM_DBG_EVENT, sim_dflt_dev, "Waiting for Timer Event cancelation for %s\n", sim_uname(uptr));\
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sim_os_ms_sleep (0); \
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pthread_mutex_lock (&sim_timer_lock); \
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} \
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pthread_mutex_unlock (&sim_timer_lock); \
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} \
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#if defined(SIM_ASYNCH_MUX)
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#define AIO_CANCEL(uptr) \
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if (((uptr)->dynflags & UNIT_TM_POLL) && \
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!((uptr)->next) && !((uptr)->a_next)) { \
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(uptr)->a_polling_now = FALSE; \
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sim_tmxr_poll_count -= (uptr)->a_poll_waiter_count; \
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(uptr)->a_poll_waiter_count = 0; \
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}
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#endif
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#if defined(SIM_ASYNCH_MUX) && !defined(SIM_ASYNCH_CLOCKS)
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#define AIO_CANCEL(uptr) \
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if ((uptr)->a_cancel) \
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(uptr)->a_cancel (uptr); \
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else { \
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if (((uptr)->dynflags & UNIT_TM_POLL) && \
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!((uptr)->next) && !((uptr)->a_next)) { \
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(uptr)->a_polling_now = FALSE; \
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sim_tmxr_poll_count -= (uptr)->a_poll_waiter_count; \
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(uptr)->a_poll_waiter_count = 0; \
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} \
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}
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#endif /* defined(SIM_ASYNCH_MUX) && !defined(SIM_ASYNCH_CLOCKS) */
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#if defined(SIM_ASYNCH_MUX) && defined(SIM_ASYNCH_CLOCKS)
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#define AIO_CANCEL(uptr) \
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if ((uptr)->a_cancel) \
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(uptr)->a_cancel (uptr); \
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else { \
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AIO_UPDATE_QUEUE; \
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if (((uptr)->dynflags & UNIT_TM_POLL) && \
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!((uptr)->next) && !((uptr)->a_next)) { \
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(uptr)->a_polling_now = FALSE; \
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sim_tmxr_poll_count -= (uptr)->a_poll_waiter_count; \
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(uptr)->a_poll_waiter_count = 0; \
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} \
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if ((uptr)->a_next) { \
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UNIT *cptr; \
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pthread_mutex_lock (&sim_timer_lock); \
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if ((uptr) == sim_wallclock_queue) { \
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sim_wallclock_queue = (uptr)->a_next; \
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(uptr)->a_next = NULL; \
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sim_debug (SIM_DBG_EVENT, sim_dflt_dev, "Canceling Timer Event for %s\n", sim_uname(uptr));\
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sim_timer_event_canceled = TRUE; \
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pthread_cond_signal (&sim_timer_wake); \
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} \
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else \
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for (cptr = sim_wallclock_queue; \
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(cptr != QUEUE_LIST_END); \
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cptr = cptr->a_next) \
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if (cptr->a_next == (uptr)) { \
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cptr->a_next = (uptr)->a_next; \
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(uptr)->a_next = NULL; \
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sim_debug (SIM_DBG_EVENT, sim_dflt_dev, "Canceling Timer Event for %s\n", sim_uname(uptr));\
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break; \
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} \
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if ((uptr)->a_next == NULL) \
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(uptr)->a_due_time = (uptr)->a_usec_delay = 0; \
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else { \
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if ((uptr) == sim_clock_cosched_queue) { \
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sim_clock_cosched_queue = (uptr)->a_next; \
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(uptr)->a_next = NULL; \
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} \
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else \
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for (cptr = sim_clock_cosched_queue; \
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(cptr != QUEUE_LIST_END); \
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cptr = cptr->a_next) \
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if (cptr->a_next == (uptr)) { \
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cptr->a_next = (uptr)->a_next; \
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(uptr)->a_next = NULL; \
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break; \
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} \
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if ((uptr)->a_next == NULL) { \
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sim_debug (SIM_DBG_EVENT, sim_dflt_dev, "Canceling Clock Coscheduling Event for %s\n", sim_uname(uptr));\
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} \
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} \
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while (sim_timer_event_canceled) { \
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pthread_mutex_unlock (&sim_timer_lock); \
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sim_debug (SIM_DBG_EVENT, sim_dflt_dev, "Waiting for Timer Event cancelation for %s\n", sim_uname(uptr));\
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sim_os_ms_sleep (0); \
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pthread_mutex_lock (&sim_timer_lock); \
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} \
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pthread_mutex_unlock (&sim_timer_lock); \
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} \
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}
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#endif
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#if defined(SIM_ASYNCH_CLOCKS)
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#define AIO_RETURN_TIME(uptr) \
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if (1) { \
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pthread_mutex_lock (&sim_timer_lock); \
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for (cptr = sim_wallclock_queue; \
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cptr != QUEUE_LIST_END; \
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cptr = cptr->a_next) \
|
||||
if ((uptr) == cptr) { \
|
||||
double inst_per_sec = sim_timer_inst_per_sec (); \
|
||||
int32 result; \
|
||||
\
|
||||
result = (int32)(((uptr)->a_due_time - sim_timenow_double())*inst_per_sec);\
|
||||
if (result < 0) \
|
||||
result = 0; \
|
||||
pthread_mutex_unlock (&sim_timer_lock); \
|
||||
return result + 1; \
|
||||
} \
|
||||
pthread_mutex_unlock (&sim_timer_lock); \
|
||||
if ((uptr)->a_next) /* On asynch queue? */ \
|
||||
return (uptr)->a_event_time + 1; \
|
||||
} \
|
||||
else \
|
||||
(void)0
|
||||
#else
|
||||
#define AIO_RETURN_TIME(uptr) (void)0
|
||||
#endif
|
||||
#endif /* defined(SIM_ASYNCH_MUX) */
|
||||
#if !defined(AIO_CANCEL)
|
||||
#define AIO_CANCEL(uptr)
|
||||
#endif /* !defined(AIO_CANCEL) */
|
||||
#define AIO_EVENT_BEGIN(uptr) \
|
||||
do { \
|
||||
int __was_poll = uptr->dynflags & UNIT_TM_POLL
|
||||
@@ -1170,33 +1050,27 @@ extern int32 sim_asynch_inst_latency;
|
||||
/* This approach uses intrinsics to manage access to the link list head */
|
||||
/* sim_asynch_queue. This implementation is a completely lock free design */
|
||||
/* which avoids the potential ABA issues. */
|
||||
#define AIO_QUEUE_MODE "Lock free asynchronous event queue access"
|
||||
#define AIO_QUEUE_MODE "Lock free asynchronous event queue"
|
||||
#define AIO_INIT \
|
||||
if (1) { \
|
||||
do { \
|
||||
int tmr; \
|
||||
sim_asynch_main_threadid = pthread_self(); \
|
||||
/* Empty list/list end uses the point value (void *)1. \
|
||||
This allows NULL in an entry's a_next pointer to \
|
||||
indicate that the entry is not currently in any list */ \
|
||||
sim_asynch_queue = QUEUE_LIST_END; \
|
||||
sim_wallclock_queue = QUEUE_LIST_END; \
|
||||
sim_wallclock_entry = NULL; \
|
||||
for (tmr=0; tmr<SIM_NTIMERS; tmr++) \
|
||||
sim_clock_cosched_queue[tmr] = QUEUE_LIST_END; \
|
||||
} \
|
||||
else \
|
||||
(void)0
|
||||
} while (0)
|
||||
#define AIO_CLEANUP \
|
||||
if (1) { \
|
||||
do { \
|
||||
pthread_mutex_destroy(&sim_asynch_lock); \
|
||||
pthread_cond_destroy(&sim_asynch_wake); \
|
||||
pthread_mutex_destroy(&sim_timer_lock); \
|
||||
pthread_cond_destroy(&sim_timer_wake); \
|
||||
pthread_mutex_destroy(&sim_tmxr_poll_lock); \
|
||||
pthread_cond_destroy(&sim_tmxr_poll_cond); \
|
||||
} \
|
||||
else \
|
||||
(void)0
|
||||
} while (0)
|
||||
#ifdef _WIN32
|
||||
#elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) || defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
|
||||
#define InterlockedCompareExchangePointer(Destination, Exchange, Comparand) __sync_val_compare_and_swap(Destination, Comparand, Exchange)
|
||||
@@ -1205,100 +1079,23 @@ extern int32 sim_asynch_inst_latency;
|
||||
#else
|
||||
#error "Implementation of function InterlockedCompareExchangePointer() is needed to build with USE_AIO_INTRINSICS"
|
||||
#endif
|
||||
#define AIO_ILOCK AIO_LOCK
|
||||
#define AIO_IUNLOCK AIO_UNLOCK
|
||||
#define AIO_QUEUE_VAL (UNIT *)(InterlockedCompareExchangePointer((void * volatile *)&sim_asynch_queue, (void *)sim_asynch_queue, NULL))
|
||||
#define AIO_QUEUE_SET(val, queue) (UNIT *)(InterlockedCompareExchangePointer((void * volatile *)&sim_asynch_queue, (void *)val, queue))
|
||||
#define AIO_UPDATE_QUEUE \
|
||||
if (AIO_QUEUE_VAL != QUEUE_LIST_END) { /* List !Empty */ \
|
||||
UNIT *q, *uptr; \
|
||||
int32 a_event_time; \
|
||||
do \
|
||||
q = AIO_QUEUE_VAL; \
|
||||
while (q != AIO_QUEUE_SET(QUEUE_LIST_END, q)); \
|
||||
while (q != QUEUE_LIST_END) { /* List !Empty */ \
|
||||
sim_debug (SIM_DBG_AIO_QUEUE, sim_dflt_dev, "Migrating Asynch event for %s after %d instructions\n", sim_uname(q), q->a_event_time);\
|
||||
uptr = q; \
|
||||
q = q->a_next; \
|
||||
uptr->a_next = NULL; /* hygiene */ \
|
||||
if (uptr->a_activate_call != &sim_activate_notbefore) { \
|
||||
a_event_time = uptr->a_event_time-((sim_asynch_inst_latency+1)/2); \
|
||||
if (a_event_time < 0) \
|
||||
a_event_time = 0; \
|
||||
} \
|
||||
else \
|
||||
a_event_time = uptr->a_event_time; \
|
||||
uptr->a_activate_call (uptr, a_event_time); \
|
||||
if (uptr->a_check_completion) { \
|
||||
sim_debug (SIM_DBG_AIO_QUEUE, sim_dflt_dev, "Calling Completion Check for asynch event on %s\n", sim_uname(uptr));\
|
||||
uptr->a_check_completion (uptr); \
|
||||
} \
|
||||
} \
|
||||
} else (void)0
|
||||
#define AIO_QUEUE_SET(newval, oldval) (UNIT *)(InterlockedCompareExchangePointer((void * volatile *)&sim_asynch_queue, (void *)newval, oldval))
|
||||
#define AIO_UPDATE_QUEUE sim_aio_update_queue ()
|
||||
#define AIO_ACTIVATE(caller, uptr, event_time) \
|
||||
if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) { \
|
||||
UNIT *ouptr = (uptr); \
|
||||
sim_debug (SIM_DBG_AIO_QUEUE, sim_dflt_dev, "Queueing Asynch event for %s after %d instructions\n", sim_uname(ouptr), event_time);\
|
||||
if (ouptr->a_next) { \
|
||||
ouptr->a_activate_call = sim_activate_abs; \
|
||||
} else { \
|
||||
UNIT *q, *qe; \
|
||||
ouptr->a_event_time = event_time; \
|
||||
ouptr->a_activate_call = (ACTIVATE_API)&caller; \
|
||||
ouptr->a_next = QUEUE_LIST_END; /* Mark as on list */ \
|
||||
do { \
|
||||
do \
|
||||
q = AIO_QUEUE_VAL; \
|
||||
while (q != AIO_QUEUE_SET(QUEUE_LIST_END, q));/* Grab current list */\
|
||||
for (qe = ouptr; qe->a_next != QUEUE_LIST_END; qe = qe->a_next); \
|
||||
qe->a_next = q; /* append current list */\
|
||||
do \
|
||||
q = AIO_QUEUE_VAL; \
|
||||
while (q != AIO_QUEUE_SET(ouptr, q)); \
|
||||
ouptr = q; \
|
||||
} while (ouptr != QUEUE_LIST_END); \
|
||||
} \
|
||||
sim_asynch_check = 0; /* try to force check */ \
|
||||
if (sim_idle_wait) { \
|
||||
sim_debug (TIMER_DBG_IDLE, &sim_timer_dev, "waking due to event on %s after %d instructions\n", sim_uname(ouptr), event_time);\
|
||||
pthread_cond_signal (&sim_asynch_wake); \
|
||||
} \
|
||||
sim_aio_activate ((ACTIVATE_API)caller, uptr, event_time); \
|
||||
return SCPE_OK; \
|
||||
} else (void)0
|
||||
#define AIO_ACTIVATE_LIST(caller, list, event_time) \
|
||||
if (list) { \
|
||||
UNIT *ouptr, *q, *qe; \
|
||||
sim_debug (SIM_DBG_AIO_QUEUE, sim_dflt_dev, "Queueing Asynch events for %s after %d instructions\n", sim_uname(list), event_time);\
|
||||
for (qe=(list); qe->a_next != QUEUE_LIST_END;) { \
|
||||
qe->a_event_time = event_time; \
|
||||
qe->a_activate_call = (ACTIVATE_API)&caller; \
|
||||
qe = qe->a_next; \
|
||||
} \
|
||||
qe->a_event_time = event_time; \
|
||||
qe->a_activate_call = (ACTIVATE_API)&caller; \
|
||||
ouptr = (list); \
|
||||
do { \
|
||||
do \
|
||||
q = AIO_QUEUE_VAL; \
|
||||
while (q != AIO_QUEUE_SET(QUEUE_LIST_END, q));/* Grab current list */ \
|
||||
for (qe = ouptr; qe->a_next != QUEUE_LIST_END; qe = qe->a_next); \
|
||||
qe->a_next = q; /* append current list */ \
|
||||
do \
|
||||
q = AIO_QUEUE_VAL; \
|
||||
while (q != AIO_QUEUE_SET(ouptr, q)); \
|
||||
ouptr = q; \
|
||||
} while (ouptr != QUEUE_LIST_END); \
|
||||
sim_asynch_check = 0; /* try to force check */ \
|
||||
if (sim_idle_wait) { \
|
||||
sim_debug (TIMER_DBG_IDLE, &sim_timer_dev, "waking due to event on %s after %d instructions\n", sim_uname(ouptr), event_time);\
|
||||
pthread_cond_signal (&sim_asynch_wake); \
|
||||
} \
|
||||
} else (void)0
|
||||
#else /* !USE_AIO_INTRINSICS */
|
||||
/* This approach uses a pthread mutex to manage access to the link list */
|
||||
/* head sim_asynch_queue. It will always work, but may be slower than the */
|
||||
/* lock free approach when using USE_AIO_INTRINSICS */
|
||||
#define AIO_QUEUE_MODE "Lock based asynchronous event queue access"
|
||||
#define AIO_QUEUE_MODE "Lock based asynchronous event queue"
|
||||
#define AIO_INIT \
|
||||
if (1) { \
|
||||
do { \
|
||||
int tmr; \
|
||||
pthread_mutexattr_t attr; \
|
||||
\
|
||||
@@ -1311,51 +1108,23 @@ extern int32 sim_asynch_inst_latency;
|
||||
This allows NULL in an entry's a_next pointer to \
|
||||
indicate that the entry is not currently in any list */ \
|
||||
sim_asynch_queue = QUEUE_LIST_END; \
|
||||
sim_wallclock_queue = QUEUE_LIST_END; \
|
||||
sim_wallclock_entry = NULL; \
|
||||
for (tmr=0; tmr<SIM_NTIMERS; tmr++) \
|
||||
sim_clock_cosched_queue[tmr] = QUEUE_LIST_END; \
|
||||
} \
|
||||
else \
|
||||
(void)0
|
||||
} while (0)
|
||||
#define AIO_CLEANUP \
|
||||
if (1) { \
|
||||
do { \
|
||||
pthread_mutex_destroy(&sim_asynch_lock); \
|
||||
pthread_cond_destroy(&sim_asynch_wake); \
|
||||
pthread_mutex_destroy(&sim_timer_lock); \
|
||||
pthread_cond_destroy(&sim_timer_wake); \
|
||||
pthread_mutex_destroy(&sim_tmxr_poll_lock); \
|
||||
pthread_cond_destroy(&sim_tmxr_poll_cond); \
|
||||
} \
|
||||
else \
|
||||
(void)0
|
||||
#define AIO_UPDATE_QUEUE \
|
||||
if (1) { \
|
||||
UNIT *uptr; \
|
||||
AIO_LOCK; \
|
||||
while (sim_asynch_queue != QUEUE_LIST_END) { /* List !Empty */ \
|
||||
int32 a_event_time; \
|
||||
uptr = sim_asynch_queue; \
|
||||
sim_debug (SIM_DBG_AIO_QUEUE, sim_dflt_dev, "Migrating Asynch event for %s after %d instructions\n", sim_uname(uptr), uptr->a_event_time);\
|
||||
sim_asynch_queue = uptr->a_next; \
|
||||
uptr->a_next = NULL; /* hygiene */ \
|
||||
if (uptr->a_activate_call != &sim_activate_notbefore) { \
|
||||
a_event_time = uptr->a_event_time-((sim_asynch_inst_latency+1)/2); \
|
||||
if (a_event_time < 0) \
|
||||
a_event_time = 0; \
|
||||
} \
|
||||
else \
|
||||
a_event_time = uptr->a_event_time; \
|
||||
AIO_UNLOCK; \
|
||||
uptr->a_activate_call (uptr, a_event_time); \
|
||||
if (uptr->a_check_completion) { \
|
||||
sim_debug (SIM_DBG_AIO_QUEUE, sim_dflt_dev, "Calling Completion Check for asynch event on %s\n", sim_uname(uptr));\
|
||||
uptr->a_check_completion (uptr); \
|
||||
} \
|
||||
AIO_LOCK; \
|
||||
} \
|
||||
AIO_UNLOCK; \
|
||||
} else (void)0
|
||||
} while (0)
|
||||
#define AIO_ILOCK AIO_LOCK
|
||||
#define AIO_IUNLOCK AIO_UNLOCK
|
||||
#define AIO_QUEUE_VAL sim_asynch_queue
|
||||
#define AIO_QUEUE_SET(newval, oldval) ((sim_asynch_queue = newval),oldval)
|
||||
#define AIO_UPDATE_QUEUE sim_aio_update_queue ()
|
||||
#define AIO_ACTIVATE(caller, uptr, event_time) \
|
||||
if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) { \
|
||||
sim_debug (SIM_DBG_AIO_QUEUE, sim_dflt_dev, "Queueing Asynch event for %s after %d instructions\n", sim_uname(uptr), event_time);\
|
||||
@@ -1376,40 +1145,19 @@ extern int32 sim_asynch_inst_latency;
|
||||
sim_asynch_check = 0; \
|
||||
return SCPE_OK; \
|
||||
} else (void)0
|
||||
#define AIO_ACTIVATE_LIST(caller, list, event_time) \
|
||||
if (list) { \
|
||||
UNIT *qe; \
|
||||
sim_debug (SIM_DBG_AIO_QUEUE, sim_dflt_dev, "Queueing Asynch events for %s after %d instructions\n", sim_uname(list), event_time);\
|
||||
for (qe=list; qe->a_next != QUEUE_LIST_END;) { \
|
||||
qe->a_event_time = event_time; \
|
||||
qe->a_activate_call = (ACTIVATE_API)&caller; \
|
||||
qe = qe->a_next; \
|
||||
} \
|
||||
qe->a_event_time = event_time; \
|
||||
qe->a_activate_call = (ACTIVATE_API)&caller; \
|
||||
AIO_LOCK; \
|
||||
qe->a_next = sim_asynch_queue; \
|
||||
sim_asynch_queue = list; \
|
||||
sim_asynch_check = 0; /* try to force check */ \
|
||||
if (sim_idle_wait) { \
|
||||
sim_debug (TIMER_DBG_IDLE, &sim_timer_dev, "waking due to event on %s after %d instructions\n", sim_uname(list), event_time);\
|
||||
pthread_cond_signal (&sim_asynch_wake); \
|
||||
} \
|
||||
AIO_UNLOCK; \
|
||||
} else (void)0
|
||||
#endif /* USE_AIO_INTRINSICS */
|
||||
#define AIO_VALIDATE if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) {sim_printf("Improper thread context for operation\n"); abort();}
|
||||
#define AIO_CHECK_EVENT \
|
||||
if (0 > --sim_asynch_check) { \
|
||||
AIO_UPDATE_QUEUE; \
|
||||
sim_asynch_check = sim_asynch_inst_latency; \
|
||||
} else (void)0
|
||||
} else (void)0
|
||||
#define AIO_SET_INTERRUPT_LATENCY(instpersec) \
|
||||
if (1) { \
|
||||
do { \
|
||||
sim_asynch_inst_latency = (int32)((((double)(instpersec))*sim_asynch_latency)/1000000000);\
|
||||
if (sim_asynch_inst_latency == 0) \
|
||||
sim_asynch_inst_latency = 1; \
|
||||
} else (void)0
|
||||
} while (0)
|
||||
#else /* !SIM_ASYNCH_IO */
|
||||
#define AIO_QUEUE_MODE "Asynchronous I/O is not available"
|
||||
#define AIO_UPDATE_QUEUE
|
||||
@@ -1421,7 +1169,6 @@ extern int32 sim_asynch_inst_latency;
|
||||
#define AIO_LOCK
|
||||
#define AIO_UNLOCK
|
||||
#define AIO_CLEANUP
|
||||
#define AIO_RETURN_TIME(uptr)
|
||||
#define AIO_EVENT_BEGIN(uptr)
|
||||
#define AIO_EVENT_COMPLETE(uptr, reason)
|
||||
#define AIO_IS_ACTIVE(uptr) FALSE
|
||||
|
||||
Reference in New Issue
Block a user