From 9d38b8198b1ab0c641cb5f8482b4cf01a1afbb24 Mon Sep 17 00:00:00 2001
From: Richard Cornwell <rich@sky-visions.com>
Date: Sat, 14 Jan 2023 21:31:34 -0500
Subject: [PATCH] KA10: Fixed timer support on KL.

---
 PDP10/kx10_cpu.c  | 23 ++++++++++-------------
 PDP10/kx10_defs.h | 12 ++++++++++++
 2 files changed, 22 insertions(+), 13 deletions(-)

diff --git a/PDP10/kx10_cpu.c b/PDP10/kx10_cpu.c
index 7c56976..56f8e70 100644
--- a/PDP10/kx10_cpu.c
+++ b/PDP10/kx10_cpu.c
@@ -144,11 +144,6 @@ int     nxm_flag;                             /* Non-existant memory flag */
 #if KA | KI
 int     adr_flag;                             /* Address break flag */
 int     adr_cond;                             /* Address condition swiches */
-#define ADR_IFETCH  020
-#define ADR_DFETCH  010
-#define ADR_WRITE   004
-#define ADR_STOP    002
-#define ADR_BREAK   001
 #endif
 int     clk_flg;                              /* Clock flag */
 int     ov_irq;                               /* Trap overflow */
@@ -1392,7 +1387,9 @@ t_stat dev_tim(uint32 dev, uint64 *data) {
        else
            tim_val = (tim_val & 0070000) + 010000 - (int)us;
     }
+    /* Interval counter */
     clr_interrupt(4 << 2);
+    sim_cancel(uptr);
     switch(dev & 03) {
     case CONI:
         /* Interval counter */
@@ -1401,11 +1398,9 @@ t_stat dev_tim(uint32 dev, uint64 *data) {
         res |= ((uint64)(tim_val & 07777)) << 18;
         *data = res;
         sim_debug(DEBUG_CONI, &cpu_dev, "CONI TIM %012llo\n", *data);
-        return SCPE_OK;
+        break;
 
      case CONO:
-        /* Interval counter */
-        sim_cancel(uptr);
         tim_val &= 037777;   /* Clear run bit */
         tim_per = *data & 07777;
         if (*data & 020000)  /* Clear overflow and done */
@@ -1418,10 +1413,10 @@ t_stat dev_tim(uint32 dev, uint64 *data) {
         break;
 
     case DATAO:
-        return SCPE_OK;
+        break;
 
     case DATAI:
-        return SCPE_OK;
+        break;
     }
     /* If timer is on, figure out when it will go off */
     if (tim_val & 040000) {
@@ -4214,6 +4209,7 @@ int page_lookup(t_addr addr, int flag, t_addr *loc, int wr, int cur_context, int
              return 1;
           }
           mem_prot = 1;
+          check_apr_irq();
           return 0;
       } else {
          *loc = addr;
@@ -6192,9 +6188,10 @@ dpnorm:
                   }
                   /* AC & 2 = Clear TLB */
                   if (AC & 2) {
-                     for (f = 0; f < 512; f++)
-                        e_tlb[f] = u_tlb[f] = 0;
-                     mem_prot = 0;
+                      for (f = 0; f < 512; f++)
+                         e_tlb[f] = u_tlb[f] = 0;
+                      mem_prot = 0;
+                      check_apr_irq();
                   }
                   /* AC & 4 = Set Prot Interrupt */
                   if (AC & 4) {
diff --git a/PDP10/kx10_defs.h b/PDP10/kx10_defs.h
index bc3fda2..ea6f8fc 100644
--- a/PDP10/kx10_defs.h
+++ b/PDP10/kx10_defs.h
@@ -159,6 +159,7 @@ typedef t_uint64     uint64;
 #define DEBUG_CONO      0x0000040       /* Show CONO instructions */
 #define DEBUG_DATAIO    0x0000100       /* Show DATAI/O instructions */
 #define DEBUG_IRQ       0x0000200       /* Show IRQ requests */
+#define DEBUG_TRACE     0x0000400       /* Trace cpu instruction execution */
 
 extern DEBTAB dev_debug[];
 extern DEBTAB crd_debug[];
@@ -208,6 +209,12 @@ extern DEBTAB crd_debug[];
 #define IOCTL    00000017000000LL
 #endif
 
+#define ADR_IFETCH  020 
+#define ADR_DFETCH  010 
+#define ADR_WRITE   004 
+#define ADR_STOP    002 
+#define ADR_BREAK   001 
+
 /* IRQ Flags in APR */
 #if KL
 #define SWP_DONE        0000020         /* Cache sweep done */
@@ -833,4 +840,9 @@ extern UNIT     auxcpu_unit[];
 //extern UNIT     slave_unit[];
 #endif
 
+#if PIDP10
+void pi_panel_start();
+void pi_panel_stop();
+#endif
+
 #endif