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SEL32: Add CSW (console switches) and BOOTR (boot regs) variables.
SEL32: Fix sel32_clk.c coding error in interval timer code. SEL32: Update to latest makecode.c utility and add makefile. SEL32: Update diag.ini file to show how to set boot regs and CSW values.
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@@ -1,9 +1,10 @@
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set debug -n sel.log
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;set CPU 32/27 4M
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set CPU 32/67 4M
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;set CPU 32/87 4M
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;set CPU 32/97 4M
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;set CPU V6 4M
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;set CPU V9 4M
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;set CPU 32/27 2M
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;set debug stderr
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;set mta debug=cmd;detail;exp;data
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;set mta debug=inst;cmd;detail;exp
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@@ -18,22 +19,22 @@ set CPU 32/67 4M
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;set dma debug=cmd;exp;detail;data
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;set dma debug=cmd;exp;detail;data
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;
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set coml0 enable
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set coml1 enable
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set coml2 enable
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set coml3 enable
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set coml4 enable
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set coml5 enable
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set coml6 enable
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set coml7 enable
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;set coml0 enable
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;set coml1 enable
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;set coml2 enable
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;set coml3 enable
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;set coml4 enable
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;set coml5 enable
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;set coml6 enable
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;set coml7 enable
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;
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set comc enable
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at comc 4747
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;set comc enable
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;at comc 4747
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;
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;set con debug=CMD
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;
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set lpr enable
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at lpr lprout
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;set lpr enable
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;at lpr lprout
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;
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;at mta0 mpxsdt4.tap
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;at mta0 mpxsdt5.tap
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@@ -42,8 +43,12 @@ at lpr lprout
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;
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;at mta0 sim32sdt.tap
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at mta0 diag.tap
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at mta1 temptape.tap
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at mta2 output.tap
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;at mta1 temptape.tap
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;at mta2 output.tap
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;at dma0 diagdisk
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;bo dma0
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deposit CSW 0
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;deposit bootr[0] ffffffff
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deposit bootr[1] 0
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deposit bootr[2] 0
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bo mta0
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