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KA10: Code cleanup and remove unused variables.

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This commit is contained in:
Richard Cornwell 2019-05-05 18:35:46 -04:00
parent 02a043a3fa
commit b97cb4b47d
8 changed files with 235 additions and 239 deletions
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88
PDP10/ka10_ch10.c
View File

@ -103,7 +103,7 @@ const char *ch10_description (DEVICE *);
static char peer[256];
int address;
static uint64 status;
static uint64 ch10_status;
static int rx_count;
static int tx_count;
static uint8 rx_buffer[512+100];
@ -117,7 +117,7 @@ UNIT ch10_unit[] = {
};
REG ch10_reg[] = {
{ GRDATADF(CSR, status, 16, 16, 0, "Control and status", ch10_csr_bits), REG_FIT },
{ GRDATADF(CSR, ch10_status, 16, 16, 0, "Control and status", ch10_csr_bits), REG_FIT },
{ GRDATAD(RXCNT, rx_count, 16, 16, 0, "Receive word count"), REG_FIT|REG_RO},
{ GRDATAD(TXCNT, tx_count, 16, 16, 0, "Transmit word count"), REG_FIT|REG_RO},
{ BRDATAD(RXBUF, rx_buffer, 16, 8, sizeof rx_buffer, "Receive packet buffer"), REG_FIT},
@ -178,12 +178,12 @@ uint16 ch10_checksum (const uint8 *p, int count)
int ch10_test_int (void)
{
if ((status & (RXD|RXIE)) == (RXD|RXIE) ||
(status & (TXD|TXIE)) == (TXD|TXIE)) {
if ((ch10_status & (RXD|RXIE)) == (RXD|RXIE) ||
(ch10_status & (TXD|TXIE)) == (TXD|TXIE)) {
sim_debug (DBG_INT, &ch10_dev, "%s %s Interrupt\n",
status & RXD ? "RX" : "",
status & TXD ? "TX" : "");
set_interrupt(CH_DEVNUM, status);
ch10_status & RXD ? "RX" : "",
ch10_status & TXD ? "TX" : "");
set_interrupt(CH_DEVNUM, ch10_status & PIA);
return 1;
} else {
clr_interrupt(CH_DEVNUM);
@ -214,7 +214,7 @@ void ch10_validate (const uint8 *p, int count)
chksum = ch10_checksum (p, count);
if (chksum != 0) {
sim_debug (DBG_ERR, &ch10_dev, "Checksum error: %04x\n", chksum);
status |= CRC;
ch10_status |= CRC;
} else
sim_debug (DBG_TRC, &ch10_dev, "Checksum: %05o\n", chksum);
}
@ -228,7 +228,7 @@ t_stat ch10_transmit ()
if (tx_count > (512 - CHUDP_HEADER)) {
sim_debug (DBG_PKT, &ch10_dev, "Pack size failed, %d bytes.\n", (int)tx_count);
status |= PLE;
ch10_status |= PLE;
return SCPE_INCOMP;
}
tx_buffer[i] = tx_buffer[8+CHUDP_HEADER];
@ -247,7 +247,7 @@ t_stat ch10_transmit ()
tmxr_poll_tx (&ch10_tmxr);
} else {
sim_debug (DBG_ERR, &ch10_dev, "Sending UDP failed: %d.\n", r);
status |= OVER;
ch10_status |= OVER;
}
tx_count = 0;
ch10_test_int ();
@ -271,29 +271,29 @@ void ch10_receive (void)
sim_debug (DBG_PKT, &ch10_dev, "Received UDP packet, %d bytes for: %o\n", (int)count, dest);
/* Check if packet for us. */
if (dest != address && dest != 0 && (status & SPY) == 0)
if (dest != address && dest != 0 && (ch10_status & SPY) == 0)
return;
if ((RXD & status) == 0) {
if ((RXD & ch10_status) == 0) {
count = (count + 1) & 0776;
memcpy (rx_buffer + (512 - count), p, count);
rx_count = count;
sim_debug (DBG_TRC, &ch10_dev, "Rx count, %d\n", rx_count);
ch10_validate (p + CHUDP_HEADER, count - CHUDP_HEADER);
status |= RXD;
ch10_status |= RXD;
ch10_lines[0].rcve = FALSE;
sim_debug (DBG_TRC, &ch10_dev, "Rx off\n");
ch10_test_int ();
} else {
sim_debug (DBG_ERR, &ch10_dev, "Lost packet\n");
if ((status & LOST) < LOST)
status += 01000;
if ((ch10_status & LOST) < LOST)
ch10_status += 01000;
}
}
void ch10_clear (void)
{
status = TXD;
ch10_status = TXD;
rx_count = 0;
tx_count = 0;
@ -306,11 +306,11 @@ void ch10_clear (void)
ch10_test_int ();
}
void ch10_command (int32 data)
void ch10_command (uint32 data)
{
if (data & RXD) {
sim_debug (DBG_REG, &ch10_dev, "Clear RX\n");
status &= ~RXD;
ch10_status &= ~RXD;
rx_count = 0;
ch10_lines[0].rcve = TRUE;
rx_count = 0;
@ -323,13 +323,13 @@ void ch10_command (int32 data)
if (data & CTX) {
sim_debug (DBG_REG, &ch10_dev, "Clear TX\n");
tx_count = 0;
status |= TXD;
status &= ~TXA;
ch10_status |= TXD;
ch10_status &= ~TXA;
}
if (data & TXD) {
sim_debug (DBG_REG, &ch10_dev, "XMIT TX\n");
ch10_transmit();
status &= ~TXA;
ch10_status &= ~TXA;
}
}
@ -339,44 +339,44 @@ t_stat ch10_devio(uint32 dev, uint64 *data)
switch(dev & 07) {
case CONO:
sim_debug (DBG_REG, &ch10_dev, "CONO %012llo %012llo \n", *data, status);
ch10_command (*data);
status &= ~STATUS_BITS;
status |= *data & STATUS_BITS;
sim_debug (DBG_REG, &ch10_dev, "CONO %012llo %012llo \n", *data, ch10_status);
ch10_command ((uint32)(*data & RMASK));
ch10_status &= ~STATUS_BITS;
ch10_status |= *data & STATUS_BITS;
ch10_test_int ();
break;
case CONI:
*data = status & (STATUS_BITS|TXD|RXD);
*data = ch10_status & (STATUS_BITS|TXD|RXD);
*data |= (uint64)address << 20;
break;
case DATAO:
status &= ~TXD;
ch10_status &= ~TXD;
if (tx_count < 512) {
int i = CHUDP_HEADER + tx_count;
if (status & SWAP) {
tx_buffer[i] = (*data >> 20);
tx_buffer[i+1] = (*data >> 28);
if (ch10_status & SWAP) {
tx_buffer[i] = (*data >> 20) & 0xff;
tx_buffer[i+1] = (*data >> 28) & 0xff;
} else {
tx_buffer[i] = (*data >> 28);
tx_buffer[i+1] = (*data >> 20);
tx_buffer[i] = (*data >> 28) & 0xff;
tx_buffer[i+1] = (*data >> 20) & 0xff;
}
tx_count+=2;
if ((status & HALF) == 0) {
if (status & SWAP) {
tx_buffer[i+2] = (*data >> 4);
tx_buffer[i+3] = (*data >> 12);
if ((ch10_status & HALF) == 0) {
if (ch10_status & SWAP) {
tx_buffer[i+2] = (*data >> 4) & 0xff;
tx_buffer[i+3] = (*data >> 12) & 0xff;
} else {
tx_buffer[i+2] = (*data >> 12);
tx_buffer[i+3] = (*data >> 4);
tx_buffer[i+2] = (*data >> 12) & 0xff;
tx_buffer[i+3] = (*data >> 4) & 0xff;
}
tx_count+=2;
}
sim_debug (DBG_DAT, &ch10_dev, "Write buffer word %d:%02x %02x %02x %02x %012llo %012llo\n",
tx_count, tx_buffer[i], tx_buffer[i+1], tx_buffer[i+2], tx_buffer[i+3], *data, status);
tx_count, tx_buffer[i], tx_buffer[i+1], tx_buffer[i+2], tx_buffer[i+3], *data, ch10_status);
return SCPE_OK;
} else {
sim_debug (DBG_ERR, &ch10_dev, "Write buffer overflow\n");
status |= PLE;
ch10_status |= PLE;
return SCPE_OK;
}
case DATAI:
@ -385,8 +385,8 @@ t_stat ch10_devio(uint32 dev, uint64 *data)
sim_debug (DBG_ERR, &ch10_dev, "Read empty buffer\n");
} else {
int i = 512-rx_count;
status &= ~RXD;
if (status & SWAP) {
ch10_status &= ~RXD;
if (ch10_status & SWAP) {
*data = ((t_uint64)(rx_buffer[i]) & 0xff) << 20;
*data |= ((t_uint64)(rx_buffer[i+1]) & 0xff) << 28;
*data |= ((t_uint64)(rx_buffer[i+2]) & 0xff) << 4;
@ -399,7 +399,7 @@ t_stat ch10_devio(uint32 dev, uint64 *data)
}
rx_count-=4;
sim_debug (DBG_DAT, &ch10_dev, "Read buffer word %d:%02x %02x %02x %02x %012llo %012llo\n",
rx_count, rx_buffer[i], rx_buffer[i+1], rx_buffer[i+2], rx_buffer[i+3], *data, status);
rx_count, rx_buffer[i], rx_buffer[i+1], rx_buffer[i+2], rx_buffer[i+3], *data, ch10_status);
}
}
@ -414,7 +414,7 @@ t_stat ch10_svc(UNIT *uptr)
ch10_receive ();
}
if (tx_count == 0)
status |= TXD;
ch10_status |= TXD;
ch10_test_int ();
return SCPE_OK;
}

2
PDP10/ka10_cp.c
View File

@ -228,8 +228,6 @@ cp_srv(UNIT *uptr) {
t_stat
cp_attach(UNIT * uptr, CONST char *file)
{
t_stat r;
return sim_card_attach(uptr, file);
}

126
PDP10/ka10_dt.c
View File

@ -220,6 +220,8 @@
#define DTB_FLGREQ 0000000000002LL /* Flag Request */
#define DTB_DATREQ 0000000000001LL /* Data Request */
#define DSTATE u5 /* Dectape current state */
/* Current Dectape state in u5 */
#define DTC_FEND 0 /* Tape in endzone */
#define DTC_FBLK 1 /* In forward block number */
#define DTC_FCHK 2 /* In forward checksum */
@ -228,10 +230,11 @@
#define DTC_RBLK 5 /* In reverse block number */
#define DTC_REND 7 /* In final endzone */
#define DTC_MOT 010 /* Tape in motion */
#define DTC_REV 020 /* Tape in reverse */
#define DTC_STOP 0100 /* Tape to stop */
#define DTC_ACCL 0200 /* Tape accel or decl */
#define DTC_MOTMASK 0170
#define DTC_MOT 0010 /* Tape in motion */
#define DTC_REV 0020 /* Tape in reverse */
#define DTC_STOP 0040 /* Tape to stop */
#define DTC_ACCL 0100 /* Tape accel or decl */
#define DTC_V_WORD 8 /* Shift for word count */
#define DTC_M_WORD 0177 /* 128 words per block */
@ -383,8 +386,8 @@ t_stat dt_devio(uint32 dev, uint64 *data) {
}
if (i < DT_NUMDR && !sim_is_active(&dt_unit[i]))
sim_activate(&dt_unit[i], 1000);
if (dt_unit[i].u4 & DTC_MOT) {
switch (dt_unit[i].u5 & 7) {
if (dt_unit[i].DSTATE & DTC_MOT) {
switch (dt_unit[i].DSTATE & 7) {
case DTC_FEND: /* Tape in endzone */
case DTC_REND: /* In final endzone */
dtsb |= DTB_END|DTB_IDL;
@ -422,14 +425,14 @@ t_stat dt_devio(uint32 dev, uint64 *data) {
return SCPE_OK;
}
if (*data & DTC_STSTOP) {
if ((dt_unit[i].u4 & (DTC_MOT)) != 0) {
if ((dt_unit[i].DSTATE & (DTC_MOT)) != 0) {
dt_unit[i].u3 |= DTC_FNC_STOP;
}
dtsa &=~ (DTC_FWDRV|DTC_RVDRV);
} else {
/* Start the unit if not already running */
dt_unit[i].u3 &= ~DTC_FNC_STOP;
if ((dt_unit[i].u4 & (DTC_MOT)) == 0) {
if ((dt_unit[i].DSTATE & (DTC_MOT)) == 0) {
dt_unit[i].u3 |= DTC_FNC_START;
dtsb |= DTB_DLY;
if (!sim_is_active(&dt_unit[i]))
@ -438,14 +441,14 @@ t_stat dt_devio(uint32 dev, uint64 *data) {
dtsa &=~ (DTC_FWDRV|DTC_RVDRV);
switch(*data & (DTC_FWDRV|DTC_RVDRV)) {
case DTC_FWDRV:
if (dt_unit[i].u4 & DTC_REV) {
if (dt_unit[i].DSTATE & DTC_REV) {
dt_unit[i].u3 |= DTC_FNC_REV;
dtsa |= (DTC_RVDRV);
} else
dtsa |= (DTC_FWDRV);
break;
case DTC_RVDRV:
if ((dt_unit[i].u4 & DTC_REV) == 0) {
if ((dt_unit[i].DSTATE & DTC_REV) == 0) {
dt_unit[i].u3 |= DTC_FNC_REV;
dtsa |= (DTC_RVDRV);
} else
@ -453,7 +456,7 @@ t_stat dt_devio(uint32 dev, uint64 *data) {
break;
case DTC_FWDRV|DTC_RVDRV:
dt_unit[i].u3 |= DTC_FNC_REV;
if ((dt_unit[i].u4 & DTC_REV) == 0)
if ((dt_unit[i].DSTATE & DTC_REV) == 0)
dtsa |= (DTC_RVDRV);
else
dtsa |= (DTC_FWDRV);
@ -496,7 +499,7 @@ t_stat dt_devio(uint32 dev, uint64 *data) {
/* Stop all other drives */
for (i = 0; i < DT_NUMDR; i++) {
if (i != DTC_GETUNI(dtsa) &&
(dt_unit[i].u4 & DTC_MOT) != 0)
(dt_unit[i].DSTATE & DTC_MOT) != 0)
dt_unit[i].u3 |= DTC_FNC_STOP;
}
}
@ -564,20 +567,20 @@ t_stat dt_svc (UNIT *uptr)
/*
* Check if in motion or stopping.
*/
if (uptr->u4 & DTC_MOT) {
if (uptr->DSTATE & DTC_MOT) {
/* Check if stoping */
if (uptr->u3 & DTC_FNC_STOP) {
/* Stop delay */
sim_debug(DEBUG_DETAIL, &dt_dev, "DTA %o stopping\n", u);
sim_activate(uptr, DT_WRDTIM*10);
uptr->u3 &= ~DTC_FNC_STOP;
uptr->u4 &= ~(DTC_MOT);
blk = (uptr->u5 >> DTC_V_BLK) & DTC_M_BLK;
uptr->u5 = (0100 << DTC_V_WORD) | DTC_BLOCK;
if (uptr->u4 & DTC_REV) {
uptr->DSTATE &= ~(DTC_MOT);
blk = (uptr->DSTATE >> DTC_V_BLK) & DTC_M_BLK;
uptr->DSTATE = (0100 << DTC_V_WORD) | DTC_BLOCK | (DTC_MOTMASK & uptr->DSTATE);
if (uptr->DSTATE & DTC_REV) {
if (blk <= 0) {
blk = 0;
uptr->u5 = DTC_FEND;
uptr->DSTATE = DTC_FEND | (DTC_MOTMASK & uptr->DSTATE);
} else {
blk--;
}
@ -585,14 +588,14 @@ if (uptr->u4 & DTC_MOT) {
if (blk <= 01100)
blk++;
}
uptr->u5 |= (blk << DTC_V_BLK);
uptr->DSTATE |= (blk << DTC_V_BLK);
return SCPE_OK;
}
if (uptr->u3 & DTC_FNC_REV) {
sim_activate(uptr, DT_WRDTIM*10);
sim_debug(DEBUG_DETAIL, &dt_dev, "DTA %o reversing\n", u);
uptr->u3 &= ~DTC_FNC_REV;
uptr->u4 ^= DTC_REV;
uptr->DSTATE ^= DTC_REV;
return SCPE_OK;
}
@ -601,13 +604,13 @@ if (uptr->u4 & DTC_MOT) {
dtsb &= ~(DTB_DLY|DTB_IDL);
}
/* Moving in reverse direction */
if (uptr->u4 & DTC_REV) {
if (uptr->DSTATE & DTC_REV) {
if (DTC_GETUNI(dtsa) == u) {
dtsb |= DTB_REV;
dtsa &=~ DTC_FWDRV;
dtsa |= DTC_RVDRV;
}
switch (uptr->u5 & 7) {
switch (uptr->DSTATE & 7) {
case DTC_FEND: /* Tape in endzone */
/* Set stop */
sim_debug(DEBUG_DETAIL, &dt_dev, "DTA %o rev forward end\n", u);
@ -622,12 +625,12 @@ if (uptr->u4 & DTC_MOT) {
case DTC_FBLK: /* In forward block number */
sim_activate(uptr,DT_WRDTIM);
word = (uptr->u5 >> DTC_V_BLK) & DTC_M_BLK;
word = (uptr->DSTATE >> DTC_V_BLK) & DTC_M_BLK;
word--;
if (word == 0)
uptr->u5 = DTC_FEND;
uptr->DSTATE = DTC_FEND | (DTC_MOTMASK & uptr->DSTATE);
else
uptr->u5 = DTC_RBLK|(word << DTC_V_BLK);
uptr->DSTATE = DTC_RBLK|(word << DTC_V_BLK) | (DTC_MOTMASK & uptr->DSTATE);
dtsb &= ~(DTB_CHK);
dtsb |= DTB_IDL;
if (dtsb & DTB_STOP)
@ -665,15 +668,15 @@ if (uptr->u4 & DTC_MOT) {
uptr->u3 |= dtsa & 0700; /* Copy command */
}
if (word <= 0) {
uptr->u5 = DTC_FEND;
uptr->DSTATE = DTC_FEND | (DTC_MOTMASK & uptr->DSTATE);
}
break;
case DTC_FCHK: /* In forward checksum */
sim_debug(DEBUG_DETAIL, &dt_dev, "DTA %o rev forward check\n", u);
sim_activate(uptr,DT_WRDTIM*2);
word = (uptr->u5 >> DTC_V_BLK) & DTC_M_BLK;
uptr->u5 = DTC_FBLK|(word << DTC_V_BLK);
word = (uptr->DSTATE >> DTC_V_BLK) & DTC_M_BLK;
uptr->DSTATE = DTC_FBLK|(word << DTC_V_BLK) | (DTC_MOTMASK & uptr->DSTATE);
dtsb &= ~(DTB_DAT|DTB_FIN);
dtsb |= DTB_CHK;
break;
@ -681,18 +684,18 @@ if (uptr->u4 & DTC_MOT) {
case DTC_BLOCK: /* In block */
sim_activate(uptr,DT_WRDTIM);
dtsb |= DTB_DAT;
blk = (uptr->u5 >> DTC_V_BLK) & DTC_M_BLK;
word = (uptr->u5 >> DTC_V_WORD) & DTC_M_WORD;
blk = (uptr->DSTATE >> DTC_V_BLK) & DTC_M_BLK;
word = (uptr->DSTATE >> DTC_V_WORD) & DTC_M_WORD;
off = ((blk << 7) + word) << 1;
/* Check if at end of block */
if (word == 0) {
uptr->u5 &= ~((DTC_M_WORD << DTC_V_WORD) | 7);
uptr->u5 |= DTC_FCHK; /* Move to Checksum */
uptr->DSTATE &= ~((DTC_M_WORD << DTC_V_WORD) | 7);
uptr->DSTATE |= DTC_FCHK; /* Move to Checksum */
dtsb &= ~DTB_DAT;
dtsb |= DTB_FIN;
} else {
uptr->u5 &= ~(DTC_M_WORD << DTC_V_WORD);
uptr->u5 |= (word - 1) << DTC_V_WORD;
uptr->DSTATE &= ~(DTC_M_WORD << DTC_V_WORD);
uptr->DSTATE |= (word - 1) << DTC_V_WORD;
}
uptr->u6-=2;
switch (DTC_GETFNC(uptr->u3)) {
@ -736,8 +739,8 @@ if (uptr->u4 & DTC_MOT) {
case DTC_RCHK: /* In reverse checksum */
sim_activate(uptr,DT_WRDTIM*2);
sim_debug(DEBUG_DETAIL, &dt_dev, "DTA %o rev reverse check\n", u);
word = (uptr->u5 >> DTC_V_BLK) & DTC_M_BLK;
uptr->u5 = DTC_BLOCK|(word << DTC_V_BLK)|(DTC_M_WORD << DTC_V_WORD);
word = (uptr->DSTATE >> DTC_V_BLK) & DTC_M_BLK;
uptr->DSTATE = DTC_BLOCK|(word << DTC_V_BLK)|(DTC_M_WORD << DTC_V_WORD) | (DTC_MOTMASK & uptr->DSTATE);
if (dtsb & DTB_STOP)
dtsa &= ~0700; /* Clear command */
if (DTC_GETUNI(dtsa) == u) {
@ -775,9 +778,9 @@ if (uptr->u4 & DTC_MOT) {
case DTC_RBLK: /* In reverse block number */
sim_activate(uptr,DT_WRDTIM*2);
word = (uptr->u5 >> DTC_V_BLK) & DTC_M_BLK;
word = (uptr->DSTATE >> DTC_V_BLK) & DTC_M_BLK;
data = (t_uint64)word;
uptr->u5 = DTC_RCHK|(word << DTC_V_BLK)|(DTC_M_WORD << DTC_V_WORD);
uptr->DSTATE = DTC_RCHK|(word << DTC_V_BLK)|(DTC_M_WORD << DTC_V_WORD) | (DTC_MOTMASK & uptr->DSTATE);
sim_debug(DEBUG_DETAIL, &dt_dev, "DTA %o rev reverse block %04o\n", u, word);
dtsb &= ~DTB_END;
dtsb |= DTB_BLKRD;
@ -806,9 +809,9 @@ if (uptr->u4 & DTC_MOT) {
case DTC_REND: /* In final endzone */
sim_activate(uptr, DT_WRDTIM*10);
word = (uptr->u5 >> DTC_V_BLK) & DTC_M_BLK;
word = (uptr->DSTATE >> DTC_V_BLK) & DTC_M_BLK;
word--;
uptr->u5 = DTC_RBLK|(word << DTC_V_BLK);
uptr->DSTATE = DTC_RBLK|(word << DTC_V_BLK) | (DTC_MOTMASK & uptr->DSTATE);
break;
}
} else {
@ -818,11 +821,11 @@ if (uptr->u4 & DTC_MOT) {
dtsa |= DTC_FWDRV;
}
/* Moving in forward direction */
switch (uptr->u5 & 7) {
switch (uptr->DSTATE & 7) {
case DTC_FEND: /* Tape in endzone */
sim_activate(uptr, DT_WRDTIM*10);
sim_debug(DEBUG_DETAIL, &dt_dev, "DTA %o forward end\n", u);
uptr->u5 = DTC_FBLK; /* Move to first block */
uptr->DSTATE = DTC_FBLK | (DTC_MOTMASK & uptr->DSTATE); /* Move to first block */
uptr->u6 = 0;
dtsb &= ~DTB_IDL;
break;
@ -831,8 +834,8 @@ if (uptr->u4 & DTC_MOT) {
sim_activate(uptr,DT_WRDTIM*2);
dtsb &= ~DTB_END;
dtsb |= DTB_BLKRD;
word = (uptr->u5 >> DTC_V_BLK) & DTC_M_BLK;
uptr->u5 = DTC_FCHK|(word << DTC_V_BLK);
word = (uptr->DSTATE >> DTC_V_BLK) & DTC_M_BLK;
uptr->DSTATE = DTC_FCHK|(word << DTC_V_BLK) | (DTC_MOTMASK & uptr->DSTATE);
sim_debug(DEBUG_DETAIL, &dt_dev, "DTA %o forward block %04o\n", u, word);
data = (t_uint64)word;
if (DTC_GETUNI(dtsa) == u) {
@ -864,8 +867,8 @@ if (uptr->u4 & DTC_MOT) {
sim_activate(uptr,DT_WRDTIM*2);
sim_debug(DEBUG_DETAIL, &dt_dev, "DTA %o forward check\n", u);
dtsb &= ~DTB_BLKRD;
uptr->u5 &= ~7;
uptr->u5 |= DTC_BLOCK; /* Move to datablock */
uptr->DSTATE &= ~7;
uptr->DSTATE |= DTC_BLOCK; /* Move to datablock */
if (dtsb & DTB_STOP)
dtsa &= ~0700; /* Clear command */
if (DTC_GETUNI(dtsa) == u) {
@ -902,18 +905,18 @@ if (uptr->u4 & DTC_MOT) {
case DTC_BLOCK: /* In block */
sim_activate(uptr,DT_WRDTIM);
blk = (uptr->u5 >> DTC_V_BLK) & DTC_M_BLK;
word = (uptr->u5 >> DTC_V_WORD) & DTC_M_WORD;
blk = (uptr->DSTATE >> DTC_V_BLK) & DTC_M_BLK;
word = (uptr->DSTATE >> DTC_V_WORD) & DTC_M_WORD;
off = ((blk << 7) + word) << 1;
dtsb |= DTB_DAT;
/* Check if at end of block */
if (word == DTC_M_WORD) {
uptr->u5 &= ~7;
uptr->u5 |= DTC_RCHK; /* Move to checksum */
uptr->DSTATE &= ~7;
uptr->DSTATE |= DTC_RCHK; /* Move to checksum */
dtsb |= DTB_FIN;
} else {
uptr->u5 &= ~(DTC_M_WORD << DTC_V_WORD);
uptr->u5 |= (word + 1) << DTC_V_WORD;
uptr->DSTATE &= ~(DTC_M_WORD << DTC_V_WORD);
uptr->DSTATE |= (word + 1) << DTC_V_WORD;
}
switch (DTC_GETFNC(uptr->u3)) {
case FNC_MOVE:
@ -958,8 +961,8 @@ if (uptr->u4 & DTC_MOT) {
case DTC_RCHK: /* In reverse checksum */
sim_activate(uptr,DT_WRDTIM*2);
sim_debug(DEBUG_DETAIL, &dt_dev, "DTA %o reverse check\n", u);
uptr->u5 &= ~(DTC_M_WORD << DTC_V_WORD) | 7;
uptr->u5 |= DTC_RBLK; /* Move to end of block */
uptr->DSTATE &= ~(DTC_M_WORD << DTC_V_WORD) | 7;
uptr->DSTATE |= DTC_RBLK; /* Move to end of block */
dtsb &= ~(DTB_DAT|DTB_FIN);
dtsb |= DTB_CHK;
break;
@ -972,12 +975,12 @@ if (uptr->u4 & DTC_MOT) {
uptr->u3 &= 077077;
uptr->u3 |= dtsa & 0700; /* Copy command */
}
word = (uptr->u5 >> DTC_V_BLK) & DTC_M_BLK;
word = (uptr->DSTATE >> DTC_V_BLK) & DTC_M_BLK;
word++;
if (word > 01101) {
uptr->u5 = DTC_REND|(word << DTC_V_BLK)|(DTC_M_WORD << DTC_V_WORD);
uptr->DSTATE = DTC_REND|(word << DTC_V_BLK)|(DTC_M_WORD << DTC_V_WORD) | (DTC_MOTMASK & uptr->DSTATE);
} else {
uptr->u5 = DTC_FBLK|(word << DTC_V_BLK);
uptr->DSTATE = DTC_FBLK|(word << DTC_V_BLK) | (DTC_MOTMASK & uptr->DSTATE);
}
if (dtsb & DTB_STOP)
dtsa &= ~0700; /* Clear command */
@ -1026,10 +1029,10 @@ if (uptr->u4 & DTC_MOT) {
uptr->u3 &= ~(0700 | DTC_FNC_START);
if (DTC_GETUNI(dtsa) == u)
uptr->u3 |= dtsa & 0700; /* Copy command */
uptr->u4 |= DTC_MOT;
uptr->DSTATE |= DTC_MOT;
if (uptr->u3 & DTC_FNC_REV) {
uptr->u3 &= ~DTC_FNC_REV;
uptr->u4 ^= DTC_REV;
uptr->DSTATE ^= DTC_REV;
}
sim_debug(DEBUG_DETAIL, &dt_dev, "DTA %o start %06o\n", u, uptr->u3);
return SCPE_OK;
@ -1067,8 +1070,7 @@ dt_boot(int32 unit_num, DEVICE * dptr)
FM[addr] = word;
else
M[addr] = word;
uptr->u5 = (1 << DTC_V_BLK) | DTC_BLOCK;
uptr->u4 = DTC_MOT;
uptr->DSTATE = (1 << DTC_V_BLK) | DTC_BLOCK | DTC_MOT;
sim_activate(uptr,30000);
PC = word & RMASK;
return SCPE_OK;
@ -1108,7 +1110,7 @@ t_stat dt_reset (DEVICE *dptr)
dtsb = dtsa = 0; /* clear status */
for (i = 0; i < DT_NUMDR; i++) {
if ((dt_unit[i].u4 & DTC_MOT) != 0)
if ((dt_unit[i].DSTATE & DTC_MOT) != 0)
dt_unit[i].u3 |= DTC_FNC_STOP;
}
clr_interrupt(DT_DEVNUM);

4
PDP10/ka10_imp.c
View File

@ -673,8 +673,6 @@ checksumadjust(uint8 *chksum, uint8 *optr,
t_stat imp_eth_srv(UNIT * uptr)
{
ETH_PACK read_buffer;
sim_clock_coschedule(uptr, 1000); /* continue poll */
imp_timer_task(&imp_data);
@ -847,7 +845,6 @@ imp_packet_in(struct imp_device *imp)
/* We need to translate the IP address to new port number. */
int l = ntohs(ip_hdr->ip_len) - thl - hl;
uint32 nip = ntohl(imp->hostip);
uint16 len;
int nlen;
int i;
uint8 port_buffer[100];
@ -1066,7 +1063,6 @@ imp_packet_out(struct imp_device *imp, ETH_PACK *packet) {
/* We need to translate the IP address to new port number. */
int l = ntohs(pkt->iphdr.ip_len) - thl - hl;
uint32 nip = ntohl(imp->ip);
uint16 len;
int nlen;
uint8 port_buffer[100];
struct udp_hdr udp_hdr;

1
PDP10/ka10_lp.c
View File

@ -257,7 +257,6 @@ lpt_output(UNIT *uptr, char c) {
t_stat lpt_svc (UNIT *uptr)
{
t_stat r;
char c;
int pos;
int cpos;

233
PDP10/ka10_mt.c
View File

@ -138,13 +138,12 @@ t_stat mt_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag,
const char *mt_description (DEVICE *dptr);
struct df10 mt_df10;
uint16 pia;
uint8 unit;
uint8 next_unit;
uint16 mt_pia;
uint8 mt_sel_unit;
uint8 mt_next_unit;
uint8 wr_eor;
uint64 status;
uint64 hold_reg;
int cc;
uint64 mt_status;
uint64 mt_hold_reg;
int mt_mpx_lvl = 0;
int hri_mode; /* Read in mode for TM10B */
@ -199,15 +198,14 @@ MTAB mt_mod[] = {
REG mt_reg[] = {
{BRDATA(BUFF, &mt_buffer[0], 16, 64, BUFFSIZE), REG_HRO},
{ORDATA(PIA, pia, 3)},
{ORDATA(UNIT, unit, 3)},
{ORDATA(NUNIT, next_unit, 3)},
{ORDATA(PIA, mt_pia, 3)},
{ORDATA(UNIT, mt_sel_unit, 3)},
{ORDATA(NUNIT, mt_next_unit, 3)},
{FLDATA(READIN, hri_mode, 0), REG_HRO},
{FLDATA(WREOR, wr_eor, 0), REG_HRO},
{ORDATA(STATUS, status, 18), REG_HRO},
{ORDATA(HOLD, hold_reg, 36), REG_HRO},
{ORDATA(STATUS, mt_status, 18), REG_HRO},
{ORDATA(HOLD, mt_hold_reg, 36), REG_HRO},
{ORDATA(MPX, mt_mpx_lvl, 3)},
{ORDATA(CC, cc, 3), REG_RO},
{ORDATA(DSTATUS, mt_df10.status, 18), REG_RO},
{ORDATA(CIA, mt_df10.cia, 18)},
{ORDATA(CCW, mt_df10.ccw, 18)},
@ -231,46 +229,46 @@ DEVICE mt_dev = {
t_stat mt_devio(uint32 dev, uint64 *data) {
uint64 res;
DEVICE *dptr = &mt_dev;
UNIT *uptr = &mt_unit[unit];
UNIT *uptr = &mt_unit[mt_sel_unit];
switch(dev & 07) {
case CONI:
res = (uint64)(pia & (NEXT_UNIT_ENAB|FLAG_PIA|DATA_PIA));
res = (uint64)(mt_pia & (NEXT_UNIT_ENAB|FLAG_PIA|DATA_PIA));
res |= (uint64)(uptr->CNTRL & 077300);
res |= ((uint64)unit) << 15;
res |= ((uint64)next_unit) << 18;
res |= ((uint64)mt_sel_unit) << 15;
res |= ((uint64)mt_next_unit) << 18;
res |= ((uint64)wr_eor) << 21;
if (dptr->flags & MTDF_TYPEB)
res |= 7LL; /* Force DATA PIA to 7 on type B */
*data = res;
sim_debug(DEBUG_CONI, dptr, "MT CONI %03o status %06o %o %o PC=%06o\n",
dev, (uint32)res, unit, pia, PC);
dev, (uint32)res, mt_sel_unit, mt_pia, PC);
break;
case CONO:
clr_interrupt(MT_DEVNUM);
clr_interrupt(MT_DEVNUM+4);
next_unit = (*data >> 15) & 07;
pia = (uint16)(*data) & (NEXT_UNIT_ENAB|FLAG_PIA|DATA_PIA);
status &= ~(DATA_REQUEST|CHAN_ERR|JOB_DONE|DATA_LATE| \
mt_next_unit = (*data >> 15) & 07;
mt_pia = (uint16)(*data) & (NEXT_UNIT_ENAB|FLAG_PIA|DATA_PIA);
mt_status &= ~(DATA_REQUEST|CHAN_ERR|JOB_DONE|DATA_LATE| \
BAD_TAPE|RLC_ERR|READ_CMP|EOF_FLAG|EOT_FLAG|BOT_FLAG| \
PARITY_ERR|ILL_OPR|REW_FLAG|TRAN_HUNG| \
WT_CW_DONE|DATA_PARITY|NXM_ERR|CW_PAR_ERR|IDLE_UNIT| \
SEVEN_CHAN|NEXT_UNIT);
/* Check if we can switch to new unit */
if (next_unit != unit) {
if (mt_next_unit != mt_sel_unit) {
sim_cancel(uptr);
unit = next_unit;
uptr = &mt_unit[unit];
mt_sel_unit = mt_next_unit;
uptr = &mt_unit[mt_sel_unit];
}
if (pia & NEXT_UNIT_ENAB) {
set_interrupt(dev, pia >> 3);
if (mt_pia & NEXT_UNIT_ENAB) {
set_interrupt(dev, mt_pia >> 3);
}
uptr->CNTRL = (int32)(*data & 077300);
mt_df10.buf = 0;
sim_debug(DEBUG_CONO, dptr,
"MT CONO %03o start %o %o %o %012llo %012llo PC=%06o\n",
dev, uptr->CNTRL, unit, pia, *data, status, PC);
dev, uptr->CNTRL, mt_sel_unit, mt_pia, *data, mt_status, PC);
if ((uptr->flags & UNIT_ATT) != 0) {
/* Check if Write */
int cmd = (uptr->CNTRL & FUNCTION) >> 9;
@ -279,24 +277,24 @@ t_stat mt_devio(uint32 dev, uint64 *data) {
case NOP_CLR:
uptr->CNTRL &= ~MT_BUSY;
wr_eor = 0;
status |= NEXT_UNIT;
mt_status |= NEXT_UNIT;
if (cmd & 010) {
status |= JOB_DONE;
set_interrupt(MT_DEVNUM+4, pia >> 3);
mt_status |= JOB_DONE;
set_interrupt(MT_DEVNUM+4, mt_pia >> 3);
} else {
clr_interrupt(MT_DEVNUM+4);
}
clr_interrupt(MT_DEVNUM);
sim_debug(DEBUG_EXP, dptr, "Setting status %012llo\n", status);
sim_debug(DEBUG_EXP, dptr, "Setting status %012llo\n", mt_status);
return SCPE_OK;
case REWIND:
status |= REW_FLAG;
mt_status |= REW_FLAG;
break;
case WRITE:
if ((uptr->flags & MTUF_WLK) != 0) {
status |= IDLE_UNIT|ILL_OPR|EOF_FLAG;
mt_status |= IDLE_UNIT|ILL_OPR|EOF_FLAG;
break;
}
/* Fall through */
@ -310,19 +308,19 @@ t_stat mt_devio(uint32 dev, uint64 *data) {
case SPC_REV:
if (sim_tape_bot(uptr)) {
status |= JOB_DONE|ILL_OPR;
set_interrupt(MT_DEVNUM+4, pia >> 3);
mt_status |= JOB_DONE|ILL_OPR;
set_interrupt(MT_DEVNUM+4, mt_pia >> 3);
return SCPE_OK;
}
/* Fall through */
case SPC_FWD:
if ((dptr->flags & MTDF_TYPEB) == 0 && (cmd & 010) == 0) {
status |= DATA_REQUEST;
set_interrupt_mpx(MT_DEVNUM, pia, mt_mpx_lvl);
mt_status |= DATA_REQUEST;
set_interrupt_mpx(MT_DEVNUM, mt_pia, mt_mpx_lvl);
}
}
status |= IDLE_UNIT;
mt_status |= IDLE_UNIT;
uptr->CNTRL |= MT_BUSY;
sim_activate(uptr, 1000);
} else {
@ -334,17 +332,17 @@ t_stat mt_devio(uint32 dev, uint64 *data) {
case DATAI:
/* Xfer data */
clr_interrupt(MT_DEVNUM);
*data = hold_reg;
*data = mt_hold_reg;
uptr->CNTRL &= ~MT_BUFFUL;
status &= ~DATA_REQUEST;
mt_status &= ~DATA_REQUEST;
if (uptr->CNTRL & MT_BRFUL) {
hold_reg = mt_df10.buf;
mt_hold_reg = mt_df10.buf;
mt_df10.buf = 0;
uptr->CNTRL &= ~MT_BRFUL;
uptr->CNTRL |= MT_BUFFUL;
if ((dptr->flags & MTDF_TYPEB) == 0) {
status |= DATA_REQUEST;
set_interrupt_mpx(MT_DEVNUM, pia, mt_mpx_lvl);
mt_status |= DATA_REQUEST;
set_interrupt_mpx(MT_DEVNUM, mt_pia, mt_mpx_lvl);
}
}
sim_debug(DEBUG_DATA, dptr, "MT %03o >%012llo\n", dev, *data);
@ -352,19 +350,19 @@ t_stat mt_devio(uint32 dev, uint64 *data) {
case DATAO:
/* Xfer data */
hold_reg = *data;
status &= ~DATA_REQUEST;
mt_hold_reg = *data;
mt_status &= ~DATA_REQUEST;
clr_interrupt(MT_DEVNUM);
uptr->CNTRL |= MT_BUFFUL;
sim_debug(DEBUG_DATA, dptr, "MT %03o <%012llo, %012llo\n",
dev, hold_reg, mt_df10.buf);
dev, mt_hold_reg, mt_df10.buf);
break;
case CONI|04:
res = status;
res = mt_status;
if ((uptr->CNTRL & MT_BUSY) == 0)
res |= NEXT_UNIT;
if ((uptr->CNTRL & (06000|MT_STOP)) == 02000 && (status & JOB_DONE) != 0)
if ((uptr->CNTRL & (06000|MT_STOP)) == 02000 && (mt_status & JOB_DONE) != 0)
res |= RLC_ERR;
if ((uptr->flags & MTUF_7TRK) != 0)
res |= SEVEN_CHAN;
@ -384,26 +382,26 @@ t_stat mt_devio(uint32 dev, uint64 *data) {
#endif
*data = res;
sim_debug(DEBUG_CONI, dptr, "MT CONI %03o status2 %012llo %o %012llo PC=%06o\n",
dev, res, unit, status, PC);
dev, res, mt_sel_unit, mt_status, PC);
break;
case CONO|04:
if (*data & 1) {
uptr->CNTRL |= MT_STOP;
hri_mode = 0;
sim_debug(DEBUG_DETAIL, dptr, "MT stop %03o %012llo\n", dev, status);
sim_debug(DEBUG_DETAIL, dptr, "MT stop %03o %012llo\n", dev, mt_status);
}
if (*data & 2) {
hold_reg ^= mt_df10.buf;
mt_hold_reg ^= mt_df10.buf;
}
if (dptr->flags & MTDF_TYPEB) {
if (*data & 04)
df10_writecw(&mt_df10);
if (*data & 010)
status &= ~(WT_CW_DONE);
mt_status &= ~(WT_CW_DONE);
}
sim_debug(DEBUG_CONO, dptr, "MT CONO %03o control %o %o %012llo %012llo\n",
dev, uptr->CNTRL, unit, hold_reg, mt_df10.buf);
dev, uptr->CNTRL, mt_sel_unit, mt_hold_reg, mt_df10.buf);
break;
case DATAI|04:
@ -415,7 +413,7 @@ t_stat mt_devio(uint32 dev, uint64 *data) {
if (dptr->flags & MTDF_TYPEB)
df10_setup(&mt_df10, (uint32) *data);
else
mt_df10.buf ^= hold_reg;
mt_df10.buf ^= mt_hold_reg;
sim_debug(DEBUG_DATAIO, dptr, "MT DATAO %03o %012llo\n", dev, *data);
break;
}
@ -431,14 +429,14 @@ void mt_df10_read(DEVICE *dptr, UNIT *uptr) {
sim_debug(DEBUG_DATA, dptr, "MT <%012llo %o\n", mt_df10.buf, uptr->CPOS);
} else {
if (uptr->CNTRL & MT_BUFFUL) {
mt_df10.buf = hold_reg;
mt_df10.buf = mt_hold_reg;
if ((uptr->CNTRL & MT_STOP) == 0) {
status |= DATA_REQUEST;
set_interrupt_mpx(MT_DEVNUM, pia, mt_mpx_lvl);
mt_status |= DATA_REQUEST;
set_interrupt_mpx(MT_DEVNUM, mt_pia, mt_mpx_lvl);
}
} else {
if ((uptr->CNTRL & MT_STOP) == 0) {
status |= DATA_LATE;
mt_status |= DATA_LATE;
uptr->CNTRL |= MT_STOP;
}
return;
@ -453,8 +451,8 @@ void mt_df10_read(DEVICE *dptr, UNIT *uptr) {
void mt_df10_write(DEVICE *dptr, UNIT *uptr) {
if (dptr->flags & MTDF_TYPEB) {
if (hri_mode) {
hold_reg = mt_df10.buf;
status |= DATA_REQUEST;
mt_hold_reg = mt_df10.buf;
mt_status |= DATA_REQUEST;
} else if (!df10_write(&mt_df10)) {
uptr->CNTRL |= MT_STOP;
return;
@ -463,11 +461,11 @@ void mt_df10_write(DEVICE *dptr, UNIT *uptr) {
uptr->CNTRL &= ~(MT_BUFFUL|MT_BRFUL);
} else {
if ((uptr->CNTRL & MT_BUFFUL) == 0) {
hold_reg = mt_df10.buf;
status |= DATA_REQUEST;
mt_hold_reg = mt_df10.buf;
mt_status |= DATA_REQUEST;
uptr->CNTRL &= ~(MT_BRFUL);
uptr->CNTRL |= MT_BUFFUL;
set_interrupt_mpx(MT_DEVNUM, pia, mt_mpx_lvl);
set_interrupt_mpx(MT_DEVNUM, mt_pia, mt_mpx_lvl);
} else {
uptr->CNTRL |= MT_BRFUL;
}
@ -485,47 +483,47 @@ t_stat mt_error(UNIT * uptr, t_stat r, DEVICE * dptr)
break;
case MTSE_TMK: /* tape mark */
status |= EOF_FLAG;
mt_status |= EOF_FLAG;
break;
case MTSE_WRP: /* write protected */
status |= WRITE_LOCK;
mt_status |= WRITE_LOCK;
break;
case MTSE_UNATT: /* unattached */
status |= TRAN_HUNG;
mt_status |= TRAN_HUNG;
break;
case MTSE_IOERR: /* IO error */
case MTSE_FMT: /* invalid format */
status |= ILL_OPR;
mt_status |= ILL_OPR;
break;
case MTSE_RECE: /* error in record */
status |= BAD_TAPE;
mt_status |= BAD_TAPE;
break;
case MTSE_BOT: /* beginning of tape */
status |= BOT_FLAG;
mt_status |= BOT_FLAG;
break;
case MTSE_INVRL: /* invalid rec lnt */
break;
case MTSE_EOM: /* end of medium */
status |= EOT_FLAG;
mt_status |= EOT_FLAG;
break;
}
if (next_unit != unit) {
unit = next_unit;
status |= NEXT_UNIT;
if (pia & NEXT_UNIT_ENAB)
set_interrupt(MT_DEVNUM+4, pia >> 3);
if (mt_next_unit != mt_sel_unit) {
mt_sel_unit = mt_next_unit;
mt_status |= NEXT_UNIT;
if (mt_pia & NEXT_UNIT_ENAB)
set_interrupt(MT_DEVNUM+4, mt_pia >> 3);
}
status |= JOB_DONE;
mt_status |= JOB_DONE;
uptr->CNTRL &= ~MT_BUSY;
sim_debug(DEBUG_EXP, dptr, "Setting status %d %012llo\n", r, status);
set_interrupt(MT_DEVNUM+4, pia >> 3);
sim_debug(DEBUG_EXP, dptr, "Setting status %d %012llo\n", r, mt_status);
set_interrupt(MT_DEVNUM+4, mt_pia >> 3);
return SCPE_OK;
}
@ -568,14 +566,14 @@ t_stat mt_srv(UNIT * uptr)
return mt_error(uptr, MTSE_OK, dptr); /* Nop */
case REWIND:
status &= ~IDLE_UNIT;
mt_status &= ~IDLE_UNIT;
sim_debug(DEBUG_DETAIL, dptr, "MT%o rewind\n", unit);
uptr->CNTRL &= ~MT_MOTION;
status |= BOT_FLAG;
mt_status |= BOT_FLAG;
return mt_error(uptr, sim_tape_rewind(uptr), dptr);
case UNLOAD:
status &= ~IDLE_UNIT;
mt_status &= ~IDLE_UNIT;
sim_debug(DEBUG_DETAIL, dptr, "MT%o unload\n", unit);
uptr->CNTRL &= ~MT_MOTION;
return mt_error(uptr, sim_tape_detach(uptr), dptr);
@ -584,14 +582,14 @@ t_stat mt_srv(UNIT * uptr)
case READ_NOEOR:
if (uptr->CNTRL & MT_STOP) {
if ((uptr->CNTRL & MT_LASTWD) == 0)
status |= RLC_ERR;
mt_status |= RLC_ERR;
if (dptr->flags & MTDF_TYPEB)
df10_writecw(&mt_df10);
return mt_error(uptr, MTSE_OK, dptr);
}
if (BUF_EMPTY(uptr)) {
uptr->CNTRL |= MT_MOTION;
status &= ~(IDLE_UNIT|BOT_FLAG|EOF_FLAG|EOT_FLAG|PARITY_ERR|CHAR_COUNT);
mt_status &= ~(IDLE_UNIT|BOT_FLAG|EOF_FLAG|EOT_FLAG|PARITY_ERR|CHAR_COUNT);
if ((r = sim_tape_rdrecf(uptr, &mt_buffer[0], &reclen,
BUFFSIZE)) != MTSE_OK) {
sim_debug(DEBUG_DETAIL, dptr, "MT%o read error %d\n", unit, r);
@ -607,7 +605,7 @@ t_stat mt_srv(UNIT * uptr)
uptr->BPOS = 0;
}
if (uptr->CNTRL & MT_BRFUL) {
status |= DATA_LATE;
mt_status |= DATA_LATE;
sim_debug(DEBUG_EXP, dptr, "data late\n");
break;
}
@ -617,12 +615,12 @@ t_stat mt_srv(UNIT * uptr)
ch = mt_buffer[uptr->BPOS];
if ((((uptr->CNTRL & ODD_PARITY) ? 0x40 : 0) ^
parity_table[ch & 0x3f]) != 0) {
status |= PARITY_ERR;
mt_status |= PARITY_ERR;
}
mt_df10.buf |= (uint64)(ch & 0x3f) << cc;
} else {
if ((uptr->CNTRL & ODD_PARITY) == 0)
status |= PARITY_ERR;
mt_status |= PARITY_ERR;
cc = (8 * (3 - uptr->CPOS)) + 4;
ch = mt_buffer[uptr->BPOS];
if (cc < 0)
@ -634,8 +632,8 @@ t_stat mt_srv(UNIT * uptr)
uptr->CPOS++;
if ((uint32)(uptr->BPOS + cc_max) >= uptr->hwmark)
uptr->CNTRL |= MT_LASTWD;
status &= ~CHAR_COUNT;
status |= (uint64)(uptr->CPOS) << 18;
mt_status &= ~CHAR_COUNT;
mt_status |= (uint64)(uptr->CPOS) << 18;
if (uptr->CPOS == cc_max)
mt_df10_write(dptr, uptr);
} else {
@ -659,7 +657,7 @@ t_stat mt_srv(UNIT * uptr)
}
if (BUF_EMPTY(uptr)) {
uptr->CNTRL |= MT_MOTION;
status &= ~(IDLE_UNIT|BOT_FLAG|EOF_FLAG|EOT_FLAG|PARITY_ERR|CHAR_COUNT);
mt_status &= ~(IDLE_UNIT|BOT_FLAG|EOF_FLAG|EOT_FLAG|PARITY_ERR|CHAR_COUNT);
if ((r = sim_tape_rdrecf(uptr, &mt_buffer[0], &reclen,
BUFFSIZE)) != MTSE_OK) {
sim_debug(DEBUG_DETAIL, dptr, "MT%o read error %d\n", unit, r);
@ -672,8 +670,8 @@ t_stat mt_srv(UNIT * uptr)
uptr->hwmark = reclen;
uptr->BPOS = 0;
if ((dptr->flags & MTDF_TYPEB) == 0) {
status |= DATA_REQUEST;
set_interrupt_mpx(MT_DEVNUM, pia, mt_mpx_lvl);
mt_status |= DATA_REQUEST;
set_interrupt_mpx(MT_DEVNUM, mt_pia, mt_mpx_lvl);
}
break;
}
@ -696,14 +694,14 @@ t_stat mt_srv(UNIT * uptr)
ch = mt_buffer[uptr->BPOS];
if ((((uptr->CNTRL & ODD_PARITY) ? 0x40 : 0) ^
parity_table[ch & 0x3f]) != (ch & 0x40)) {
status |= PARITY_ERR;
mt_status |= PARITY_ERR;
}
mt_buffer[uptr->BPOS] &= 0x3f;
cc = 6 * (5 - uptr->CPOS);
ch = (mt_df10.buf >> cc) & 0x3f;
} else {
if ((uptr->CNTRL & ODD_PARITY) == 0)
status |= PARITY_ERR;
mt_status |= PARITY_ERR;
/* Write next char out */
cc = (8 * (3 - uptr->CPOS)) + 4;
if (cc < 0)
@ -712,11 +710,11 @@ t_stat mt_srv(UNIT * uptr)
ch = (mt_df10.buf >> cc) & 0xff;
}
if (mt_buffer[uptr->BPOS] != ch) {
status |= READ_CMP;
mt_status |= READ_CMP;
if ((dptr->flags & MTDF_TYPEB) == 0) {
uptr->BPOS = uptr->hwmark;
status &= ~CHAR_COUNT;
status |= (uint64)(uptr->CPOS+1) << 18;
mt_status &= ~CHAR_COUNT;
mt_status |= (uint64)(uptr->CPOS+1) << 18;
uptr->CNTRL &= ~(MT_MOTION|MT_BUSY);
if (dptr->flags & MTDF_TYPEB)
df10_writecw(&mt_df10);
@ -731,8 +729,8 @@ t_stat mt_srv(UNIT * uptr)
uptr->CPOS = 0;
uptr->CNTRL &= ~MT_BRFUL;
}
status &= ~CHAR_COUNT;
status |= (uint64)(uptr->CPOS+1) << 18;
mt_status &= ~CHAR_COUNT;
mt_status |= (uint64)(uptr->CPOS+1) << 18;
}
break;
@ -741,15 +739,15 @@ t_stat mt_srv(UNIT * uptr)
/* Writing and Type A, request first data word */
if (BUF_EMPTY(uptr)) {
uptr->CNTRL |= MT_MOTION;
status &= ~(IDLE_UNIT|BOT_FLAG|EOF_FLAG|EOT_FLAG|PARITY_ERR|CHAR_COUNT);
mt_status &= ~(IDLE_UNIT|BOT_FLAG|EOF_FLAG|EOT_FLAG|PARITY_ERR|CHAR_COUNT);
sim_debug(DEBUG_EXP, dptr, "MT%o Init write\n", unit);
uptr->hwmark = 0;
uptr->CPOS = 0;
uptr->BPOS = 0;
status |= (uint64)(1) << 18;
mt_status |= (uint64)(1) << 18;
if ((dptr->flags & MTDF_TYPEB) == 0) {
status |= DATA_REQUEST;
set_interrupt_mpx(MT_DEVNUM, pia, mt_mpx_lvl);
mt_status |= DATA_REQUEST;
set_interrupt_mpx(MT_DEVNUM, mt_pia, mt_mpx_lvl);
}
break;
}
@ -780,14 +778,14 @@ t_stat mt_srv(UNIT * uptr)
uptr->CPOS = 0;
uptr->CNTRL &= ~MT_BRFUL;
}
status &= ~CHAR_COUNT;
status |= (uint64)(uptr->CPOS+1) << 18;
mt_status &= ~CHAR_COUNT;
mt_status |= (uint64)(uptr->CPOS+1) << 18;
}
if ((uptr->CNTRL & (MT_STOP|MT_BRFUL|MT_BUFFUL)) == MT_STOP) {
/* Write out the block */
wr_eor = 1;
reclen = uptr->hwmark;
status &= ~(BOT_FLAG|EOF_FLAG|EOT_FLAG|CHAR_COUNT);
mt_status &= ~(BOT_FLAG|EOF_FLAG|EOT_FLAG|CHAR_COUNT);
r = sim_tape_wrrecf(uptr, &mt_buffer[0], reclen);
sim_debug(DEBUG_DETAIL, dptr, "MT%o Write %d\n", unit, reclen);
uptr->BPOS = 0;
@ -803,7 +801,7 @@ t_stat mt_srv(UNIT * uptr)
if ((uptr->flags & MTUF_WLK) != 0)
return mt_error(uptr, MTSE_WRP, dptr);
if (uptr->CPOS == 0) {
status &= ~(IDLE_UNIT|BOT_FLAG|EOT_FLAG);
mt_status &= ~(IDLE_UNIT|BOT_FLAG|EOT_FLAG);
sim_debug(DEBUG_DETAIL, dptr, "MT%o WTM\n", unit);
r = sim_tape_wrtmk(uptr);
if (r != MTSE_OK)
@ -812,7 +810,7 @@ t_stat mt_srv(UNIT * uptr)
wr_eor = 1;
} else {
wr_eor = 0;
status |= EOF_FLAG;
mt_status |= EOF_FLAG;
uptr->CNTRL &= ~MT_MOTION;
return mt_error(uptr, MTSE_OK, dptr);
}
@ -822,7 +820,7 @@ t_stat mt_srv(UNIT * uptr)
if ((uptr->flags & MTUF_WLK) != 0)
return mt_error(uptr, MTSE_WRP, dptr);
uptr->CNTRL &= ~MT_MOTION;
status &= ~(IDLE_UNIT|BOT_FLAG|EOT_FLAG);
mt_status &= ~(IDLE_UNIT|BOT_FLAG|EOT_FLAG);
sim_debug(DEBUG_DETAIL, dptr, "MT%o ERG\n", unit);
return mt_error(uptr, sim_tape_wrgap(uptr, 35), dptr);
@ -832,7 +830,7 @@ t_stat mt_srv(UNIT * uptr)
case SPC_FWD:
sim_debug(DEBUG_DETAIL, dptr, "MT%o space %o\n", unit, cmd);
uptr->CNTRL |= MT_MOTION;
status &= ~(IDLE_UNIT|BOT_FLAG|EOT_FLAG);
mt_status &= ~(IDLE_UNIT|BOT_FLAG|EOT_FLAG);
/* Always skip at least one record */
if ((cmd & 7) == SPC_FWD)
r = sim_tape_sprecf(uptr, &reclen);
@ -846,7 +844,7 @@ t_stat mt_srv(UNIT * uptr)
case MTSE_EOM: /* end of medium */
/* Stop motion if we recieve any of these */
uptr->CNTRL &= ~MT_MOTION;
status &= ~DATA_REQUEST;
mt_status &= ~DATA_REQUEST;
clr_interrupt(MT_DEVNUM);
return mt_error(uptr, r, dptr);
}
@ -854,7 +852,7 @@ t_stat mt_srv(UNIT * uptr)
if ((cmd & 010) == 0) {
mt_df10_read(dptr, uptr);
if ((uptr->CNTRL & MT_BRFUL) == 0) {
status &= ~DATA_LATE;
mt_status &= ~DATA_LATE;
uptr->CNTRL &= ~MT_MOTION;
if (dptr->flags & MTDF_TYPEB)
df10_writecw(&mt_df10);
@ -936,7 +934,7 @@ mt_boot(int32 unit_num, DEVICE * dptr)
if ((uint32)uptr->BPOS < uptr->hwmark) {
uptr->CNTRL |= MT_MOTION|MT_BUSY;
uptr->CNTRL &= ~(MT_BRFUL|MT_BUFFUL);
hold_reg = mt_df10.buf = 0;
mt_hold_reg = mt_df10.buf = 0;
if ((dptr->flags & MTDF_TYPEB) != 0) {
mt_df10.cia = 020;
mt_df10.cda = addr;
@ -1013,19 +1011,18 @@ mt_reset(DEVICE * dptr)
UNIT *uptr = &mt_unit[i];
if (MT_DENS(uptr->dynflags) == MT_DENS_NONE)
uptr->dynflags = MT_200_VALID | MT_556_VALID |
MT_800_VALID | (MT_DENS_800 << UNIT_V_DF_TAPE);
uptr->dynflags = MT_200_VALID | MT_556_VALID;
uptr->CNTRL = 0;
sim_cancel(uptr);
}
mt_df10.devnum = mt_dib.dev_num;
mt_df10.nxmerr = 24;
mt_df10.ccw_comp = 25;
pia = 0;
status = 0;
unit = 0;
next_unit = 0;
hold_reg = 0;
mt_pia = 0;
mt_status = 0;
mt_sel_unit = 0;
mt_next_unit = 0;
mt_hold_reg = 0;
return SCPE_OK;
}

10
PDP10/ka10_pt.c
View File

@ -43,7 +43,11 @@
#define BUSY_FLG 000020
#define BIN_FLG 000040
#define NO_TAPE_PP 000100
#if PDP6
#define TAPE_PR 000000
#else
#define TAPE_PR 000400
#endif
t_stat ptp_devio(uint32 dev, uint64 *data);
@ -69,7 +73,7 @@ const char *ptr_description (DEVICE *dptr);
DIB ptp_dib = { PP_DEVNUM, 1, &ptp_devio, NULL };
UNIT ptp_unit = {
UDATA (&ptp_svc, UNIT_ATTABLE+UNIT_TEXT, 0), SERIAL_OUT_WAIT
UDATA (&ptp_svc, UNIT_ATTABLE+UNIT_TEXT, 0), 10000
};
REG ptp_reg[] = {
@ -93,7 +97,7 @@ DEVICE ptp_dev = {
DIB ptr_dib = { PR_DEVNUM, 1, &ptr_devio, NULL };
UNIT ptr_unit = {
UDATA (&ptr_svc, UNIT_ATTABLE+UNIT_TEXT, 0), SERIAL_OUT_WAIT
UDATA (&ptr_svc, UNIT_ATTABLE+UNIT_TEXT, 0), 10000
};
REG ptr_reg[] = {
@ -242,11 +246,11 @@ t_stat ptr_devio(uint32 dev, uint64 *data) {
if ((uptr->STATUS & DONE_FLG)) {
*data = ((uint64)uptr->CHL) << 18;
*data |= ((uint64)uptr->CHR);
uptr->STATUS |= BUSY_FLG;
uptr->STATUS &= ~DONE_FLG;
clr_interrupt(dev);
sim_activate (&ptr_unit, ptr_unit.wait);
}
uptr->STATUS |= BUSY_FLG;
sim_debug(DEBUG_DATAIO, &ptr_dev, "PT: DATAI %012llo\n\r", *data);
break;
case DATAO:

10
PDP10/ka10_ten11.c
View File

@ -26,6 +26,11 @@
#include "ka10_defs.h"
#include "sim_tmxr.h"
#ifndef NUM_DEVS_TEN11
#define NUM_DEVS_TEN11 0
#endif
#if (NUM_DEVS_TEN11 > 0)
#include <fcntl.h>
#include <unistd.h>
#include <sys/types.h>
@ -34,11 +39,6 @@
#include <netinet/tcp.h>
#include <arpa/inet.h>
#ifndef NUM_DEVS_TEN11
#define NUM_DEVS_TEN11 0
#endif
#if (NUM_DEVS_TEN11 > 0)
/* Rubin 10-11 pager. */
static uint64 ten11_pager[256];