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SEL32: Update sel32_com.c for telnet support in UTX and MPX.

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SEL32: Correct DIB functions to return t_stat instead if UINT16.
SEL32: DO more code cleanup.
This commit is contained in:
AZBevier 2021-04-01 20:40:55 -07:00
parent 81dff79f4f
commit bbaabbd168
15 changed files with 1445 additions and 727 deletions
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100
SEL32/sel32_chan.c
View File

@ -547,11 +547,13 @@ int32 load_ccw(CHANP *chp, int32 tic_ok)
int32 docmd = 0;
DIB *dibp = dib_unit[chp->chan_dev]; /* get the DIB pointer */
UNIT *uptr = chp->unitptr; /* get the unit ptr */
uint16 chan = get_chan(chp->chan_dev); /* our channel */
uint16 chan = get_chan(chp->chan_dev); /* our channel */
uint16 chsa = chp->chan_dev; /* our chan/sa */
uint16 devstat = 0;
sim_debug(DEBUG_XIO, &cpu_dev,
"load_ccw @%06x entry chan_status[%04x] %04x\n", chp->chan_caw, chan, chp->chan_status);
"load_ccw @%06x entry chan_status[%04x] %04x\n",
chp->chan_caw, chan, chp->chan_status);
/* determine if channel DIB has a pre iocl processor */
if (dibp->iocl_io != NULL) { /* NULL if no function */
/* call the device controller to process the iocl */
@ -710,8 +712,8 @@ loop:
chp->chan_byte = BUFF_BUSY; /* busy & no bytes transferred yet */
sim_debug(DEBUG_XIO, &cpu_dev,
"load_ccw @%06x read docmd %01x addr %06x count %04x chan %04x ccw_flags %04x\n",
chp->chan_caw, docmd, chp->ccw_addr, chp->ccw_count, chan, chp->ccw_flags);
"load_ccw @%06x read docmd %01x addr %06x count %04x chsa %04x ccw_flags %04x\n",
chp->chan_caw, docmd, chp->ccw_addr, chp->ccw_count, chsa, chp->ccw_flags);
if (docmd) { /* see if we need to process a command */
DIB *dibp = dib_unit[chp->chan_dev]; /* get the DIB pointer */
@ -723,8 +725,8 @@ loop:
}
sim_debug(DEBUG_XIO, &cpu_dev,
"load_ccw @%06x before start_cmd chan %04x status %04x count %04x SNS %08x\n",
chp->chan_caw, chan, chp->chan_status, chp->ccw_count, uptr->u5);
"load_ccw @%06x before start_cmd chsa %04x status %04x count %04x SNS %08x\n",
chp->chan_caw, chsa, chp->chan_status, chp->ccw_count, uptr->u5);
/* call the device startcmd function to process the current command */
/* just replace device status bits */
@ -734,8 +736,8 @@ loop:
chp->chan_info &= ~INFO_SIOCD; /* not first IOCD in channel prog */
sim_debug(DEBUG_XIO, &cpu_dev,
"load_ccw @%06x after start_cmd chan %04x status %08x count %04x\n",
chp->chan_caw, chan, chp->chan_status, chp->ccw_count);
"load_ccw @%06x after start_cmd chsa %04x status %08x count %04x\n",
chp->chan_caw, chsa, chp->chan_status, chp->ccw_count);
/* see if bad status */
if (chp->chan_status & (STATUS_ATTN|STATUS_ERROR)) {
@ -774,8 +776,8 @@ loop:
/* the device processor returned OK (0), so wait for I/O to complete */
/* nothing happening, so return */
sim_debug(DEBUG_XIO, &cpu_dev,
"load_ccw @%06x return, chan %04x status %04x count %04x irq_pend %1x\n",
chp->chan_caw, chan, chp->chan_status, chp->ccw_count, irq_pend);
"load_ccw @%06x return, chsa %04x status %04x count %04x irq_pend %1x\n",
chp->chan_caw, chsa, chp->chan_status, chp->ccw_count, irq_pend);
return 0; /* good return */
}
@ -808,7 +810,7 @@ int chan_read_byte(uint16 chsa, uint8 *data)
chp->ccw_count, chp->ccw_addr, chsa);
return 1; /* return error */
}
sim_debug(DEBUG_EXP, &cpu_dev,
sim_debug(DEBUG_DETAIL, &cpu_dev,
"chan_read_byte with DC IOCD loaded, cnt %04x addr %06x chsa %04x\n",
chp->ccw_count, chp->ccw_addr, chsa);
}
@ -856,9 +858,9 @@ int chan_write_byte(uint16 chsa, uint8 *data)
/* see if at end of buffer */
if (chp->chan_byte == BUFF_CHNEND) { /* check for end of data */
sim_debug(DEBUG_EXP, &cpu_dev,
"chan_write_byte BUFF_CHNEND ccw_flags %04x addr %06x cnt %04x\n",
chp->ccw_flags, chp->ccw_addr, chp->ccw_count);
// sim_debug(DEBUG_EXP, &cpu_dev,
// "chan_write_byte BUFF_CHNEND ccw_flags %04x addr %06x cnt %04x\n",
// chp->ccw_flags, chp->ccw_addr, chp->ccw_count);
/* if SLI not set, we have incorrect length */
if ((chp->ccw_flags & FLAG_SLI) == 0) {
sim_debug(DEBUG_EXP, &cpu_dev, "chan_write_byte 4 setting SLI ret\n");
@ -867,18 +869,18 @@ int chan_write_byte(uint16 chsa, uint8 *data)
return 1; /* return error */
}
if (chp->ccw_count == 0) {
sim_debug(DEBUG_EXP, &cpu_dev,
"chan_write_byte ZERO chan %04x ccw_count %04x addr %06x\n",
chan, chp->ccw_count, chp->ccw_addr);
// sim_debug(DEBUG_EXP, &cpu_dev,
// "chan_write_byte ZERO chan %04x ccw_count %04x addr %06x\n",
// chan, chp->ccw_count, chp->ccw_addr);
if ((chp->ccw_flags & FLAG_DC) == 0) { /* see if we have data chaining */
sim_debug(DEBUG_EXP, &cpu_dev,
"chan_write_byte no DC ccw_flags %04x\n", chp->ccw_flags);
chp->chan_status |= STATUS_CEND; /* no, end of data */
chp->chan_byte = BUFF_CHNEND; /* thats all the data we want */
sim_debug(DEBUG_EXP, &cpu_dev,
"chan_write_byte BUFF_CHNEND chp %p chan_byte %04x\n",
chp, chp->chan_byte);
// sim_debug(DEBUG_EXP, &cpu_dev,
// "chan_write_byte BUFF_CHNEND chp %p chan_byte %04x\n",
// chp, chp->chan_byte);
return 1; /* return done error */
} else {
/* we have data chaining, process iocl */
@ -888,9 +890,9 @@ int chan_write_byte(uint16 chsa, uint8 *data)
chp->ccw_count, chp->ccw_addr, chan);
return 1; /* return error */
}
sim_debug(DEBUG_EXP, &cpu_dev,
"chan_write_byte with DC IOCD loaded cnt %04x addr %06x chan %04x\n",
chp->ccw_count, chp->ccw_addr, chan);
// sim_debug(DEBUG_EXP, &cpu_dev,
// "chan_write_byte with DC IOCD loaded cnt %04x addr %06x chan %04x\n",
// chp->ccw_count, chp->ccw_addr, chan);
}
}
/* we have data byte to write to chp->ccw_addr */
@ -898,14 +900,14 @@ int chan_write_byte(uint16 chsa, uint8 *data)
if (chp->ccw_flags & FLAG_SKIP) {
chp->ccw_count--; /* decrement skip count */
chp->chan_byte = BUFF_BUSY; /* busy, but no data */
sim_debug(DEBUG_EXP, &cpu_dev,
"chan_write_byte1 BUFF_BUSY chp %p chan_byte %04x\n", chp, chp->chan_byte);
// sim_debug(DEBUG_EXP, &cpu_dev,
// "chan_write_byte1 BUFF_BUSY chp %p chan_byte %04x\n", chp, chp->chan_byte);
if ((chp->ccw_cmd & 0xff) == CMD_RDBWD)
chp->ccw_addr--; /* backward */
else
chp->ccw_addr++; /* forward */
sim_debug(DEBUG_EXP, &cpu_dev, "chan_write_byte SKIP ret addr %08x cnt %04x\n",
chp->ccw_addr, chp->ccw_count);
// sim_debug(DEBUG_EXP, &cpu_dev, "chan_write_byte SKIP ret addr %08x cnt %04x\n",
// chp->ccw_addr, chp->ccw_count);
return 0;
}
chp->chan_buf = *data; /* get data byte */
@ -914,8 +916,8 @@ int chan_write_byte(uint16 chsa, uint8 *data)
chp->ccw_count--; /* reduce count */
chp->chan_byte = BUFF_BUSY; /* busy, but no data */
sim_debug(DEBUG_DETAIL, &cpu_dev,
"chan_write_byte2 BUFF_BUSY chp %p chan_byte %04x\n", chp, chp->chan_byte);
// sim_debug(DEBUG_DETAIL, &cpu_dev,
// "chan_write_byte2 BUFF_BUSY chp %p chan_byte %04x\n", chp, chp->chan_byte);
if ((chp->ccw_cmd & 0xff) == CMD_RDBWD) /* see if reading backwards */
chp->ccw_addr -= 1; /* no, use previous address */
else
@ -947,7 +949,7 @@ void set_devattn(uint16 chsa, uint16 flags)
/* can not do anything, so just return */
sim_debug(DEBUG_EXP, &cpu_dev, "set_devattn chsa %04x, flags %04x\n", chsa, flags);
fprintf(stdout, "set_devattn chsa %04x invalid configured device\n", chsa);
fflush(stdout);
// fflush(stdout);
return;
}
@ -966,6 +968,7 @@ void chan_end(uint16 chsa, uint16 flags) {
sim_debug(DEBUG_DETAIL, &cpu_dev,
"chan_end entry chsa %04x flags %04x status %04x cmd %02x\n",
chsa, flags, chp->chan_status, chp->ccw_cmd);
// fflush(sim_deb);
chp->chan_byte = BUFF_BUSY; /* we are empty & still busy now */
chp->chan_status |= STATUS_CEND; /* set channel end */
@ -1045,6 +1048,9 @@ void chan_end(uint16 chsa, uint16 flags) {
} else {
/* we have channel end and no CC flag, continue channel prog */
UNIT *uptr = chp->unitptr; /* get the unit ptr */
// DEVICE *dptr = uptr->dptr; /* get device pointer */
// int unit = uptr - dptr->units; /* get the UNIT number */
// DIB *dibp = dib_chan[get_chan(chsa)]; /* get the DIB pointer */
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->u3);
int unit = (uptr-dptr->units); /* get the UNIT number */
@ -1119,8 +1125,8 @@ void chan_end(uint16 chsa, uint16 flags) {
}
goout:
sim_debug(DEBUG_CMD, &cpu_dev,
"chan_end done chsa %04x chp %p status %08x chan_byte %02x\n",
chsa, chp, chp->chan_status, chp->chan_byte);
"chan_end done chsa %04x status %08x chan_byte %02x\n",
chsa, chp->chan_status, chp->chan_byte);
/* following statement required for boot to work */
irq_pend = 1; /* flag to test for int condition */
}
@ -1258,7 +1264,6 @@ nothere:
dptr = get_dev(uptr); /* pointer to DEVICE structure */
/* is device or unit marked disabled? */
dptr = get_dev(uptr);
if ((dptr->flags & DEV_DIS) || (uptr->flags & UNIT_DIS)) {
/* is device/unit disabled? */
/* UTX wants CC1 on "mt offline" call. If not, UTX loops forever */
@ -2584,6 +2589,13 @@ DEVICE *get_dev(UNIT *uptr)
if (uptr->dptr) /* get device pointer from unit */
return uptr->dptr; /* return valid pointer */
#if 0
sim_debug(DEBUG_EXP, &cpu_dev,
"get_dev got NULL uptr %p uptr->dptr %p\n",
uptr, uptr->dptr);
fflush(sim_deb);
#endif
/* the device pointer in the unit is not set up, do it now */
/* This should never happen as the pointer is setup in first reset call */
for (i = 0; (dptr = sim_devices[i]) != NULL; i++) { /* do all devices */
@ -2628,7 +2640,7 @@ t_stat chan_set_devs() {
if ((dptr->flags & DEV_DIS) || /* Skip disabled devices */
((dibp->chan_prg) == NULL)) { /* must have channel info for each device */
chsa = GET_UADDR(uptr->u3); /* ch/sa value */
//printf("Device %s chsa %04x not set up dibp %p\n", dptr->name, chsa, dibp);
//printf("Device %s chsa %04x not set up dibp %p uptr %p\n", dptr->name, chsa, dibp, uptr);
continue;
}
@ -2636,8 +2648,8 @@ t_stat chan_set_devs() {
/* Check if address is in unit or dev entry */
for (j = 0; j < dptr->numunits; j++) { /* loop through unit entries */
chsa = GET_UADDR(uptr->u3); /* ch/sa value */
//printf("Setup device %s%d chsa %04x type %02x dibp %p\n",
//dptr->name, j, chsa, GET_TYPE(uptr->flags), dibp);
//printf("Setup device %s%d chsa %04x type %02x dibp %p uptr %p\n",
//dptr->name, j, chsa, GET_TYPE(uptr->flags), dibp, uptr);
/* zero some channel data loc's for device */
chp->unitptr = uptr; /* set the unit back pointer */
chp->chan_status = 0; /* clear the channel status */
@ -2669,13 +2681,13 @@ t_stat chan_set_devs() {
} else {
/* we have unit 0 of non-IOP/MFP device */
if (dib_unit[chsa] != 0) {
//printf("Channel/Dev %04x already defined\n", chsa);
//printf("Channel/Dev %04x already defined uptr %p\n", chsa, uptr);
return SCPE_IERR; /* no, arg error */
} else {
/* channel mux, save dib for channel */
/* for now, save any zero dev as chan */
if (chsa) {
//printf("Setting Channel zero unit 0 device %04x dibp %p\n", chsa, dibp);
//printf("Setting Channel zero unit 0 device %04x dibp %p uptr %p\n", chsa, dibp, uptr);
dib_unit[chsa] = dibp; /* no, save the dib address */
if (dibp->dev_ini != NULL) /* if there is an init routine, call it now */
dibp->dev_ini(uptr, 1); /* init the channel */
@ -2737,15 +2749,15 @@ t_stat set_dev_addr(UNIT *uptr, int32 val, CONST char *cptr, void *desc) {
return SCPE_IERR; /* no, arg error */
dptr = get_dev(uptr); /* find the device from unit pointer */
if (dptr == NULL) { /* device not found, so error */
fprintf(stderr, "Set dev no DEVICE cptr %s\r\n", cptr);
fprintf(stderr, "Set dev no DEVICE cptr %s uptr %p\r\n", cptr, uptr);
//printf("Set dev no DEVICE ptr %s\r\n", cptr);
return SCPE_IERR; /* error */
}
//printf("Set dev DEVICE ptr %s\r\n", cptr);
//printf("Set dev DEVICE ptr %s uptr %p\r\n", cptr, uptr);
dibp = (DIB *)dptr->ctxt; /* get dib pointer from device struct */
if (dibp == NULL) { /* we need a DIB */
fprintf(stderr, "Set dev no DIB ptr %s\r\n", cptr);
fprintf(stderr, "Set dev no DIB ptr %s uptr %p\r\n", cptr, uptr);
//printf("Set dev no DIB ptr %s\r\n", cptr);
return SCPE_IERR; /* no DIB, so error */
}
@ -2765,7 +2777,7 @@ t_stat set_dev_addr(UNIT *uptr, int32 val, CONST char *cptr, void *desc) {
/* loop through all units for this device */
for (i = 0; i < dibp->numunits; i++) {
ochsa = GET_UADDR(tuptr->u3); /* get old chsa for this unit */
//printf("Got old chsa %04x\r\n", ochsa);
//printf("Got unit %x old chsa %04x\r\n", i, ochsa);
dib_unit[ochsa] = NULL; /* clear sa dib pointer */
dib_unit[ochsa&0x7f00] = NULL; /* clear the channel dib address */
// if (dptr->flags & DEV_CHAN) { /* Is this a channel device IOP/MFP */
@ -2777,8 +2789,8 @@ t_stat set_dev_addr(UNIT *uptr, int32 val, CONST char *cptr, void *desc) {
chsa = chan | (ochsa & 0xff); /* merge new channel with old sa */
}
if (chsa != ochsa) {
fprintf(stderr, "Set new chsa %04x old chsa %04x\r\n", chsa, ochsa);
//printf("Set new chsa %04x old chsa %04x\r\n", chsa, ochsa);
fprintf(stderr, "Set unit %x new chsa %04x old chsa %04x\r\n", i, chsa, ochsa);
//printf("Set unit %x new chsa %04x old chsa %04x\r\n", i, chsa, ochsa);
}
tuptr->u3 &= ~UNIT_ADDR_MASK; /* clear old chsa for this unit */
tuptr->u3 |= UNIT_ADDR(chsa); /* set new chsa for this unit */

1248
SEL32/sel32_com.c
View File

File diff suppressed because it is too large Load Diff

122
SEL32/sel32_con.c
View File

@ -94,13 +94,13 @@ uint32 outbusy = 0; /* output waiting on timeout */
uint32 inbusy = 0; /* input waiting on timeout */
/* forward definitions */
uint16 con_preio(UNIT *uptr, uint16 chan);
uint16 con_startcmd(UNIT*, uint16, uint8);
t_stat con_preio(UNIT *uptr, uint16 chan);
t_stat con_startcmd(UNIT*, uint16, uint8);
void con_ini(UNIT*, t_bool);
t_stat con_srvi(UNIT*);
t_stat con_srvo(UNIT*);
uint16 con_haltio(UNIT *);
uint16 con_rschnlio(UNIT *uptr); /* Reset Channel */
t_stat con_haltio(UNIT *);
t_stat con_rschnlio(UNIT *uptr); /* Reset Channel */
t_stat con_poll(UNIT *);
t_stat con_reset(DEVICE *);
@ -113,19 +113,19 @@ MTAB con_mod[] = {
};
UNIT con_unit[] = {
{UDATA(&con_srvi, UNIT_CON, 0), 0, UNIT_ADDR(0x7EFC)}, /* Input */
{UDATA(&con_srvo, UNIT_CON, 0), 0, UNIT_ADDR(0x7EFD)}, /* Output */
{UDATA(&con_srvi, UNIT_CON, 0), 0, UNIT_ADDR(0x7EFC)}, /* 0 Input */
{UDATA(&con_srvo, UNIT_CON, 0), 0, UNIT_ADDR(0x7EFD)}, /* 1 Output */
};
DIB con_dib = {
con_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
con_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
con_haltio, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
con_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
con_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
con_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
con_haltio, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
con_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
con_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
con_unit, /* UNIT* units */ /* Pointer to units structure */
con_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -164,31 +164,32 @@ void con_ini(UNIT *uptr, t_bool f) {
}
/* start a console operation */
uint16 con_preio(UNIT *uptr, uint16 chan) {
t_stat con_preio(UNIT *uptr, uint16 chan) {
DEVICE *dptr = get_dev(uptr);
int unit = (uptr - dptr->units);
if ((uptr->CMD & CON_MSK) != 0) { /* just return if busy */
sim_debug(DEBUG_CMD, &con_dev, "con_preio unit=%02x BUSY\n", unit);
sim_debug(DEBUG_CMD, dptr, "con_preio unit=%02x BUSY\n", unit);
return SNS_BSY;
}
sim_debug(DEBUG_CMD, &con_dev, "con_preio unit=%02x OK\n", unit);
sim_debug(DEBUG_CMD, dptr, "con_preio unit=%02x OK\n", unit);
return SCPE_OK; /* good to go */
}
/* start an I/O operation */
uint16 con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
t_stat con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
DEVICE *dptr = uptr->dptr;
int unit = (uptr - con_unit); /* unit 0 is read, unit 1 is write */
if ((uptr->CMD & CON_MSK) != 0) { /* is unit busy */
sim_debug(DEBUG_EXP, &con_dev,
"con_startcmd unit %01x chan %02x cmd %02x BUSY cmd %02x\n",
unit, chan, cmd, uptr->CMD);
sim_debug(DEBUG_EXP, dptr,
"con_startcmd unit %01x chan %02x cmd %02x BUSY cmd %02x uptr %p\n",
unit, chan, cmd, uptr->CMD, uptr);
return SNS_BSY; /* yes, return busy */
}
sim_debug(DEBUG_DETAIL, &con_dev,
sim_debug(DEBUG_DETAIL, dptr,
"con_startcmd unit %01x chan %02x cmd %02x enter\n", unit, chan, cmd);
/* substitute CON_INCH2 for CON_INCH for pprocessing */
@ -226,7 +227,7 @@ uint16 con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
}
/* invalid command */
uptr->SNS |= SNS_CMDREJ; /* command rejected */
sim_debug(DEBUG_EXP, &con_dev,
sim_debug(DEBUG_EXP, dptr,
"con_startcmd %04x: Invalid command %02x Sense %02x\n",
chan, cmd, uptr->SNS);
return SNS_CHNEND|SNS_DEVEND|STATUS_PCHK;
@ -234,6 +235,7 @@ uint16 con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
/* Handle output transfers for console */
t_stat con_srvo(UNIT *uptr) {
DEVICE *dptr = uptr->dptr;
uint16 chsa = GET_UADDR(uptr->CMD);
int unit = (uptr - con_unit); /* unit 0 is read, unit 1 is write */
int cmd = uptr->CMD & CON_MSK;
@ -244,8 +246,9 @@ t_stat con_srvo(UNIT *uptr) {
int cnt = 0;
uint8 ch;
sim_debug(DEBUG_CMD, &con_dev,
"con_srvo enter CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
sim_debug(DEBUG_CMD, dptr,
"con_srvo enter CMD %08x chsa %04x cmd = %02x uptr %p\n",
uptr->CMD, chsa, cmd, uptr);
switch (cmd) {
@ -256,14 +259,14 @@ t_stat con_srvo(UNIT *uptr) {
/* if input requested for output device, give error */
uptr->SNS |= SNS_CMDREJ; /* command rejected */
uptr->CMD &= LMASK; /* nothing left, command complete */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvo Read to output device CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
chan_end(chsa, SNS_CHNEND|SNS_UNITCHK); /* unit check */
break;
case CON_CON: /* 0x1f */ /* Connect, return Data Set ready */
uptr->SNS |= (SNS_DSR|SNS_DCD); /* Data set ready, Data Carrier detected */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvo CON CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
uptr->CMD &= ~CON_MSK; /* remove old CMD */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
@ -271,7 +274,7 @@ t_stat con_srvo(UNIT *uptr) {
case CON_DIS: /* 0x23 */ /* Disconnect has do nothing */
uptr->SNS &= ~(SNS_DSR|SNS_DCD); /* Data set not ready */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvo DIS CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
uptr->CMD &= ~CON_MSK; /* remove old CMD */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
@ -279,7 +282,7 @@ t_stat con_srvo(UNIT *uptr) {
case CON_INCH2: /* 0xf0 */ /* INCH command */
uptr->CMD &= LMASK; /* nothing left, command complete */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvo INCH unit %02x: CMD %08x cmd %02x incnt %02x u4 %02x\n",
unit, uptr->CMD, cmd, con_data[unit].incnt, uptr->u4);
@ -288,13 +291,13 @@ t_stat con_srvo(UNIT *uptr) {
if ((tstart == SCPE_MEM) || (tstart == SCPE_ARG)) { /* any error */
/* we have error, bail out */
uptr->SNS |= SNS_CMDREJ;
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvo INCH Error unit %02x: CMD %08x cmd %02x incnt %02x u4 %02x\n",
unit, uptr->CMD, cmd, con_data[unit].incnt, uptr->u4);
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
break;
}
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvo INCH CMD %08x chsa %04x len %02x inch %06x\n", uptr->CMD, chsa, len, mema);
/* WARNING, if SNS_DEVEND is not set, diags fail by looping in CON diag */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
@ -302,7 +305,7 @@ t_stat con_srvo(UNIT *uptr) {
case CON_NOP: /* 0x03 */ /* NOP has do nothing */
uptr->CMD &= ~CON_MSK; /* remove old CMD */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvo NOP CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
break;
@ -310,7 +313,7 @@ t_stat con_srvo(UNIT *uptr) {
case CON_SNS: /* 0x04 */ /* Sense */
/* value 4 is Data Set Ready */
/* value 5 is Data carrier detected n/u */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvo cmd %04x: Cmd Sense %02x\n", chsa, uptr->SNS);
/* value 4 is Data Set Ready */
/* value 5 is Data carrier detected n/u */
@ -318,7 +321,7 @@ t_stat con_srvo(UNIT *uptr) {
if (chan_write_byte(chsa, &ch)) { /* write byte to memory */
/* write error */
cmd = 0; /* no cmd now */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvo write error unit %02x: CMD %08x read %02x u4 %02x ccw_count %02x\n",
unit, uptr->CMD, ch, uptr->u4, chp->ccw_count);
uptr->CMD &= LMASK; /* nothing left, command complete */
@ -340,7 +343,7 @@ t_stat con_srvo(UNIT *uptr) {
cnt++; /* count chars output */
}
/* write is complete, post status */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvo write CMD %08x chsa %04x cmd %02x complete\n",
uptr->CMD, chsa, cmd);
uptr->CMD &= LMASK; /* nothing left, command complete */
@ -353,6 +356,7 @@ t_stat con_srvo(UNIT *uptr) {
/* Handle input transfers for console */
t_stat con_srvi(UNIT *uptr) {
DEVICE *dptr = uptr->dptr;
uint16 chsa = GET_UADDR(uptr->CMD);
int unit = (uptr - con_unit); /* unit 0 is read, unit 1 is write */
int cmd = uptr->CMD & CON_MSK;
@ -364,10 +368,6 @@ t_stat con_srvi(UNIT *uptr) {
t_stat r;
int32 wait_time=10000;
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi enter CMD %08x chsa %04x cmd %02x incnt %02x u4 %02x\n",
uptr->CMD, chsa, cmd, con_data[unit].incnt, uptr->u4);
switch (cmd) {
/* if output tried to input device, error */
@ -376,14 +376,14 @@ t_stat con_srvi(UNIT *uptr) {
/* if input requested for output device, give error */
uptr->SNS |= SNS_CMDREJ; /* command rejected */
uptr->CMD &= LMASK; /* nothing left, command complete */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi Write to input device CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
chan_end(chsa, SNS_CHNEND|SNS_UNITCHK); /* unit check */
break;
case CON_INCH2: /* 0xf0 */ /* INCH command */
uptr->CMD &= LMASK; /* nothing left, command complete */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi INCH unit %02x: CMD %08x cmd %02x incnt %02x u4 %02x\n",
unit, uptr->CMD, cmd, con_data[unit].incnt, uptr->u4);
@ -392,7 +392,7 @@ t_stat con_srvi(UNIT *uptr) {
if ((tstart == SCPE_MEM) || (tstart == SCPE_ARG)) { /* any error */
/* we have error, bail out */
uptr->SNS |= SNS_CMDREJ;
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi INCH Error unit %02x: CMD %08x cmd %02x incnt %02x u4 %02x\n",
unit, uptr->CMD, cmd, con_data[unit].incnt, uptr->u4);
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
@ -400,7 +400,7 @@ t_stat con_srvi(UNIT *uptr) {
}
con_data[unit].incnt = 0; /* buffer empty */
uptr->u4 = 0; /* no I/O yet */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi INCH CMD %08x chsa %04x len %02x inch %06x\n", uptr->CMD, chsa, len, mema);
/* WARNING, if SNS_DEVEND is not set, diags fail by looping in CON diag */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
@ -409,7 +409,7 @@ t_stat con_srvi(UNIT *uptr) {
case CON_NOP: /* 0x03 */ /* NOP has do nothing */
uptr->CMD &= ~CON_MSK; /* remove old CMD */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi NOP CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
/* drop through to poll input */
@ -417,7 +417,7 @@ t_stat con_srvi(UNIT *uptr) {
case CON_CON: /* 0x1f */ /* Connect, return Data Set ready */
uptr->SNS |= (SNS_DSR|SNS_DCD); /* Data set ready, Data Carrier detected */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi CON CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
uptr->CMD &= ~CON_MSK; /* remove old CMD */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
@ -425,14 +425,14 @@ t_stat con_srvi(UNIT *uptr) {
case CON_DIS: /* 0x23 */ /* Disconnect has do nothing */
uptr->SNS &= ~(SNS_DSR|SNS_DCD); /* Data set not ready */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi DIS CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
uptr->CMD &= ~CON_MSK; /* remove old CMD */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
break;
case CON_SNS: /* 0x04 */ /* Sense */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi cmd %04x: Cmd Sense %02x\n", chsa, uptr->SNS);
/* value 4 is Data Set Ready */
/* value 5 is Data carrier detected n/u */
@ -440,7 +440,7 @@ t_stat con_srvi(UNIT *uptr) {
if (chan_write_byte(chsa, &ch)) { /* write byte to memory */
/* write error */
cmd = 0; /* no cmd now */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi write error unit %02x: CMD %08x read %02x u4 %02x ccw_count %02x\n",
unit, uptr->CMD, ch, uptr->u4, chp->ccw_count);
uptr->CMD &= LMASK; /* nothing left, command complete */
@ -459,7 +459,7 @@ t_stat con_srvi(UNIT *uptr) {
if ((uptr->u4 != con_data[unit].incnt) || /* input empty */
(uptr->CMD & CON_INPUT)) { /* input waiting? */
ch = con_data[unit].ibuff[uptr->u4]; /* get char from read buffer */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi readbuf unit %02x: CMD %08x read %02x incnt %02x u4 %02x len %02x\n",
unit, uptr->CMD, ch, con_data[unit].incnt, uptr->u4, chp->ccw_count);
@ -472,7 +472,7 @@ t_stat con_srvi(UNIT *uptr) {
if (chan_write_byte(chsa, &ch)) { /* write byte to memory */
/* write error */
cmd = 0; /* no cmd now */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi write error unit %02x: CMD %08x read %02x u4 %02x ccw_count %02x\n",
unit, uptr->CMD, ch, uptr->u4, chp->ccw_count);
uptr->CMD &= ~CON_MSK; /* remove old CMD */
@ -483,7 +483,7 @@ t_stat con_srvi(UNIT *uptr) {
/* character accepted, bump buffer pointer */
uptr->u4++; /* next char position */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi write to mem unit %02x: CMD %08x read %02x u4 %02x incnt %02x\n",
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt);
@ -493,7 +493,7 @@ t_stat con_srvi(UNIT *uptr) {
/* user want more data? */
if ((test_write_byte_end(chsa)) == 0) {
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi need more unit %02x CMD %08x u4 %02x ccw_count %02x incnt %02x\n",
unit, uptr->CMD, uptr->u4, chp->ccw_count, con_data[unit].incnt);
/* user wants more, look next time */
@ -506,10 +506,10 @@ t_stat con_srvi(UNIT *uptr) {
break;
}
/* command is completed */
sim_debug(DEBUG_CMD, dptr,
"con_srvi read done unit %02x uptr %p CMD %08x read %02x u4 %02x ccw_count %02x incnt %02x\n",
unit, uptr, uptr->CMD, ch, uptr->u4, chp->ccw_count, con_data[unit].incnt);
cmd = 0; /* no cmd now */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi read done unit %02x CMD %08x read %02x u4 %02x ccw_count %02x incnt %02x\n",
unit, uptr->CMD, ch, uptr->u4, chp->ccw_count, con_data[unit].incnt);
uptr->CMD &= LMASK; /* nothing left, command complete */
if (uptr->u4 != con_data[unit].incnt) { /* input empty */
uptr->CMD |= CON_INPUT; /* input still available */
@ -538,7 +538,7 @@ t_stat con_srvi(UNIT *uptr) {
if (ch == '\n') /* convert newline */
ch = '\r'; /* make newline into carriage return */
#endif
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi handle readch unit %02x: CMD %08x read %02x u4 %02x incnt %02x r %x\n",
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt, r);
@ -550,7 +550,7 @@ t_stat con_srvi(UNIT *uptr) {
con_data[unit].incnt = 0; /* reset buffer cnt */
uptr->CMD |= CON_INPUT; /* we have a char available */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi readch unit %02x: CMD %08x read %02x u4 %02x incnt %02x\n",
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt);
sim_activate(uptr, 400); /* do this again */
@ -577,7 +577,7 @@ t_stat con_srvi(UNIT *uptr) {
uptr->CMD &= ~CON_ATAT; /* no @@A input */
sim_putchar('\r'); /* return char */
sim_putchar('\n'); /* line feed char */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi unit %02x: CMD %08x read @@A Console Trap\n", unit, uptr->CMD);
uptr->u4 = 0; /* no input count */
con_data[unit].incnt = 0; /* no input data */
@ -605,7 +605,7 @@ t_stat con_srvi(UNIT *uptr) {
con_data[unit].ibuff[con_data[unit].incnt++] = ch;
uptr->CMD |= CON_INPUT; /* we have a char available */
sim_debug(DEBUG_CMD, &con_dev,
sim_debug(DEBUG_CMD, dptr,
"con_srvi readch2 unit %02x: CMD %08x read %02x u4 %02x incnt %02x r %x\n",
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt, r);
}
@ -619,7 +619,7 @@ t_stat con_reset(DEVICE *dptr) {
}
/* Handle rschnlio cmds for console */
uint16 con_rschnlio(UNIT *uptr) {
t_stat con_rschnlio(UNIT *uptr) {
uint16 chsa = GET_UADDR(uptr->CMD);
int cmd = uptr->CMD & CON_MSK;
con_ini(uptr, 0); /* reset the unit */
@ -628,7 +628,7 @@ uint16 con_rschnlio(UNIT *uptr) {
}
/* Handle haltio transfers for console */
uint16 con_haltio(UNIT *uptr) {
t_stat con_haltio(UNIT *uptr) {
uint16 chsa = GET_UADDR(uptr->CMD);
int cmd = uptr->CMD & CON_MSK;
int unit = (uptr - con_unit); /* unit # 0 is read, 1 is write */

78
SEL32/sel32_cpu.c
View File

@ -1879,6 +1879,14 @@ wait_loop:
//JB return reason;
//JB break; /* process */
}
#else
else {
sim_debug(DEBUG_EXP, &cpu_dev,
"Process Event other reason %08x interval %08x\n",
reason, sim_interval);
return reason;
break; /* process */
}
#endif
}
}
@ -1962,9 +1970,69 @@ wait_loop:
goto wait_loop; /* continue waiting */
}
//#define NEW_WAIT
#ifdef NEW_WAIT
/* process IOCL entries that are waiting */
/* loop through the IOCL ready Q and decrement wait counts */
if ((int32c = RDYQ_Num())) {
int32 i, rqo = RDYQOUT;
for (i=0; i<int32c; i++) {
uint32 chsa = 0; /* channel/sub adddress */
CHANP *chp; /* get channel prog pointer */
if (RDYQ_Get(&chsa) == SCPE_OK) { /* get chsa for program */
// chsa = RDYQ[rqo]; /* get the next entry */
}
if (chsa == 0) /* ignore unused entries */
continue;
chp = find_chanp_ptr(chsa); /* get channel prog pointer */
if (chp == NULL) /* ignore unused entries */
continue;
if (chp->chan_byte != BUFF_NEXT) {
/* if not BUFF_NEXT, channel has been stopped, do nothing */
sim_debug(DEBUG_XIO, &cpu_dev,
"scan_chan Bad CPU RDYQ entry for chsa %04x chan_byte %02x\n",
chsa, chp->chan_byte);
/* not BUFF_NEXT, just zero entry */
continue; /* ignore the entry */
}
/* state is BUFF_NEXT, see if wait is over */
if (wait4int)
chp->chan_qwait = 0; /* doing nothing, so do it now */
if (chp->chan_qwait > 0) /* still waiting? */
chp->chan_qwait--; /* decrement count */
/* process 0 wait entry */
if (chp->chan_qwait == 0) {
int32 stat;
sim_debug(DEBUG_XIO, &cpu_dev,
"scan_chan CPU RDYQ entry for chsa %04x starting byte %02x\n",
chsa, chp->chan_byte);
/* if not BUFF_NEXT, channel has been stopped, do nothing */
stat = cont_chan(chsa); /* resume the channel program */
if (stat == SCPE_OK)
sim_debug(DEBUG_XIO, &cpu_dev,
"scan_chan CPU RDYQ entry for chsa %04x processed byte %04x\n",
chsa, chp->chan_byte);
else
sim_debug(DEBUG_XIO, &cpu_dev,
"scan_chan CPU RDYQ entry for chsa %04x processed w/error byte %04x\n",
chsa, chp->chan_byte);
irq_pend = 1; /* start scanning interrupts again */
continue;
} else
RDYQ_Put(chsa); /* requeue the non-zero entry */
rqo++; /* next queue entry */
rqo %= RDYQ_SIZE; /* don't overrun end */
}
}
#endif
/* we get here when not booting */
/* process any pending interrupts */
if ((irq_pend || wait4int) && (irq_auto == 0)) { /* see if ints are pending */
#ifdef NEW_WAIT
if ((irq_pend || wait4int) && (RDYQ_Num() == 0) && (irq_auto == 0)) {
#else
if ((irq_pend || wait4int) && (irq_auto == 0)) {
#endif
/* see if ints are pending */
uint32 ilev;
uint32 oldstatus = CPUSTATUS; /* keep for retain blocking state */
SPAD[0xf9] = CPUSTATUS; /* save the cpu status in SPAD */
@ -2076,6 +2144,7 @@ wait_loop:
}
}
#ifndef NEW_WAIT
/* process IOCL entries that are waiting */
/* loop through the IOCL ready Q and decrement wait counts */
if ((int32c = RDYQ_Num())) {
@ -2126,9 +2195,14 @@ wait_loop:
rqo %= RDYQ_SIZE; /* don't overrun end */
}
}
#endif
/* see if in wait instruction */
if (wait4int) { /* keep waiting */
#ifdef NEW_WAIT
if (RDYQ_Num())
goto wait_loop; /* continue waiting */
#endif
/* tell simh we will be waiting */
sim_idle(TMR_RTC, 1); /* wait for clock tick */
irq_pend = 1; /* start scanning interrupts again */
@ -2651,9 +2725,11 @@ exec:
"Starting WAIT mode %08x\n", (uint32)result);
}
wait4int = 1; /* show we are waiting for interrupt */
#ifndef NEW_WAIT
/* tell simh we will be waiting */
sim_idle(TMR_RTC, 0); /* wait for next pending device event */
irq_pend = 1; /* start scanning interrupts again */
#endif
i_flags |= BT; /* keep PC from being incremented while waiting */
break;
case 0x2: /* NOP */

16
SEL32/sel32_defs.h
View File

@ -252,21 +252,21 @@ extern int32 IOCLQ_Num(IOCLQ *qptr);
typedef struct dib {
/* Pre start I/O operation */
uint16 (*pre_io)(UNIT *uptr, uint16 chan);
t_stat (*pre_io)(UNIT *uptr, uint16 chan);
/* Start a channel command SIO */
uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd);
t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd);
/* Halt I/O HIO */
uint16 (*halt_io)(UNIT *uptr); /* Halt I/O */
t_stat (*halt_io)(UNIT *uptr); /* Halt I/O */
/* Test I/O STOPIO */
uint16 (*stop_io)(UNIT *uptr); /* Stop I/O */
t_stat (*stop_io)(UNIT *uptr); /* Stop I/O */
/* Test I/O TESTIO */
uint16 (*test_io)(UNIT *uptr); /* Test I/O */
t_stat (*test_io)(UNIT *uptr); /* Test I/O */
/* Reset Controller RSCTL */
uint16 (*rsctl_io)(UNIT *uptr); /* Reset Controller */
t_stat (*rsctl_io)(UNIT *uptr); /* Reset Controller */
/* Reset Controller RSCHNL */
uint16 (*rschnl_io)(UNIT *uptr); /* Reset Channel */
t_stat (*rschnl_io)(UNIT *uptr); /* Reset Channel */
/* Post I/O processing */
uint16 (*iocl_io)(CHANP *chp, int32 tic_ok); /* IOCL processing */
t_stat (*iocl_io)(CHANP *chp, int32 tic_ok); /* IOCL processing */
/* Controller init */
void (*dev_ini)(UNIT *, t_bool); /* init function */
UNIT *units; /* Pointer to units structure */

52
SEL32/sel32_disk.c
View File

@ -385,14 +385,14 @@ disk_type[] =
{NULL, 0}
};
uint16 disk_preio(UNIT *uptr, uint16 chan) ;
uint16 disk_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) ;
uint16 disk_haltio(UNIT *uptr);
uint16 disk_iocl(CHANP *chp, int32 tic_ok);
t_stat disk_preio(UNIT *uptr, uint16 chan) ;
t_stat disk_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) ;
t_stat disk_haltio(UNIT *uptr);
t_stat disk_iocl(CHANP *chp, int32 tic_ok);
t_stat disk_srv(UNIT *uptr);
t_stat disk_boot(int32 unitnum, DEVICE *dptr);
void disk_ini(UNIT *, t_bool);
uint16 disk_rschnlio(UNIT *uptr);
t_stat disk_rschnlio(UNIT *uptr);
t_stat disk_reset(DEVICE *);
t_stat disk_attach(UNIT *, CONST char *);
t_stat disk_detach(UNIT *);
@ -447,14 +447,14 @@ UNIT dda_unit[] = {
};
DIB dda_dib = {
disk_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
disk_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
disk_haltio, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
disk_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
disk_iocl, /* uint16 (*iocl_io)(CHANP *chp, int32 tik_ok)) */ /* Process IOCL */
disk_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
disk_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
disk_haltio, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
disk_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
disk_iocl, /* t_stat (*iocl_io)(CHANP *chp, int32 tik_ok)) */ /* Process IOCL */
disk_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
dda_unit, /* UNIT* units */ /* Pointer to units structure */
dda_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -493,14 +493,14 @@ UNIT ddb_unit[] = {
};
DIB ddb_dib = {
disk_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
disk_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
disk_haltio, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
disk_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
disk_iocl, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
disk_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
disk_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
disk_haltio, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
disk_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
disk_iocl, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
disk_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
ddb_unit, /* UNIT* units */ /* Pointer to units structure */
ddb_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -703,7 +703,7 @@ uint32 get_dmatrk(UNIT *uptr, uint32 star, uint8 buf[])
}
/* start a disk operation */
uint16 disk_preio(UNIT *uptr, uint16 chan)
t_stat disk_preio(UNIT *uptr, uint16 chan)
{
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
@ -721,7 +721,7 @@ uint16 disk_preio(UNIT *uptr, uint16 chan)
/* load in the IOCD and process the commands */
/* return = 0 OK */
/* return = 1 error, chan_status will have reason */
uint16 disk_iocl(CHANP *chp, int32 tic_ok)
t_stat disk_iocl(CHANP *chp, int32 tic_ok)
{
uint32 word1 = 0;
uint32 word2 = 0;
@ -969,7 +969,7 @@ loop:
return 0; /* good return */
}
uint16 disk_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
t_stat disk_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
{
uint16 chsa = GET_UADDR(uptr->CMD);
DEVICE *dptr = get_dev(uptr);
@ -1074,7 +1074,7 @@ uint16 disk_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
}
/* Handle haltio transfers for disk */
uint16 disk_haltio(UNIT *uptr) {
t_stat disk_haltio(UNIT *uptr) {
uint16 chsa = GET_UADDR(uptr->CMD);
DEVICE *dptr = get_dev(uptr);
int cmd = uptr->CMD & DSK_CMDMSK;
@ -2664,7 +2664,7 @@ iha_error:
}
/* handle rschnlio cmds for disk */
uint16 disk_rschnlio(UNIT *uptr) {
t_stat disk_rschnlio(UNIT *uptr) {
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
int cmd = uptr->CMD & DSK_CMDMSK;

42
SEL32/sel32_ec.c
View File

@ -204,7 +204,7 @@ struct ec_device {
int amc; /* Recieve all multicast packets */
uint32 rx_count; /* Packets received */
uint32 tx_count; /* Packets sent */
uint16 drop_cnt; /* Packets dropped */
t_stat drop_cnt; /* Packets dropped */
int r_pkt; /* Packet pending */
int poll; /* Need to poll receiver */
int lp_rdy; /* Loop back packet ready */
@ -224,17 +224,17 @@ static CONST ETH_MAC broadcast_ethaddr = {0xff,0xff,0xff,0xff,0xff,0xff};
CHANP ec_chp[NUM_UNITS_ETHER] = {0};
/* forward definitions */
uint16 ec_preio(UNIT *uptr, uint16 chan);
uint16 ec_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
t_stat ec_preio(UNIT *uptr, uint16 chan);
t_stat ec_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
t_stat ec_rec_srv(UNIT *uptr);
t_stat ec_srv(UNIT *uptr);
uint16 ec_haltio(UNIT *uptr);
uint16 ec_iocl(CHANP *chp, int32 tic_ok);
t_stat ec_haltio(UNIT *uptr);
t_stat ec_iocl(CHANP *chp, int32 tic_ok);
void ec_packet_debug(struct ec_device *ec, const char *action, ETH_PACK *packet);
t_stat ec_reset (DEVICE *dptr);
void ec_ini(UNIT *, t_bool);
uint16 ec_rsctrl(UNIT *uptr);
uint16 ec_rschnlio(UNIT *uptr);
t_stat ec_rsctrl(UNIT *uptr);
t_stat ec_rschnlio(UNIT *uptr);
t_stat ec_show_mac (FILE* st, UNIT* uptr, int32 val, CONST void* desc);
t_stat ec_set_mac (UNIT* uptr, int32 val, CONST char* cptr, void* desc);
t_stat ec_show_mode (FILE* st, UNIT* uptr, int32 val, CONST void* desc);
@ -278,14 +278,14 @@ UNIT ec_unit[] = {
};
DIB ec_dib = {
ec_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
ec_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
ec_haltio, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
ec_rsctrl, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
ec_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
ec_iocl, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
ec_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
ec_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
ec_haltio, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
ec_rsctrl, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
ec_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
ec_iocl, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
ec_ini, /* void (*dev_ini)(UNIT *uptr) */ /* init function */
ec_unit, /* UNIT *units */ /* Pointer to units structure */
ec_chp, /* CHANP *chan_prg */ /* Pointer to chan_prg structure */
@ -342,7 +342,7 @@ DEVICE ec_dev = {
/* load in the IOCD and process the commands */
/* return = 0 OK */
/* return = 1 error, chan_status will have reason */
uint16 ec_iocl(CHANP *chp, int32 tic_ok)
t_stat ec_iocl(CHANP *chp, int32 tic_ok)
{
uint32 word1 = 0;
uint32 word2 = 0;
@ -664,7 +664,7 @@ loop:
}
/* start an ethernet operation */
uint16 ec_preio(UNIT *uptr, uint16 chan) {
t_stat ec_preio(UNIT *uptr, uint16 chan) {
DEVICE *dptr = get_dev(uptr);
int unit = (uptr - dptr->units);
uint16 chsa = GET_UADDR(uptr->CMD);
@ -683,7 +683,7 @@ uint16 ec_preio(UNIT *uptr, uint16 chan) {
}
/* Start ethernet command */
uint16 ec_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
t_stat ec_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
{
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
@ -1350,7 +1350,7 @@ wr_end:
}
/* Handle haltio transfers for ethernet */
uint16 ec_haltio(UNIT *uptr) {
t_stat ec_haltio(UNIT *uptr) {
uint16 chsa = GET_UADDR(uptr->CMD);
DEVICE *dptr = get_dev(uptr);
int cmd = uptr->CMD & EC_CMDMSK;
@ -1416,7 +1416,7 @@ void ec_ini(UNIT *uptr, t_bool f)
}
/* handle reset controller cmds for Ethernet */
uint16 ec_rsctrl(UNIT *uptr) {
t_stat ec_rsctrl(UNIT *uptr) {
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
int cmd = uptr->CMD & EC_CMDMSK;
@ -1434,7 +1434,7 @@ uint16 ec_rsctrl(UNIT *uptr) {
}
/* handle reset channel cmds for Ethernet */
uint16 ec_rschnlio(UNIT *uptr) {
t_stat ec_rschnlio(UNIT *uptr) {
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
int cmd = uptr->CMD & EC_CMDMSK;

54
SEL32/sel32_hsdp.c
View File

@ -518,11 +518,11 @@ hsdp_type[] =
{NULL}
};
uint16 hsdp_preio(UNIT *uptr, uint16 chan) ;
uint16 hsdp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) ;
uint16 hsdp_haltio(UNIT *uptr);
uint16 hsdp_rsctl(UNIT *uptr);
uint16 hsdp_iocl(CHANP *chp, int32 tic_ok);
t_stat hsdp_preio(UNIT *uptr, uint16 chan) ;
t_stat hsdp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) ;
t_stat hsdp_haltio(UNIT *uptr);
t_stat hsdp_rsctl(UNIT *uptr);
t_stat hsdp_iocl(CHANP *chp, int32 tic_ok);
t_stat hsdp_srv(UNIT *);
t_stat hsdp_boot(int32 unitnum, DEVICE *);
void hsdp_ini(UNIT *, t_bool);
@ -583,14 +583,14 @@ UNIT dpa_unit[] = {
};
DIB dpa_dib = {
hsdp_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
hsdp_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
hsdp_haltio, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
hsdp_haltio, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
hsdp_rsctl, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
hsdp_iocl, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
hsdp_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
hsdp_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
hsdp_haltio, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
hsdp_haltio, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
hsdp_rsctl, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
hsdp_iocl, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
hsdp_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
dpa_unit, /* UNIT* units */ /* Pointer to units structure */
dpa_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -632,14 +632,14 @@ UNIT dpb_unit[] = {
DIB dpb_dib = {
hsdp_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
hsdp_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
hsdp_haltio, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
hsdp_haltio, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
hsdp_rsctl, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
hsdp_iocl, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
hsdp_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
hsdp_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
hsdp_haltio, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
hsdp_haltio, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
hsdp_rsctl, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
hsdp_iocl, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
hsdp_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
dpb_unit, /* UNIT* units */ /* Pointer to units structure */
dpb_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -825,7 +825,7 @@ uint32 get_dpatrk(UNIT *uptr, uint32 star, uint8 buf[])
}
/* start a disk operation */
uint16 hsdp_preio(UNIT *uptr, uint16 chan)
t_stat hsdp_preio(UNIT *uptr, uint16 chan)
{
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
@ -852,7 +852,7 @@ uint16 hsdp_preio(UNIT *uptr, uint16 chan)
/* load in the IOCD and process the commands */
/* return = 0 OK */
/* return = 1 error, chan_status will have reason */
uint16 hsdp_iocl(CHANP *chp, int32 tic_ok)
t_stat hsdp_iocl(CHANP *chp, int32 tic_ok)
{
uint32 word1 = 0;
uint32 word2 = 0;
@ -1091,7 +1091,7 @@ loop:
return 0; /* good return */
}
uint16 hsdp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
t_stat hsdp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
{
uint16 chsa = GET_UADDR(uptr->CMD);
DEVICE *dptr = get_dev(uptr);
@ -1189,7 +1189,7 @@ uint16 hsdp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
}
/* Handle haltio transfers for disk */
uint16 hsdp_haltio(UNIT *uptr) {
t_stat hsdp_haltio(UNIT *uptr) {
uint16 chsa = GET_UADDR(uptr->CMD);
DEVICE *dptr = get_dev(uptr);
int cmd = uptr->CMD & DSK_CMDMSK;
@ -1224,7 +1224,7 @@ uint16 hsdp_haltio(UNIT *uptr) {
}
/* Handle rsctl command for disk */
uint16 hsdp_rsctl(UNIT *uptr) {
t_stat hsdp_rsctl(UNIT *uptr) {
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
int cmd = uptr->CMD & DSK_CMDMSK;
@ -2961,7 +2961,7 @@ void hsdp_ini(UNIT *uptr, t_bool f)
}
/* handle rschnlio cmds for hsdp */
uint16 hsdp_rschnlio(UNIT *uptr) {
t_stat hsdp_rschnlio(UNIT *uptr) {
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
int cmd = uptr->CMD & DSK_CMDMSK;

28
SEL32/sel32_iop.c
View File

@ -38,10 +38,10 @@
#define UNIT_IOP UNIT_IDLE | UNIT_DISABLE
/* forward definitions */
uint16 iop_preio(UNIT *uptr, uint16 chan);
uint16 iop_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
t_stat iop_preio(UNIT *uptr, uint16 chan);
t_stat iop_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
void iop_ini(UNIT *uptr, t_bool f);
uint16 iop_rschnlio(UNIT *uptr);
t_stat iop_rschnlio(UNIT *uptr);
t_stat iop_srv(UNIT *uptr);
t_stat iop_reset(DEVICE *dptr);
t_stat iop_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
@ -100,14 +100,14 @@ UNIT iop_unit[] = {
};
DIB iop_dib = {
iop_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
iop_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command SIO */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O HIO */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O HIO */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O TIO */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
iop_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
iop_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
iop_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command SIO */
NULL, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O HIO */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O HIO */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O TIO */
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
iop_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
iop_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
iop_unit, /* UNIT* units */ /* Pointer to units structure */
iop_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -145,7 +145,7 @@ void iop_ini(UNIT *uptr, t_bool f)
}
/* handle rschnlio cmds for iop */
uint16 iop_rschnlio(UNIT *uptr) {
t_stat iop_rschnlio(UNIT *uptr) {
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->u3);
int cmd = uptr->u3 & IOP_MSK;
@ -157,7 +157,7 @@ uint16 iop_rschnlio(UNIT *uptr) {
}
/* start an iop operation */
uint16 iop_preio(UNIT *uptr, uint16 chan) {
t_stat iop_preio(UNIT *uptr, uint16 chan) {
DEVICE *dptr = get_dev(uptr);
int unit = (uptr - dptr->units);
uint16 chsa = GET_UADDR(uptr->u3);
@ -176,7 +176,7 @@ uint16 iop_preio(UNIT *uptr, uint16 chan) {
}
/* start an I/O operation */
uint16 iop_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
t_stat iop_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
{
sim_debug(DEBUG_CMD, &iop_dev,
"IOP startcmd %02x controller/device %04x\n",

28
SEL32/sel32_lpr.c
View File

@ -141,10 +141,10 @@ struct _lpr_data
struct _lpr_data lpr_data[NUM_DEVS_LPR];
/* forward definitions */
uint16 lpr_preio(UNIT *uptr, uint16 chan);
uint16 lpr_startcmd(UNIT *, uint16, uint8);
t_stat lpr_preio(UNIT *uptr, uint16 chan);
t_stat lpr_startcmd(UNIT *, uint16, uint8);
void lpr_ini(UNIT *, t_bool);
uint16 lpr_rschnlio(UNIT *uptr);
t_stat lpr_rschnlio(UNIT *uptr);
t_stat lpr_srv(UNIT *);
t_stat lpr_reset(DEVICE *);
t_stat lpr_attach(UNIT *, CONST char *);
@ -172,14 +172,14 @@ UNIT lpr_unit[] = {
/* Device Information Block */
DIB lpr_dib = {
lpr_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
lpr_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
lpr_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
lpr_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
lpr_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
lpr_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
lpr_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
lpr_unit, /* UNIT* units */ /* Pointer to units structure */
lpr_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -210,7 +210,7 @@ void lpr_ini(UNIT *uptr, t_bool f) {
}
/* handle rschnlio cmds for lpr */
uint16 lpr_rschnlio(UNIT *uptr) {
t_stat lpr_rschnlio(UNIT *uptr) {
DEVICE *dptr = get_dev(uptr); /* get device pointer */
uint16 chsa = GET_UADDR(uptr->CMD);
int cmd = uptr->CMD & LPR_CMDMSK;
@ -222,7 +222,7 @@ uint16 lpr_rschnlio(UNIT *uptr) {
}
/* start a line printer operation */
uint16 lpr_preio(UNIT *uptr, uint16 chan) {
t_stat lpr_preio(UNIT *uptr, uint16 chan) {
DEVICE *dptr = get_dev(uptr);
int unit = (uptr - dptr->units);
uint16 chsa = GET_UADDR(uptr->CMD);
@ -241,7 +241,7 @@ uint16 lpr_preio(UNIT *uptr, uint16 chan) {
}
/* start an I/O operation */
uint16 lpr_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
t_stat lpr_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
{
DEVICE *dptr = get_dev(uptr); /* get device pointer */

28
SEL32/sel32_mfp.c
View File

@ -39,10 +39,10 @@
#define UNIT_MFP UNIT_IDLE | UNIT_DISABLE
/* forward definitions */
uint16 mfp_preio(UNIT *uptr, uint16 chan);
uint16 mfp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
t_stat mfp_preio(UNIT *uptr, uint16 chan);
t_stat mfp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
void mfp_ini(UNIT *uptr, t_bool f);
uint16 mfp_rschnlio(UNIT *uptr);
t_stat mfp_rschnlio(UNIT *uptr);
t_stat mfp_srv(UNIT *uptr);
t_stat mfp_reset(DEVICE *dptr);
t_stat mfp_help(FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, const char *cptr);
@ -104,14 +104,14 @@ UNIT mfp_unit[] = {
//DIB mfp_dib = {NULL, mfp_startcmd, NULL, NULL, NULL, mfp_ini, mfp_unit, mfp_chp, NUM_UNITS_MFP, 0xff, 0x7600,0,0,0};
DIB mfp_dib = {
mfp_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
mfp_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O HIO */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O HIO */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O TIO */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
mfp_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
mfp_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
mfp_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O HIO */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O HIO */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O TIO */
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
mfp_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
mfp_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
mfp_unit, /* UNIT* units */ /* Pointer to units structure */
mfp_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -149,7 +149,7 @@ void mfp_ini(UNIT *uptr, t_bool f)
}
/* handle rschnlio cmds for disk */
uint16 mfp_rschnlio(UNIT *uptr) {
t_stat mfp_rschnlio(UNIT *uptr) {
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->u3);
int cmd = uptr->u3 & MFP_MSK;
@ -161,7 +161,7 @@ uint16 mfp_rschnlio(UNIT *uptr) {
}
/* start an mfp operation */
uint16 mfp_preio(UNIT *uptr, uint16 chan) {
t_stat mfp_preio(UNIT *uptr, uint16 chan) {
DEVICE *dptr = get_dev(uptr);
int unit = (uptr - dptr->units);
uint16 chsa = GET_UADDR(uptr->u3);
@ -180,7 +180,7 @@ uint16 mfp_preio(UNIT *uptr, uint16 chan) {
}
/* start an I/O operation */
uint16 mfp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
t_stat mfp_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
{
sim_debug(DEBUG_CMD, &mfp_dev,
"MFP startcmd %02x controller/device %04x\n",

44
SEL32/sel32_mt.c
View File

@ -153,12 +153,12 @@
#define CLR_BUF(u) u->hwmark = 0xFFFFFFFF
/* forward definitions */
uint16 mt_preio(UNIT *uptr, uint16 chan);
uint16 mt_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) ;
t_stat mt_preio(UNIT *uptr, uint16 chan);
t_stat mt_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) ;
t_stat mt_srv(UNIT *uptr);
t_stat mt_boot(int32 unitnum, DEVICE *dptr);
void mt_ini(UNIT *uptr, t_bool);
uint16 mt_rschnlio(UNIT *uptr);
t_stat mt_rschnlio(UNIT *uptr);
t_stat mt_reset(DEVICE *dptr);
t_stat mt_attach(UNIT *uptr, CONST char *);
t_stat mt_detach(UNIT *uptr);
@ -298,14 +298,14 @@ UNIT mta_unit[] = {
CHANP mta_chp[NUM_UNITS_MT] = {0};
DIB mta_dib = {
mt_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
mt_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
mt_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
mt_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
mt_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
mt_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
mt_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
mta_unit, /* UNIT* units */ /* Pointer to units structure */
mta_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -346,14 +346,14 @@ UNIT mtb_unit[] = {
/* device information block */
DIB mtb_dib = {
mt_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
mt_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
mt_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
mt_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
mt_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
mt_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
mt_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
mtb_unit, /* UNIT* units */ /* Pointer to units structure */
mtb_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -377,7 +377,7 @@ DEVICE mtb_dev = {
#endif
/* start a tape operation */
uint16 mt_preio(UNIT *uptr, uint16 chan) {
t_stat mt_preio(UNIT *uptr, uint16 chan) {
DEVICE *dptr = get_dev(uptr);
int unit = (uptr - dptr->units);
uint16 chsa = GET_UADDR(uptr->CMD);
@ -403,7 +403,7 @@ uint16 mt_preio(UNIT *uptr, uint16 chan) {
}
/* start an I/O operation */
uint16 mt_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
t_stat mt_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
{
uint16 chsa = GET_UADDR(uptr->CMD);
DEVICE *dptr = get_dev(uptr);
@ -1172,7 +1172,7 @@ void mt_ini(UNIT *uptr, t_bool f)
}
/* handle rschnlio cmds for tape */
uint16 mt_rschnlio(UNIT *uptr) {
t_stat mt_rschnlio(UNIT *uptr) {
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
int cmd = uptr->CMD & MT_CMDMSK;

52
SEL32/sel32_scfi.c
View File

@ -267,14 +267,14 @@ scfi_type[] =
{NULL, 0}
};
uint16 scfi_preio(UNIT *uptr, uint16 chan);
uint16 scfi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
uint16 scfi_haltio(UNIT *uptr);
uint16 scfi_iocl(CHANP *chp, int32 tic_ok);
t_stat scfi_preio(UNIT *uptr, uint16 chan);
t_stat scfi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
t_stat scfi_haltio(UNIT *uptr);
t_stat scfi_iocl(CHANP *chp, int32 tic_ok);
t_stat scfi_srv(UNIT *uptr);
t_stat scfi_boot(int32 unitnum, DEVICE *dptr);
void scfi_ini(UNIT *, t_bool);
uint16 scfi_rschnlio(UNIT *uptr);
t_stat scfi_rschnlio(UNIT *uptr);
t_stat scfi_reset(DEVICE *);
t_stat scfi_attach(UNIT *, CONST char *);
t_stat scfi_detach(UNIT *);
@ -313,14 +313,14 @@ UNIT sda_unit[] = {
};
DIB sda_dib = {
scfi_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
scfi_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
scfi_haltio, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
scfi_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
scfi_iocl, /* uint16 (*iocl_io)(CHANP *chp, int32 tik_ok)) */ /* Process IOCL */
scfi_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
scfi_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
scfi_haltio, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
scfi_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
scfi_iocl, /* t_stat (*iocl_io)(CHANP *chp, int32 tik_ok)) */ /* Process IOCL */
scfi_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
sda_unit, /* UNIT* units */ /* Pointer to units structure */
sda_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -359,14 +359,14 @@ UNIT sdb_unit[] = {
};
DIB sdb_dib = {
scfi_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
scfi_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
scfi_haltio, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
scfi_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
scfi_iocl, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
scfi_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
scfi_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
scfi_haltio, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
scfi_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
scfi_iocl, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
scfi_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
sdb_unit, /* UNIT* units */ /* Pointer to units structure */
sdb_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -402,7 +402,7 @@ uint32 scfisec2star(uint32 daddr, int type)
}
/* start a disk operation */
uint16 scfi_preio(UNIT *uptr, uint16 chan)
t_stat scfi_preio(UNIT *uptr, uint16 chan)
{
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
@ -422,7 +422,7 @@ uint16 scfi_preio(UNIT *uptr, uint16 chan)
/* load in the IOCD and process the commands */
/* return = 0 OK */
/* return = 1 error, chan_status will have reason */
uint16 scfi_iocl(CHANP *chp, int32 tic_ok)
t_stat scfi_iocl(CHANP *chp, int32 tic_ok)
{
uint32 word1 = 0;
uint32 word2 = 0;
@ -665,7 +665,7 @@ loop:
return 0; /* good return */
}
uint16 scfi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
t_stat scfi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
{
uint16 chsa = GET_UADDR(uptr->CMD);
DEVICE *dptr = get_dev(uptr);
@ -760,7 +760,7 @@ uint16 scfi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
}
/* Handle haltio transfers for disk */
uint16 scfi_haltio(UNIT *uptr) {
t_stat scfi_haltio(UNIT *uptr) {
uint16 chsa = GET_UADDR(uptr->CMD);
DEVICE *dptr = get_dev(uptr);
int cmd = uptr->CMD & DSK_CMDMSK;
@ -1484,7 +1484,7 @@ t_stat scfi_srv(UNIT *uptr)
}
/* handle rschnlio cmds for disk */
uint16 scfi_rschnlio(UNIT *uptr) {
t_stat scfi_rschnlio(UNIT *uptr) {
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
int cmd = uptr->CMD & DSK_CMDMSK;

46
SEL32/sel32_scsi.c
View File

@ -283,13 +283,13 @@ scsi_type[] =
{NULL, 0}
};
uint16 scsi_preio(UNIT *uptr, uint16 chan);
uint16 scsi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
uint16 scsi_haltio(UNIT *uptr);
t_stat scsi_preio(UNIT *uptr, uint16 chan);
t_stat scsi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
t_stat scsi_haltio(UNIT *uptr);
t_stat scsi_srv(UNIT *);
t_stat scsi_boot(int32 unitnum, DEVICE *);
void scsi_ini(UNIT *, t_bool);
uint16 scsi_rschnlio(UNIT *uptr);
t_stat scsi_rschnlio(UNIT *uptr);
t_stat scsi_reset(DEVICE *);
t_stat scsi_attach(UNIT *, CONST char *);
t_stat scsi_detach(UNIT *);
@ -321,14 +321,14 @@ UNIT sba_unit[] = {
};
DIB sba_dib = {
scsi_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
scsi_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
scsi_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
scsi_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
scsi_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
scsi_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
scsi_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
sba_unit, /* UNIT* units */ /* Pointer to units structure */
sba_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -365,14 +365,14 @@ UNIT sbb_unit[] = {
//scsi_ini, sdb_unit, sdb_chp, NUM_UNITS_SCSI, 0x0f, 0x0c00, 0, 0, 0};
DIB sbb_dib = {
scsi_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
scsi_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
scsi_rschnlio, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
scsi_preio, /* t_stat (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
scsi_startcmd, /* t_stat (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* t_stat (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* t_stat (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* t_stat (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* t_stat (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
scsi_rschnlio, /* t_stat (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* t_stat (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
scsi_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
sbb_unit, /* UNIT* units */ /* Pointer to units structure */
sbb_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
@ -408,7 +408,7 @@ uint32 scsisec2star(uint32 daddr, int type)
}
/* start a disk operation */
uint16 scsi_preio(UNIT *uptr, uint16 chan)
t_stat scsi_preio(UNIT *uptr, uint16 chan)
{
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
@ -422,7 +422,7 @@ uint16 scsi_preio(UNIT *uptr, uint16 chan)
return 0; /* good to go */
}
uint16 scsi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
t_stat scsi_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
{
uint16 chsa = GET_UADDR(uptr->CMD);
DEVICE *dptr = get_dev(uptr);
@ -1326,7 +1326,7 @@ void scsi_ini(UNIT *uptr, t_bool f)
}
/* handle rschnlio cmds for scsi */
uint16 scsi_rschnlio(UNIT *uptr) {
t_stat scsi_rschnlio(UNIT *uptr) {
DEVICE *dptr = get_dev(uptr);
uint16 chsa = GET_UADDR(uptr->CMD);
int cmd = uptr->CMD & DSK_CMDMSK;

234
SEL32/taptools/tap2disk.c Normal file
View File

@ -0,0 +1,234 @@
/*
* tap2disk.c
*
* This program scans a metatape file and copies a file until EOF is found.
* input - specified filename
* output - specified filename
*/
#include <stdio.h>
#include <sys/file.h>
#include <stdlib.h>
#include <unistd.h>
#include <string.h>
#include <errno.h>
int filen = 1;
int EOFcnt = 0;
int count=0, lcount=0;
int size=0, tsize=0;
int oldsize, newsize;
FILE *outfp;
int inp;
int ln;
/* get a line of input. */
int getloi(char *s, int lim)
{
int c, i;
int n1, n2, hc, tc, n;
/* read the byte count in 32 bit word as header */
n1 = read(inp, (char *)(&hc), (size_t)4);
if (n1 <= 0) {
hc = -1; /* at EOM on disk file */
return hc; /* return EOM */
}
/* check for EOF & EOM on tape data */
if (hc & 0xffff0000) { /* check for garbage, assume EOF */
hc = -1; /* at EOM on disk file */
return hc; /* return EOM */
}
/* check for EOF & EOM on tape data */
if (hc == 0) {
/* we are at tape EOF */
if (++EOFcnt < 2) { /* if 1st EOF, print32_t file info */
if (ln > 0) {
if (count - lcount > 1)
fprintf(stderr, "file %d: records %d to %d: size %d\n", filen, lcount, count - 1, ln);
else
fprintf(stderr, "file %d: record %d: size %d\n", filen, lcount, ln);
}
fprintf(stderr, "file %d: EOF after %d records: %d bytes\n\n", filen, count, size);
filen++; /* set next file number */
} else {
fprintf(stderr, "second EOF after %d files: %d bytes\n", filen-1, tsize+size);
}
count = 0; /* file record count back to zero */
lcount = 0; /* last record count back to zero */
tsize += size; /* add to total tape size */
size = 0; /* file size back to zero */
ln = -1; /* set ln to -1 showing we are at EOF */
return 0; /* return EOF on tape data */
}
/* check for EOM */
if (hc == -1) {
return -1; /* at EOM on disk file */
}
/* read the data */
n = read(inp, s, (size_t)hc);
if (n <= 0)
return -1; /* at EOM on disk file */
/* if odd byte record, read extra byte and throw it away */
if (n & 0x1) {
n2 = read(inp, (char *)(&tc), (size_t)1);
if (n2 <= 0)
return -1; /* at EOM on disk file */
}
/* read the byte count in 32 bit word as trailer */
n2 = read(inp, (char *)(&tc), (size_t)4);
if (n2 <= 0)
return -1; /* at EOM on disk file */
count++; /* bump record count */
size += n; /* update bytes read */
EOFcnt = 0; /* not an EOF */
if (n != ln) {
if (ln > 0) {
if (count - lcount > 1)
fprintf(stderr, "file %d: records %d to %d: size %d\n", filen, lcount, count - 1, ln);
else
fprintf(stderr, "file %d: record %d: size %d\n", filen, lcount, ln);
}
ln = n;
lcount = count;
}
/* return bytes in buffer */
return n;
}
void putrec(int cnt, char *buf)
{
int n1, n2, nw;
int hc = (cnt + 1) & ~1; /* make byte count even */
int ac = cnt; /* get actual byte count */
//printf("writing %d chars\n", cnt);
#if 0
/* write actual byte count to 32 bit word as header */
n1 = fwrite((char *)(&hc), (size_t)1, (size_t)4, outfp);
#endif
/* write the data mod 2 */
nw = fwrite((char *)buf, (size_t)1, (size_t)hc, outfp);
#if 0
/* write the byte count in 32 bit word as footer */
n2 = fwrite((char *)(&hc), (size_t)1, (size_t)4, outfp);
#endif
#if 0
if (n1 != 4 || nw != hc || n2 != 4)
#else
if (nw != hc)
#endif
{
fprintf(stderr, "write (%d) failure\n", nw);
fprintf(stderr, "Operation aborted\n");
fclose(outfp);
close(inp);
free(buf);
exit(1);
}
}
int main (int argc, char *argv[])
{
char *buf;
size_t buf_size = 256 * 1024;
size_t ll, gotboth = 0;
int zero = 0;
if (argc != 3) {
fprintf(stderr, "usage: %s infile outfile\n", argv[0]);
exit(1);
}
/* open input file */
if ((inp = open(argv[1], O_RDONLY, 0666)) < 0) {
fprintf(stderr,"%s: fopen: unable to open input file %s\n", argv[0], argv[1]);
return (1);
}
close(inp); /* close input */
outfp = fopen(argv[1],"r"); /* reopen */
fseek(outfp, 0, SEEK_END); /* seek to end */
oldsize = ftell(outfp); /* get filesize in bytes */
fclose(outfp); /* now close it */
/* open input file */
if ((inp = open(argv[1], O_RDONLY, 0666)) < 0) {
fprintf(stderr,"%s: fopen: unable to open input file %s\n", argv[0], argv[1]);
return (1);
}
/* open output file */
outfp = fopen(argv[2],"w");
if (outfp == NULL) {
fprintf(stderr,"%s: fopen: unable to open output file %s\n", argv[0], argv[2]);
exit(1);
}
/* init counts */
ln = -2; /* look for 2 eof */
count = 0;
size = 0;
tsize = 0;
lcount = 0;
/* get a 256k buffer */
if ((buf = malloc(buf_size)) == NULL) {
fprintf(stderr, "Can't allocate memory for %s\n", argv[0]);
return (4);
}
/* get buffers until eof */
domore:
while ((ll=getloi(buf, buf_size)) > 0) {
//printf("got %d char\n", ll);
/* we have data to write */
putrec(ll, buf); /* write the buffer */
gotboth = 0;
}
//printf("we have EOF %d\n", gotboth+1);
/* we have an EOF or an EOM */
if (ll == 0) {
/* we have EOF, write a zero */
fwrite((char *)(&zero), (size_t)1, (size_t)4, outfp);
gotboth++; /* one more EOF */
if (gotboth == 2) {
/* we have written both EOF's, now write EOM */
ll = -1;
} else {
goto domore; /* get more data */
}
}
//printf("we have EOM, DONE\n");
/* We have EOM, see if EOF's needed */
switch (gotboth) {
case 0: /* we have written no EOFs, so write two */
fwrite((char *)(&zero), (size_t)1, (size_t)4, outfp);
/* drop through */
case 1: /* we have written 1 EOF, so write one more */
fwrite((char *)(&zero), (size_t)1, (size_t)4, outfp);
/* drop through */
default:
case 2: /* we have written 2 EOFs, now do EOM */
zero = -1;
fwrite((char *)(&zero), (size_t)1, (size_t)4, outfp);
}
fprintf(stderr, "EOM after 2 EOFs %d files: %d bytes\n", filen-1, tsize);
newsize = ftell(outfp); /* get filesize in bytes */
fprintf(stderr, "Size of file changed from %d to %d\n", oldsize, newsize);
/* we done */
fclose(outfp);
close(inp);
free(buf);
exit(0);
}