github.com/rcornwell.sims
1
0
Fork 0
mirror of https://github.com/rcornwell/sims.git synced 2026-01-13 15:27:04 +00:00
Code Releases Activity

KA10: More support for Tops 20. Fixed Coverity error.

Browse Source
This commit is contained in:
Richard Cornwell 2019-10-24 22:31:41 -04:00
parent 17307ec1c8
commit c2af65a7fa
3 changed files with 114 additions and 48 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
PDP10/ka10_iii.c
View File

@ -524,6 +524,7 @@ iii_svc (UNIT *uptr)
uptr->MAR &= RMASK;
sim_activate(uptr, 10);
}
return SCPE_OK;
}

112
PDP10/kl10_fe.c
View File

@ -34,6 +34,12 @@
#define UNIT_DUMMY (1 << UNIT_V_UF)
#define DTE_DEVNUM 0200
#define DEV_V_OS (DEV_V_UF + 1) /* Type RSX10/RSX20 */
#define DEV_M_OS (1 << DEV_V_OS)
#define TYPE_RSX10 (0 << DEV_V_OS)
#define TYPE_RSX20 (1 << DEV_V_OS)
/* DTE10 CONI bits */
@ -45,7 +51,7 @@
#define DTE_11DN 00000100 /* TO 11 transfer done */
#define DTE_10DN 00000040 /* TO 10 transfer done */
#define DTE_10ER 00000020 /* Error during TO10 transfer */
#define DTE_PIE 00000010 /* DTE PI enabled */
#define DTE_PIE 00000010 /* PIO enabled */
#define DTE_PIA 00000007 /* PI channel assigment */
/* internal flags */
@ -191,6 +197,8 @@ t_stat dtei_svc (UNIT *uptr);
t_stat dte_svc (UNIT *uptr);
t_stat dteo_svc (UNIT *uptr);
t_stat dtertc_srv(UNIT * uptr);
t_stat dte_set_type(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat dte_show_type (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat dte_reset (DEVICE *dptr);
t_stat dte_stop_os (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat tty_set_mode (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
@ -256,6 +264,10 @@ MTAB dte_mod[] = {
{ TT_MODE, TT_MODE_7B, "7b", "7B", &tty_set_mode },
{ TT_MODE, TT_MODE_8B, "8b", "8B", &tty_set_mode },
{ TT_MODE, TT_MODE_7P, "7p", "7P", &tty_set_mode },
{MTAB_XTD|MTAB_VDV, TYPE_RSX10, NULL, "RSX10", &dte_set_type, NULL,
NULL, "Sets DTE to RSX10 mode"},
{MTAB_XTD|MTAB_VDV, TYPE_RSX20, "RSX20", "RSX20", &dte_set_type, &dte_show_type,
NULL, "Sets DTE to RSX20 mode"},
{ 0 }
};
@ -453,8 +465,7 @@ sim_debug(DEBUG_CONO, &dte_dev, "CTY Ring 11 DB\n");
dte_unit[0].STATUS |= DTE_11DB;
sim_activate(&dte_unit[0], 200);
}
if (dte_unit[0].STATUS & DTE_PIE &&
dte_unit[0].STATUS & (DTE_10DB|DTE_11DN|DTE_10DN|DTE_11ER|DTE_10ER))
if (dte_unit[0].STATUS & (DTE_10DB|DTE_11DN|DTE_10DN|DTE_11ER|DTE_10ER))
set_interrupt(dev, dte_unit[0].STATUS);
sim_debug(DEBUG_CONO, &dte_dev, "CTY %03o CONO %06o %06o\n", dev, (uint32)*data, PC);
break;
@ -523,17 +534,19 @@ void dte_second(UNIT *uptr) {
switch(word & SEC_CMDMSK) {
default:
case SEC_MONO: /* Ouput character in monitor mode */
ch = (int32)(word & 0177);
if (((cty_out.in_ptr + 1) & 0xff) == cty_out.out_ptr) {
sim_activate(uptr, 1000);
sim_activate(uptr, 200);
return;
}
ch = (int32)(word & 0177);
ch = sim_tt_outcvt( ch, TT_GET_MODE(uptr->flags));
cty_out.buff[cty_out.in_ptr] = (char)(word & 0x7f);
cty_out.in_ptr = (cty_out.in_ptr + 1) & 0xff;
if (ch != 0) {
ch = sim_tt_outcvt( ch, TT_GET_MODE(uptr->flags));
cty_out.buff[cty_out.in_ptr] = (char)(word & 0x7f);
cty_out.in_ptr = (cty_out.in_ptr + 1) & 0xff;
sim_activate(&dte_unit[1], 200);
}
M[SEC_DTCHR + base] = ch;
M[SEC_DTMTD + base] = FMASK;
sim_activate(&dte_unit[1], 100);
break;
case SEC_SETPRI:
enter_pri:
@ -550,6 +563,11 @@ enter_pri:
dte_in_cmd = dte_out_res = 0;
cty_done = 0;
/* Start input process */
M[SEC_DTCMD + base] = 0;
M[SEC_DTFLG + base] = FMASK;
// uptr->STATUS |= DTE_10DB;
uptr->STATUS &= ~DTE_11DB;
return;
break;
case SEC_SETDDT: /* Read character from console */
if (cty_in.in_ptr == cty_in.out_ptr) {
@ -594,6 +612,8 @@ enter_pri:
break;
case SEC_CLKWT:
rtc_wait = (uint16)(M[SEC_DTT11 + base] & 0177777);
/* Fall Through */
case SEC_CLKON:
dte_unit[3].STATUS |= SEC_CLK;
rtc_tick = 0;
@ -607,8 +627,11 @@ enter_pri:
/* Acknowledge command */
M[SEC_DTCMD + base] = 0;
M[SEC_DTFLG + base] = FMASK;
uptr->STATUS |= DTE_10DB;
uptr->STATUS &= ~DTE_11DB;
if (dte_dev.flags & TYPE_RSX20) {
uptr->STATUS |= DTE_10DB;
set_interrupt(DTE_DEVNUM, dte_unit[0].STATUS);
}
}
#if KL_ITS
@ -663,8 +686,7 @@ void dte_its(UNIT *uptr) {
}
M[ITS_DTEOUT] = FMASK;
uptr->STATUS |= DTE_11DN;
if (uptr->STATUS & DTE_PIE)
set_interrupt(DTE_DEVNUM, uptr->STATUS);
set_interrupt(DTE_DEVNUM, uptr->STATUS);
sim_debug(DEBUG_DETAIL, &dte_dev, "CTY ITS DTEOUT = %012llo\n", word);
}
/* Check for line speed */
@ -792,8 +814,7 @@ done:
if (Mem_deposit_word(0, dte_dt10_off + PRI_CMTW_STS, &word))
goto error;
uptr->STATUS |= DTE_11DN;
if (uptr->STATUS & DTE_PIE)
set_interrupt(DTE_DEVNUM, uptr->STATUS);
set_interrupt(DTE_DEVNUM, uptr->STATUS);
dte_function(uptr);
}
@ -1068,8 +1089,7 @@ void dte_transfer(UNIT *uptr) {
dte_out_ptr = (dte_out_ptr + 1) & 0x1f;
done:
uptr->STATUS |= DTE_10DN;
if (uptr->STATUS & DTE_PIE)
set_interrupt(DTE_DEVNUM, uptr->STATUS);
set_interrupt(DTE_DEVNUM, uptr->STATUS);
error:
return;
}
@ -1113,8 +1133,7 @@ dte_input()
M[ITS_DTEODN] = word;
/* Tell 10 something is ready */
uptr->STATUS |= DTE_10DB;
if (uptr->STATUS & DTE_PIE)
set_interrupt(DTE_DEVNUM, uptr->STATUS);
set_interrupt(DTE_DEVNUM, uptr->STATUS);
sim_debug(DEBUG_DETAIL, &dte_dev, "CTY ITS DTEODN = %012llo\n", word);
}
}
@ -1148,8 +1167,7 @@ dte_input()
M[ITS_DTETYI] = word;
/* Tell 10 something is ready */
uptr->STATUS |= DTE_10DB;
if (uptr->STATUS & DTE_PIE)
set_interrupt(DTE_DEVNUM, uptr->STATUS);
set_interrupt(DTE_DEVNUM, uptr->STATUS);
sim_debug(DEBUG_DETAIL, &dte_dev, "CTY ITS DTETYI = %012llo\n", word);
}
}
@ -1172,8 +1190,7 @@ dte_input()
if ((word & SMASK) == 0) {
M[ITS_DTEHNG] = word;
uptr->STATUS |= DTE_10DB;
if (uptr->STATUS & DTE_PIE)
set_interrupt(DTE_DEVNUM, uptr->STATUS);
set_interrupt(DTE_DEVNUM, uptr->STATUS);
sim_debug(DEBUG_DETAIL, &dte_dev, "CTY ITS DTEHNG = %012llo\n", word);
}
}
@ -1297,8 +1314,7 @@ dte_start(UNIT *uptr)
error:
/* If we can't read it, go back to secondary */
uptr->STATUS |= DTE_SEC|DTE_10ER;
if (uptr->STATUS & DTE_PIE)
set_interrupt(DTE_DEVNUM, uptr->STATUS);
set_interrupt(DTE_DEVNUM, uptr->STATUS);
return 0;
}
/* If in middle of transfer hold off */
@ -1313,8 +1329,7 @@ error:
goto error;
/* Tell 10 something is ready */
uptr->STATUS |= DTE_10DB;
if (uptr->STATUS & DTE_PIE)
set_interrupt(DTE_DEVNUM, uptr->STATUS);
set_interrupt(DTE_DEVNUM, uptr->STATUS);
return 1;
}
@ -1362,9 +1377,10 @@ t_stat dtei_svc (UNIT *uptr)
cty_in.out_ptr = (cty_in.out_ptr + 1) & 0xff;
M[SEC_DTF11 + base] = ch;
M[SEC_DTMTI + base] = FMASK;
optr->STATUS |= DTE_10DB;
if (optr->STATUS & DTE_PIE)
set_interrupt(DTE_DEVNUM, optr->STATUS);
if (dte_dev.flags & TYPE_RSX20) {
uptr->STATUS |= DTE_10DB;
set_interrupt(DTE_DEVNUM, dte_unit[0].STATUS);
}
}
return SCPE_OK;
}
@ -1372,6 +1388,15 @@ t_stat dtei_svc (UNIT *uptr)
/* Handle output of characters to CTY. Started whenever there is output pending */
t_stat dteo_svc (UNIT *uptr)
{
uint32 base = 0;
UNIT *optr = &dte_unit[0];
#if KI_22BIT
#if KL_ITS
if (!QITS)
#endif
base = eb_ptr;
#endif
/* Flush out any pending CTY output */
while(cty_out.in_ptr != cty_out.out_ptr) {
char ch = cty_out.buff[cty_out.out_ptr];
@ -1471,6 +1496,35 @@ t_stat dte_reset (DEVICE *dptr)
return SCPE_OK;
}
t_stat
dte_set_type(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
DEVICE *dptr;
dptr = find_dev_from_unit (uptr);
if (dptr == NULL)
return SCPE_IERR;
dptr->flags &= ~DEV_M_OS;
dptr->flags |= val;
return SCPE_OK;
}
t_stat
dte_show_type (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
DEVICE *dptr;
if (uptr == NULL)
return SCPE_IERR;
dptr = find_dev_from_unit(uptr);
if (dptr == NULL)
return SCPE_IERR;
fprintf (st, "%s", (dptr->flags & TYPE_RSX20) ? "RSX20" : "RSX10");
return SCPE_OK;
}
/* Stop operating system */
t_stat dte_stop_os (UNIT *uptr, int32 val, CONST char *cptr, void *desc)

49
PDP10/kx10_cpu.c
View File

@ -7263,7 +7263,7 @@ jrstf:
case 007: /* XPCW */
//fprintf(stderr, "XPCW %06o %06o %06o %06o\r\n", pc_sect, AB, PC, FLAGS << 5);
MB = (((uint64)FLAGS) << 23) | (prev_sect & 037);
MB = ((((uint64)FLAGS) << 23) | (prev_sect & 037)) & FMASK;
if (uuo_cycle | pi_cycle) {
FLAGS &= ~(USER|PUBLIC); /* Clear USER */
}
@ -7480,8 +7480,12 @@ jrstf:
goto muuo;
/* Figure out if this is a user space access */
if (xct_flag & 4)
if (xct_flag & 4) {
flag1 = (FLAGS & USERIO) != 0;
#if KLB
sect = prev_sect;
#endif
}
/* Check if Paging Enabled */
if (!page_enable || AB < 020) {
@ -10214,6 +10218,7 @@ DEVICE *dptr;
DIB *dibp;
uint32 i, j, d;
int rh20;
int rh_idx;
/* Set trap offset based on MAOFF flag */
maoff = (cpu_unit[0].flags & UNIT_MAOFF)? 0100 : 0;
@ -10269,33 +10274,31 @@ if (QBBN)
/* Assign all RH10 & RH20 devices */
rh20 = 0540;
for (j = i = 0; (dptr = rh_devs[i]) != NULL; i++) {
rh_idx = 0;
for (i = 0; (dptr = rh_devs[i]) != NULL; i++) {
dibp = (DIB *) dptr->ctxt;
if (dibp && !(dptr->flags & DEV_DIS)) { /* enabled? */
d = dibp->dev_num; /* Check type */
if (d & RH10_DEV) { /* Skip RH10 devices */
d = rh_nums[j];
if (d == 0)
break;
d = rh_nums[rh_idx];
if (d == 0) {
sim_printf ("To many RH10 devices %s\n", sim_dname (dptr));
return TRUE;
}
} else if (d & RH20_DEV) { /* RH20, grab next device */
d = rh20;
rh20 += 4;
continue;
// d = rh20;
// rh20 += 4;
}
dev_tab[(d >> 2)] = dibp->io;
dev_irqv[(d >> 2)] = dibp->irq;
rh[j].dev_num = d;
rh[j].dev = dptr;
rh[j].rh = dibp->rh;
j++;
rh[rh_idx].dev_num = d;
rh[rh_idx].dev = dptr;
rh[rh_idx].rh = dibp->rh;
rh_idx++;
}
}
/* Make sure all are assigned */
if (j == 4 && rh_devs[i] != NULL) {
sim_printf ("To many RH10 devices %s\n", sim_dname (dptr));
return TRUE;
}
/* Assign all remaining devices */
for (i = 0; (dptr = sim_devices[i]) != NULL; i++) {
dibp = (DIB *) dptr->ctxt;
@ -10303,8 +10306,16 @@ for (i = 0; (dptr = sim_devices[i]) != NULL; i++) {
for (j = 0; j < dibp->num_devs; j++) { /* loop thru disp */
if (dibp->io) { /* any dispatch? */
d = dibp->dev_num;
if (d & (RH10_DEV|RH20_DEV)) /* Skip RH10 & RH20 devices */
if (d & (RH10_DEV)) /* Skip RH10 & RH20 devices */
continue;
if (d & (RH20_DEV)) {
d = rh20;
rh20 += 4;
rh[rh_idx].dev_num = d;
rh[rh_idx].dev = dptr;
rh[rh_idx].rh = dibp->rh;
rh_idx++;
}
if (dev_tab[(d >> 2) + j] != &null_dev) {
/* already filled? */
sim_printf ("%s device number conflict at %02o\n",