diff --git a/PDP10/ka10_cpu.c b/PDP10/ka10_cpu.c index f426807..da4f407 100644 --- a/PDP10/ka10_cpu.c +++ b/PDP10/ka10_cpu.c @@ -327,7 +327,9 @@ MTAB cpu_mod[] = { { MTAB_XTD|MTAB_VDV, 0, NULL, "NOIDLE", &sim_clr_idle, NULL }, { UNIT_MSIZE, 1, "16K", "16K", &cpu_set_size }, { UNIT_MSIZE, 2, "32K", "32K", &cpu_set_size }, + { UNIT_MSIZE, 3, "48K", "48K", &cpu_set_size }, { UNIT_MSIZE, 4, "64K", "64K", &cpu_set_size }, + { UNIT_MSIZE, 6, "96K", "96K", &cpu_set_size }, { UNIT_MSIZE, 8, "128K", "128K", &cpu_set_size }, { UNIT_MSIZE, 12, "196K", "196K", &cpu_set_size }, { UNIT_MSIZE, 16, "256K", "256K", &cpu_set_size }, diff --git a/PDP10/ka10_defs.h b/PDP10/ka10_defs.h index 97f5645..ad70b54 100644 --- a/PDP10/ka10_defs.h +++ b/PDP10/ka10_defs.h @@ -360,7 +360,6 @@ struct df10 { void df10_setirq(struct df10 *df) ; -void df10_bump_addr(struct df10 *df); void df10_writecw(struct df10 *df) ; void df10_finish_op(struct df10 *df, int flags) ; void df10_setup(struct df10 *df, uint32 addr); diff --git a/PDP10/ka10_df.c b/PDP10/ka10_df.c index 7b8c202..21ebed5 100644 --- a/PDP10/ka10_df.c +++ b/PDP10/ka10_df.c @@ -30,16 +30,9 @@ void df10_setirq(struct df10 *df) { void df10_writecw(struct df10 *df) { df->status |= 1 << df->ccw_comp; - M[df->cia|1] = ((uint64)(df->ccw & WMASK) << CSHIFT) | ((uint64)df->cda & AMASK); -} - -void df10_bump_addr(struct df10 *df) { -#if KA & ITS - if (cpu_unit[0].flags & UNIT_ITSPAGE) - df->cda = (uint32)((df->cda + 1) & RMASK) | (df->cda & 07000000); - else -#endif - df->cda = (uint32)((df->cda + 1) & AMASK); + if (df->wcr != 0) + df->cda++; + M[df->cia|1] = ((uint64)(df->ccw & WMASK) << CSHIFT) | ((uint64)(df->cda) & AMASK); } void df10_finish_op(struct df10 *df, int flags) { diff --git a/PDP10/ka10_dp.c b/PDP10/ka10_dp.c index cdffa5f..c430e81 100644 --- a/PDP10/ka10_dp.c +++ b/PDP10/ka10_dp.c @@ -83,7 +83,7 @@ #define CLRMSK 0000000177710LL #define CLRMSK2 0000176000000LL -/* DATAI/DATAO */ +/* DATAO */ #define DWPE_STOP 0000000001000LL #define SPARE 0000000002000LL #define DSPE_STOP 0000000004000LL @@ -362,6 +362,7 @@ t_stat dp_devio(uint32 dev, uint64 *data) { df10->status |= *data & 07LL; if (*data & BUSY) { /* Stop controller */ + sim_cancel(uptr); uptr->STATUS &= ~BUSY; df10_finish_op(df10, 0); } @@ -398,7 +399,7 @@ t_stat dp_devio(uint32 dev, uint64 *data) { res = (uint64)(unit) << 33; if ((dptr->flags & DEV_WHDR) == 0) res |= WR_HD_LK; /* Can't write headers. */ - if (GET_DTYPE(uptr->flags)) + if (dp_drv_tab[GET_DTYPE(uptr->flags)].devtype == RP03_DTYPE) res |= SEL_RP03; if (uptr->flags & UNIT_DIS) { res |= NO_DRIVE; @@ -557,35 +558,29 @@ t_stat dp_svc (UNIT *uptr) ctlr, uptr->UFLAGS, cyl, cyl, sect, surf,uptr->CUR_CYL); uptr->STATUS |= SRC_DONE; if (uptr->STATUS & END_CYL) { + if (cmd == WR) { + if(df10_read(df10)) + df10_read(df10); + } uptr->UFLAGS |= DONE; - uptr->STATUS &= ~END_CYL; uptr->STATUS &= ~BUSY; df10_finish_op(df10, 0); return SCPE_OK; } if (sect >= dp_drv_tab[dtype].sect) { - uptr->UFLAGS |= DONE; uptr->STATUS &= ~BUSY; uptr->STATUS |= SEC_ERR; - df10_finish_op(df10, 0); - return SCPE_OK; } if (surf >= dp_drv_tab[dtype].surf) { - uptr->UFLAGS |= DONE; uptr->STATUS &= ~BUSY; uptr->STATUS |= SUF_ERR; - df10_finish_op(df10, 0); - return SCPE_OK; } if (cyl != uptr->CUR_CYL) { - uptr->UFLAGS |= DONE; uptr->STATUS &= ~BUSY; uptr->STATUS |= SRC_ERR; - df10_finish_op(df10, 0); - return SCPE_OK; } if ((uptr->STATUS & BUSY) == 0) { - uptr->STATUS &= ~BUSY; + uptr->UFLAGS |= DONE; df10_finish_op(df10, 0); return SCPE_OK; } @@ -634,8 +629,8 @@ t_stat dp_svc (UNIT *uptr) r = df10_write(df10); break; } - sim_debug(DEBUG_DATA, dptr, "Xfer %d %08o %012llo\n", - uptr->DATAPTR, df10->cda, df10->buf); + sim_debug(DEBUG_DATA, dptr, "Xfer %d %08o %012llo %08o\n", + uptr->DATAPTR, df10->cda, df10->buf, df10->wcr); uptr->DATAPTR++; if (uptr->DATAPTR >= RP_NUMWD || r == 0 ) { if (cmd == WR) { @@ -683,21 +678,29 @@ t_stat dp_svc (UNIT *uptr) ctlr, uptr->UFLAGS, cyl, cyl, sect, surf,uptr->CUR_CYL); uptr->STATUS |= SRC_DONE; if (uptr->STATUS & END_CYL) { + if (cmd == WR) { + if(df10_read(df10)) + df10_read(df10); + } uptr->UFLAGS |= DONE; - uptr->STATUS &= ~END_CYL; uptr->STATUS &= ~BUSY; df10_finish_op(df10, 0); return SCPE_OK; } + if (sect >= dp_drv_tab[dtype].sect) { + uptr->STATUS &= ~BUSY; + uptr->STATUS |= SEC_ERR; + } + if (surf >= dp_drv_tab[dtype].surf) { + uptr->STATUS &= ~BUSY; + uptr->STATUS |= SUF_ERR; + } if (cyl != uptr->CUR_CYL) { - uptr->UFLAGS |= DONE; uptr->STATUS &= ~BUSY; uptr->STATUS |= SRC_ERR; - df10_finish_op(df10, 0); - return SCPE_OK; } if ((uptr->STATUS & BUSY) == 0) { - uptr->STATUS &= ~BUSY; + uptr->UFLAGS |= DONE; df10_finish_op(df10, 0); return SCPE_OK; } diff --git a/PDP10/ka10_mt.c b/PDP10/ka10_mt.c index ad430d0..c41db61 100644 --- a/PDP10/ka10_mt.c +++ b/PDP10/ka10_mt.c @@ -617,10 +617,8 @@ t_stat mt_srv(UNIT * uptr) mt_df10_write(dptr, uptr); } else { if ((cmd & 010) == 0) { - if (dptr->flags & MTDF_TYPEB) { - df10_bump_addr(&mt_df10); + if (dptr->flags & MTDF_TYPEB) df10_writecw(&mt_df10); - } uptr->u3 &= ~(MT_MOTION|MT_BUSY); return mt_error(uptr, MTSE_OK, dptr); } else { @@ -661,10 +659,8 @@ t_stat mt_srv(UNIT * uptr) CLR_BUF(uptr); uptr->u3 &= ~MT_LASTWD; } else { - if (dptr->flags & MTDF_TYPEB) { - df10_bump_addr(&mt_df10); + if (dptr->flags & MTDF_TYPEB) df10_writecw(&mt_df10); - } uptr->u3 &= ~(MT_MOTION|MT_BUSY); return mt_error(uptr, MTSE_INVRL, dptr); } diff --git a/PDP10/ka10_rc.c b/PDP10/ka10_rc.c index 989c3bd..51fd1d9 100644 --- a/PDP10/ka10_rc.c +++ b/PDP10/ka10_rc.c @@ -211,6 +211,7 @@ t_stat rc_devio(uint32 dev, uint64 *data) { #if KI_22BIT *data |= B22_FLAG; #endif + *data |= PRTLT; sim_debug(DEBUG_CONI, dptr, "HK %03o CONI %06o PC=%o\n", dev, (uint32)*data, PC); break; diff --git a/PDP10/ka10_rp.c b/PDP10/ka10_rp.c index 11f8cbb..0e4e859 100644 --- a/PDP10/ka10_rp.c +++ b/PDP10/ka10_rp.c @@ -280,7 +280,7 @@ struct drvtyp rp_drv_tab[] = { struct df10 rp_df10[NUM_DEVS_RP]; -uint32 rp_cur_unit[NUM_DEVS_RP]; +int rp_xfer_drive[NUM_DEVS_RP]; uint64 rp_buf[NUM_DEVS_RP][RP_NUMWD]; int rp_reg[NUM_DEVS_RP]; int rp_ivect[NUM_DEVS_RP]; @@ -484,7 +484,7 @@ t_stat rp_devio(uint32 dev, uint64 *data) { case CONO: clr_interrupt(dev); - df10->status &= ~07LL; + df10->status &= ~(07LL|IADR_ATTN|IARD_RAE); df10->status |= *data & (07LL|IADR_ATTN|IARD_RAE); /* Clear flags */ if (*data & CONT_RESET) { @@ -520,10 +520,14 @@ t_stat rp_devio(uint32 dev, uint64 *data) { case DATAI: *data = 0; + if (df10->status & BUSY && rp_reg[ctlr] != 04) { + df10->status |= CC_CHAN_ACT; + return SCPE_OK; + } if (rp_reg[ctlr] == 040) { *data = (t_uint64)(rp_read(ctlr, rp_drive[ctlr], 0) & 077); *data |= ((t_uint64)(df10->cia)) << 6; - *data |= ((t_uint64)(rp_drive[ctlr])) << 18; + *data |= ((t_uint64)(rp_xfer_drive[ctlr])) << 18; } else if (rp_reg[ctlr] == 044) { *data = (t_uint64)rp_ivect[ctlr]; if (rp_imode[ctlr]) @@ -551,6 +555,9 @@ t_stat rp_devio(uint32 dev, uint64 *data) { sim_debug(DEBUG_DATAIO, dptr, "RP %03o DATO %012llo, %d PC=%06o %06o\n", dev, *data, ctlr, PC, df10->status); rp_reg[ctlr] = ((int)(*data >> 30)) & 077; + if (rp_reg[ctlr] < 040 && rp_reg[ctlr] != 04) { + rp_drive[ctlr] = (int)(*data >> 18) & 07; + } if (*data & LOAD_REG) { if (rp_reg[ctlr] == 040) { if ((*data & 1) == 0) { @@ -564,7 +571,6 @@ t_stat rp_devio(uint32 dev, uint64 *data) { df10->status &= ~(1 << df10->ccw_comp); df10->status &= ~PI_ENABLE; - rp_drive[ctlr] = (int)(*data >> 18) & 07; if (((*data >> 1) & 037) < FNC_XFER) { df10->status |= CXR_ILC; df10_setirq(df10); @@ -575,6 +581,7 @@ t_stat rp_devio(uint32 dev, uint64 *data) { } /* Start command */ df10_setup(df10, (uint32)(*data >> 6)); + rp_xfer_drive[ctlr] = (int)(*data >> 18) & 07; rp_write(ctlr, rp_drive[ctlr], 0, (uint32)(*data & 077)); sim_debug(DEBUG_DATAIO, dptr, "RP %03o command %012llo, %d[%d] PC=%06o %06o\n", @@ -596,14 +603,9 @@ t_stat rp_devio(uint32 dev, uint64 *data) { if (rp_rae[ctlr] & (1 << rp_drive[ctlr])) { return SCPE_OK; } - rp_drive[ctlr] = (int)(*data >> 18) & 07; rp_write(ctlr, rp_drive[ctlr], rp_reg[ctlr] & 037, (int)(*data & 0777777)); } - } else { - if (rp_reg[ctlr] < 040 && rp_reg[ctlr] != 04) { - rp_drive[ctlr] = (int)(*data >> 18) & 07; - } } return SCPE_OK; } @@ -643,21 +645,21 @@ rp_write(int ctlr, int unit, int reg, uint32 data) { } switch(reg) { case 000: /* control */ - sim_debug(DEBUG_DETAIL, dptr, "RPA%o %d Status=%06o\n", unit, ctlr, uptr->u3); + sim_debug(DEBUG_DETAIL, dptr, "RP%o %d Status=%06o\n", unit, ctlr, uptr->u3); /* Set if drive not writable */ if (uptr->flags & UNIT_WLK) uptr->u3 |= DS_WRL; /* If drive not ready don't do anything */ if ((uptr->u3 & DS_DRY) == 0) { uptr->u3 |= (ER1_RMR << 16)|DS_ERR; - sim_debug(DEBUG_DETAIL, dptr, "RPA%o %d busy\n", unit, ctlr); + sim_debug(DEBUG_DETAIL, dptr, "RP%o %d not ready\n", unit, ctlr); return; } /* Check if GO bit set */ if ((data & 1) == 0) { uptr->u3 &= ~076; uptr->u3 |= data & 076; - sim_debug(DEBUG_DETAIL, dptr, "RPA%o %d no go\n", unit, ctlr); + sim_debug(DEBUG_DETAIL, dptr, "RP%o %d no go\n", unit, ctlr); return; /* No, nop */ } uptr->u3 &= DS_ATA|DS_VV|DS_DPR|DS_MOL|DS_WRL; @@ -692,6 +694,7 @@ rp_write(int ctlr, int unit, int reg, uint32 data) { rp_attn[ctlr] &= ~(1<u3 |= (ER1_IAE << 16)|DS_ERR|DS_DRY|DS_ATA; uptr->u3 &= ~DS_PIP; + df10->status &= ~BUSY; if ((df10->status & IADR_ATTN) != 0 && rp_attn[ctlr] != 0) df10_setirq(df10); break; @@ -712,6 +715,8 @@ rp_write(int ctlr, int unit, int reg, uint32 data) { uptr->us9 = 0; uptr->us10 = 0; rp_attn[ctlr] &= ~(1<status & IADR_ATTN) != 0 && rp_attn[ctlr] != 0) + df10_setirq(df10); break; case FNC_PRESET: /* read-in preset */ @@ -725,19 +730,23 @@ rp_write(int ctlr, int unit, int reg, uint32 data) { if ((uptr->flags & UNIT_ATT) != 0) uptr->u3 |= DS_VV; uptr->u3 |= DS_DRY; + if ((df10->status & IADR_ATTN) != 0 && rp_attn[ctlr] != 0) + df10_setirq(df10); break; default: uptr->u3 |= DS_DRY|DS_ERR|DS_ATA; uptr->u3 |= (ER1_ILF << 16); rp_attn[ctlr] |= (1<status & IADR_ATTN) != 0 && rp_attn[ctlr] != 0) + df10_setirq(df10); } if (uptr->u3 & CR_GO) sim_activate(uptr, 1000); clr_interrupt(df10->devnum); - if ((df10->status & (IADR_ATTN|BUSY)) != 0 && rp_attn[ctlr] != 0) + if ((df10->status & (IADR_ATTN|BUSY)) == IADR_ATTN && rp_attn[ctlr] != 0) df10_setirq(df10); - sim_debug(DEBUG_DETAIL, dptr, "RPA%o AStatus=%06o\n", unit, uptr->u3); + sim_debug(DEBUG_DETAIL, dptr, "RP%o AStatus=%06o\n", unit, uptr->u3); return; case 001: /* status */ break; @@ -808,6 +817,9 @@ rp_read(int ctlr, int unit, int reg) { uint32 temp = 0; int i; + if ((uptr->flags & UNIT_ATT) == 0 && reg != 04) { /* not attached? */ + return 0; + } switch(reg) { case 000: /* control */ df10 = &rp_df10[ctlr]; @@ -894,7 +906,7 @@ t_stat rp_svc (UNIT *uptr) /* Check if seeking */ if (uptr->u3 & DS_PIP) { - sim_debug(DEBUG_DETAIL, dptr, "RPA%o seek %d %d\n", unit, cyl, uptr->u5); + sim_debug(DEBUG_DETAIL, dptr, "RP%o seek %d %d\n", unit, cyl, uptr->u5); if (cyl >= rp_drv_tab[dtype].cyl) { uptr->u3 &= ~DS_PIP; uptr->u3 |= (ER1_IAE << 16)|DS_ERR|DS_DRY|DS_ATA; @@ -954,7 +966,7 @@ t_stat rp_svc (UNIT *uptr) uptr->u3 &= ~CR_GO; if ((df->status & (IADR_ATTN|BUSY)) == IADR_ATTN) df10_setirq(df); - sim_debug(DEBUG_DETAIL, dptr, "RPA%o seekdone %d %o\n", unit, cyl, uptr->u3); + sim_debug(DEBUG_DETAIL, dptr, "RP%o seekdone %d %o\n", unit, cyl, uptr->u3); break; case FNC_SEARCH: /* search */ @@ -966,14 +978,14 @@ t_stat rp_svc (UNIT *uptr) uptr->u3 &= ~CR_GO; if ((df->status & (IADR_ATTN|BUSY)) == IADR_ATTN) df10_setirq(df); - sim_debug(DEBUG_DETAIL, dptr, "RPA%o searchdone %d %o\n", unit, cyl, uptr->u3); + sim_debug(DEBUG_DETAIL, dptr, "RP%o searchdone %d %o\n", unit, cyl, uptr->u3); break; case FNC_READ: /* read */ case FNC_READH: /* read w/ headers */ case FNC_WCHK: /* write check */ if (uptr->u3 & DS_ERR) { - sim_debug(DEBUG_DETAIL, dptr, "RPA%o read error\n", unit); + sim_debug(DEBUG_DETAIL, dptr, "RP%o read error\n", unit); uptr->u3 |= DS_DRY; uptr->u3 &= ~CR_GO; df10_finish_op(df, 0); @@ -988,11 +1000,11 @@ t_stat rp_svc (UNIT *uptr) uptr->u3 |= (ER1_IAE << 16)|DS_ERR|DS_DRY|DS_ATA; uptr->u3 &= ~CR_GO; df10_finish_op(df, 0); - sim_debug(DEBUG_DETAIL, dptr, "RPA%o readx done\n", unit); + sim_debug(DEBUG_DETAIL, dptr, "RP%o readx done\n", unit); return SCPE_OK; } - sim_debug(DEBUG_DETAIL, dptr, "RPA%o read (%d,%d,%d)\n", unit, cyl, - GET_SC(uptr->u4), GET_SF(uptr->u4)); + sim_debug(DEBUG_DETAIL, dptr, "RP%o read (%d,%d,%d)\n", unit, cyl, + GET_SF(uptr->u4), GET_SC(uptr->u4)); da = GET_DA(uptr->u4, dtype) * RP_NUMWD; (void)sim_fseek(uptr->fileref, da * sizeof(uint64), SEEK_SET); wc = sim_fread (&rp_buf[ctlr][0], sizeof(uint64), RP_NUMWD, @@ -1004,10 +1016,10 @@ t_stat rp_svc (UNIT *uptr) } df->buf = rp_buf[ctlr][uptr->u6++]; - sim_debug(DEBUG_DATA, dptr, "RPA%o read word %d %012llo %09o %06o\n", + sim_debug(DEBUG_DATA, dptr, "RP%o read word %d %012llo %09o %06o\n", unit, uptr->u6, df->buf, df->cda, df->wcr); if (df10_write(df)) { - if (uptr->u6 == uptr->hwmark) { + if (uptr->u6 == RP_NUMWD) { /* Increment to next sector. Set Last Sector */ uptr->u6 = 0; CLR_BUF(uptr); @@ -1015,7 +1027,6 @@ t_stat rp_svc (UNIT *uptr) if (GET_SC(uptr->u4) >= rp_drv_tab[dtype].sect) { uptr->u4 &= (DA_M_SF << DA_V_SF) | (DC_M_CY << DC_V_CY); uptr->u4 += 1 << DA_V_SF; - uptr->u3 |= DS_LST; if (GET_SF(uptr->u4) >= rp_drv_tab[dtype].surf) { uptr->u4 &= (DC_M_CY << DC_V_CY); uptr->u4 += 1 << DC_V_CY; @@ -1025,7 +1036,7 @@ t_stat rp_svc (UNIT *uptr) } sim_activate(uptr, 50); } else { - sim_debug(DEBUG_DETAIL, dptr, "RPA%o read done\n", unit); + sim_debug(DEBUG_DETAIL, dptr, "RP%o read done\n", unit); uptr->u3 |= DS_DRY; uptr->u3 &= ~CR_GO; df10_finish_op(df, 0); @@ -1036,7 +1047,7 @@ t_stat rp_svc (UNIT *uptr) case FNC_WRITE: /* write */ case FNC_WRITEH: /* write w/ headers */ if (uptr->u3 & DS_ERR) { - sim_debug(DEBUG_DETAIL, dptr, "RPA%o read error\n", unit); + sim_debug(DEBUG_DETAIL, dptr, "RP%o read error\n", unit); uptr->u3 |= DS_DRY; uptr->u3 &= ~CR_GO; df10_finish_op(df, 0); @@ -1049,7 +1060,7 @@ t_stat rp_svc (UNIT *uptr) uptr->u3 |= (ER1_IAE << 16)|DS_ERR|DS_DRY|DS_ATA; uptr->u3 &= ~CR_GO; df10_finish_op(df, 0); - sim_debug(DEBUG_DETAIL, dptr, "RPA%o writex done\n", unit); + sim_debug(DEBUG_DETAIL, dptr, "RP%o writex done\n", unit); return SCPE_OK; } uptr->u6 = 0; @@ -1057,13 +1068,13 @@ t_stat rp_svc (UNIT *uptr) } r = df10_read(df); rp_buf[ctlr][uptr->u6++] = df->buf; - sim_debug(DEBUG_DATA, dptr, "RPA%o write word %d %012llo %06o\n", + sim_debug(DEBUG_DATA, dptr, "RP%o write word %d %012llo %06o\n", unit, uptr->u6, df->buf, df->wcr); if (r == 0 || uptr->u6 == RP_NUMWD) { while (uptr->u6 < RP_NUMWD) rp_buf[ctlr][uptr->u6++] = 0; - sim_debug(DEBUG_DETAIL, dptr, "RPA%o write (%d,%d,%d)\n", unit, cyl, - GET_SC(uptr->u4), GET_SF(uptr->u4)); + sim_debug(DEBUG_DETAIL, dptr, "RP%o write (%d,%d,%d)\n", unit, cyl, + GET_SF(uptr->u4), GET_SC(uptr->u4)); da = GET_DA(uptr->u4, dtype) * RP_NUMWD; (void)sim_fseek(uptr->fileref, da * sizeof(uint64), SEEK_SET); (void)sim_fwrite (&rp_buf[ctlr][0], sizeof(uint64), RP_NUMWD, @@ -1075,7 +1086,6 @@ t_stat rp_svc (UNIT *uptr) if (GET_SC(uptr->u4) >= rp_drv_tab[dtype].sect) { uptr->u4 &= (DA_M_SF << DA_V_SF) | (DC_M_CY << DC_V_CY); uptr->u4 += 1 << DA_V_SF; - uptr->u3 |= DS_LST; if (GET_SF(uptr->u4) >= rp_drv_tab[dtype].surf) { uptr->u4 &= (DC_M_CY << DC_V_CY); uptr->u4 += 1 << DC_V_CY; @@ -1087,7 +1097,7 @@ t_stat rp_svc (UNIT *uptr) if (r) { sim_activate(uptr, 50); } else { - sim_debug(DEBUG_DETAIL, dptr, "RPA%o write done\n", unit); + sim_debug(DEBUG_DETAIL, dptr, "RP%o write done\n", unit); uptr->u3 |= DS_DRY; uptr->u3 &= ~CR_GO; df10_finish_op(df, 0); diff --git a/PDP10/ka10_rs.c b/PDP10/ka10_rs.c index dfed8a6..26c7aa6 100644 --- a/PDP10/ka10_rs.c +++ b/PDP10/ka10_rs.c @@ -225,7 +225,7 @@ struct drvtyp rs_drv_tab[] = { struct df10 rs_df10[NUM_DEVS_RS]; -uint32 rs_cur_unit[NUM_DEVS_RS]; +uint32 rs_xfer_drive[NUM_DEVS_RS]; uint64 rs_buf[NUM_DEVS_RS][RS_NUMWD]; int rs_reg[NUM_DEVS_RS]; int rs_ivect[NUM_DEVS_RS]; @@ -329,7 +329,7 @@ t_stat rs_devio(uint32 dev, uint64 *data) { case CONO: clr_interrupt(dev); - df10->status &= ~07LL; + df10->status &= ~(07LL|IADR_ATTN|IARD_RAE); df10->status |= *data & (07LL|IADR_ATTN|IARD_RAE); /* Clear flags */ if (*data & CONT_RESET) { @@ -362,10 +362,14 @@ t_stat rs_devio(uint32 dev, uint64 *data) { case DATAI: *data = 0; + if (df10->status & BUSY && rs_reg[ctlr] != 04) { + df10->status |= CC_CHAN_ACT; + return SCPE_OK; + } if (rs_reg[ctlr] == 040) { *data = (t_uint64)(rs_read(ctlr, rs_drive[ctlr], 0) & 077); *data |= ((t_uint64)(df10->cia)) << 6; - *data |= ((t_uint64)(rs_drive[ctlr])) << 18; + *data |= ((t_uint64)(rs_xfer_drive[ctlr])) << 18; } else if (rs_reg[ctlr] == 044) { *data = (t_uint64)rs_ivect[ctlr]; if (rs_imode[ctlr]) @@ -394,6 +398,9 @@ t_stat rs_devio(uint32 dev, uint64 *data) { sim_debug(DEBUG_DATAIO, dptr, "RS %03o DATO %012llo, %d PC=%06o %06o\n", dev, *data, ctlr, PC, df10->status); rs_reg[ctlr] = ((int)(*data >> 30)) & 077; + if (rs_reg[ctlr] < 040 && rs_reg[ctlr] != 04) { + rs_drive[ctlr] = (int)(*data >> 18) & 07; + } if (*data & LOAD_REG) { if (rs_reg[ctlr] == 040) { if ((*data & 1) == 0) { @@ -415,10 +422,10 @@ t_stat rs_devio(uint32 dev, uint64 *data) { dev, *data, ctlr, rs_drive[ctlr], PC, df10->status); return SCPE_OK; } - rs_drive[ctlr] = (int)(*data >> 18) & 07; /* Start command */ df10_setup(df10, (uint32)(*data >> 6)); + rs_xfer_drive[ctlr] = (int)(*data >> 18) & 07; rs_write(ctlr, rs_drive[ctlr], 0, (uint32)(*data & 077)); sim_debug(DEBUG_DATAIO, dptr, "RS %03o command %012llo, %d[%d] PC=%06o %06o\n", @@ -444,10 +451,6 @@ t_stat rs_devio(uint32 dev, uint64 *data) { rs_write(ctlr, rs_drive[ctlr], rs_reg[ctlr] & 037, (int)(*data & 0777777)); } - } else { - if (rs_reg[ctlr] < 040 && rs_reg[ctlr] != 04) { - rs_drive[ctlr] = (int)(*data >> 18) & 07; - } } return SCPE_OK; } @@ -541,8 +544,10 @@ rs_write(int ctlr, int unit, int reg, uint32 data) { default: uptr->u3 |= DS_DRY|DS_ERR|DS_ATA; uptr->u3 |= (ER1_ILF << 16); + if ((df10->status & IADR_ATTN) != 0 && rs_attn[ctlr] != 0) + df10_setirq(df10); } - if (uptr->u3 & DS_PIP) + if (uptr->u3 & CR_GO) sim_activate(uptr, 100); sim_debug(DEBUG_DETAIL, dptr, "RSA%o AStatus=%06o\n", unit, uptr->u3); return; @@ -589,8 +594,7 @@ rs_read(int ctlr, int unit, int reg) { uint32 temp = 0; int i; - if ((uptr->flags & UNIT_ATT) == 0) { /* not attached? */ - df10->status |= 0002000000000; + if ((uptr->flags & UNIT_ATT) == 0 && reg != 04) { /* not attached? */ return 0; } diff --git a/PDP10/ka10_tu.c b/PDP10/ka10_tu.c index 47fd066..5f83c34 100644 --- a/PDP10/ka10_tu.c +++ b/PDP10/ka10_tu.c @@ -210,7 +210,7 @@ struct df10 tu_df10[NUM_DEVS_TU]; -uint32 tu_cur_unit[NUM_DEVS_TU]; +int tu_xfer_drive[NUM_DEVS_TU]; uint8 tu_buf[NUM_DEVS_TU][TU_NUMFR]; int tu_reg[NUM_DEVS_TU]; int tu_ivect[NUM_DEVS_TU]; @@ -339,10 +339,14 @@ t_stat tu_devio(uint32 dev, uint64 *data) { case DATAI: *data = 0; + if (df10->status & BUSY && rp_reg[ctlr] != 04) { + df10->status |= CC_CHAN_ACT; + return SCPE_OK; + } if (tu_reg[ctlr] == 040) { *data = (t_uint64)(tu_read(ctlr, tu_drive[ctlr], 0) & 077); *data |= ((t_uint64)(df10->cia)) << 6; - *data |= ((t_uint64)(tu_drive[ctlr])) << 18; + *data |= ((t_uint64)(tu_xfer_drive[ctlr])) << 18; } else if (tu_reg[ctlr] == 044) { *data = (t_uint64)tu_ivect[ctlr]; if (tu_imode[ctlr]) @@ -364,26 +368,30 @@ t_stat tu_devio(uint32 dev, uint64 *data) { sim_debug(DEBUG_DATAIO, dptr, "TU %03o DATO %012llo, %d PC=%06o %06o\n", dev, *data, ctlr, PC, df10->status); tu_reg[ctlr] = ((int)(*data >> 30)) & 077; + if (rp_reg[ctlr] < 040 && rp_reg[ctlr] != 04) { + rp_drive[ctlr] = (int)(*data >> 18) & 07; + } if (*data & LOAD_REG) { if (tu_reg[ctlr] == 040) { - tu_drive[ctlr] = (int)(*data >> 18) & 07; - if (df10->status & BUSY) { - df10->status |= CC_CHAN_ACT; - sim_debug(DEBUG_DATAIO, dptr, - "TU %03o command busy %012llo, %d[%d] PC=%06o %06o\n", - dev, *data, ctlr, tu_drive[ctlr], PC, df10->status); - return SCPE_OK; - } if ((*data & 1) == 0) { return SCPE_OK; } + if (df10->status & BUSY) { + df10->status |= CC_CHAN_ACT; + sim_debug(DEBUG_DATAIO, dptr, + "TU %03o command busy %012llo, %d[%d] PC=%06o %06o\n", + dev, *data, ctlr, tu_drive[ctlr], PC, df10->status); + return SCPE_OK; + } + df10->status &= ~(1 << df10->ccw_comp); + df10->status &= ~PI_ENABLE; if (((*data >> 1) & 077) < FNC_XFER) { df10->status |= CXR_ILC; df10_setirq(df10); - sim_debug(DEBUG_DATAIO, dptr, - "TU %03o command abort %012llo, %d[%d] PC=%06o %06o\n", - dev, *data, ctlr, tu_drive[ctlr], PC, df10->status); + sim_debug(DEBUG_DATAIO, dptr, + "TU %03o command abort %012llo, %d[%d] PC=%06o %06o\n", + dev, *data, ctlr, tu_drive[ctlr], PC, df10->status); return SCPE_OK; } /* Check if access error */ @@ -393,6 +401,7 @@ t_stat tu_devio(uint32 dev, uint64 *data) { /* Start command */ df10_setup(df10, (uint32)(*data >> 6)); + tu_xfer_drive[ctlr] = (int)(*data >> 18) & 07; tu_write(ctlr, tu_drive[ctlr], 0, (uint32)(*data & 077)); sim_debug(DEBUG_DATAIO, dptr, "TU %03o command %012llo, %d[%d] PC=%06o %06o\n", @@ -418,10 +427,6 @@ t_stat tu_devio(uint32 dev, uint64 *data) { tu_write(ctlr, tu_drive[ctlr], tu_reg[ctlr] & 037, (int)(*data & 0777777)); } - } else { - if (tu_reg[ctlr] < 040 && tu_reg[ctlr] != 04) { - tu_drive[ctlr] = (int)(*data >> 18) & 07; - } } return SCPE_OK; } @@ -461,7 +466,8 @@ tu_write(int ctlr, int unit, int reg, uint32 data) { switch(reg) { case 000: /* control */ - sim_debug(DEBUG_DETAIL, dptr, "TUA%o %d Status=%06o\n", unit, ctlr, uptr->u5); + sim_debug(DEBUG_DETAIL, dptr, "TUA%o %d Status=%06o\n", + unit, ctlr, uptr->u5); df10->status &= ~(1 << df10->ccw_comp); if ((data & 01) != 0 && (uptr->flags & UNIT_ATT) != 0) { uptr->u3 = data & 076; @@ -692,7 +698,6 @@ t_stat tu_srv(UNIT * uptr) uint8 ch; int cc; int cc_max; - int stop_flag; /* Find dptr, and df10 */ dptr = tu_devs[ctlr]; @@ -777,7 +782,8 @@ t_stat tu_srv(UNIT * uptr) tu_error(uptr, MTSE_OK); return SCPE_OK; } - sim_debug(DEBUG_DATA, dptr, "TU%o readrev %012llo\n", unit, df->buf); + sim_debug(DEBUG_DATA, dptr, "TU%o readrev %012llo\n", + unit, df->buf); df->buf = 0; } } else { @@ -825,12 +831,14 @@ t_stat tu_srv(UNIT * uptr) tu_error(uptr, MTSE_OK); return SCPE_OK; } - sim_debug(DEBUG_DATA, dptr, "TU%o read %012llo\n", unit, df->buf); + sim_debug(DEBUG_DATA, dptr, "TU%o read %012llo\n", + unit, df->buf); df->buf = 0; } } else { if (uptr->u4 != 0) { - sim_debug(DEBUG_DATA, dptr, "TU%o read %012llo\n", unit, df->buf); + sim_debug(DEBUG_DATA, dptr, "TU%o read %012llo\n", + unit, df->buf); df10_write(df); } tu_error(uptr, MTSE_OK); @@ -840,7 +848,6 @@ t_stat tu_srv(UNIT * uptr) break; case FNC_WRITE: - stop_flag = 0; if (BUF_EMPTY(uptr)) { uptr->u3 &= ~CS_PIP; if (tu_frame[ctlr] == 0) { @@ -864,17 +871,15 @@ t_stat tu_srv(UNIT * uptr) uptr->u6 = 0; df->buf = 0; } - if (tu_frame[ctlr] == 0) { - stop_flag = 1; - } else if (uptr->u4 == 0 && df10_read(df) == 0) { - stop_flag = 1; - } + if (tu_frame[ctlr] != 0 && uptr->u4 == 0 && df10_read(df) == 0) + uptr->u4 != 010; - if (!stop_flag) { + if ((uptr->u3 & CS_MOTION) != 0) { if (uptr->u4 == 0) - sim_debug(DEBUG_DATA, dptr, "TU%o write %012llo\n", unit, df->buf); + sim_debug(DEBUG_DATA, dptr, "TU%o write %012llo\n", + unit, df->buf); /* Write next char out */ - cc = (8 * (3 - uptr->u4)) + 4; + cc = (8 * (3 - (uptr->u4 & 07))) + 4; if (cc < 0) ch = df->buf & 0x0f; else @@ -882,18 +887,23 @@ t_stat tu_srv(UNIT * uptr) tu_buf[ctlr][uptr->u6] = ch; uptr->u6++; uptr->hwmark = uptr->u6; - uptr->u4++; - if (uptr->u4 == cc_max) { - uptr->u4 = 0; + uptr->u4 = (uptr->u4 & 010) | ((uptr->u4 & 07) + 1); + if ((uptr->u4 & 7) == cc_max) { + uptr->u4 &= 010; } tu_frame[ctlr] = 0177777 & (tu_frame[ctlr] + 1); - } else { + if (tu_frame[ctlr] == 0) + uptr->u4 = 010; + } + if (uptr->u4 == 010) { /* Write out the block */ reclen = uptr->hwmark; r = sim_tape_wrrecf(uptr, &tu_buf[ctlr][0], reclen); - sim_debug(DEBUG_DETAIL, dptr, "TU%o Write %d\n", unit, reclen); + sim_debug(DEBUG_DETAIL, dptr, "TU%o Write %d %d\n", + unit, reclen, uptr->u4); uptr->u6 = 0; uptr->hwmark = 0; + df10_finish_op(df,0 ); tu_error(uptr, r); /* Record errors */ return SCPE_OK; }