From d82d41af1b09d8f35bcf322189b390f029862cf6 Mon Sep 17 00:00:00 2001 From: Richard Cornwell Date: Sun, 24 Sep 2017 22:40:25 -0400 Subject: [PATCH] I7000: Updated IBM7080 sim to fix some bugs. --- I7000/i7000_cdr.c | 5 +++++ I7000/i7000_con.c | 10 +--------- I7000/i7000_mt.c | 4 ++-- I7000/i7080_chan.c | 22 +++++++++++++++------- I7000/i7080_cpu.c | 26 ++++++++++++++++++-------- I7000/i7080_sys.c | 4 ++-- 6 files changed, 43 insertions(+), 28 deletions(-) diff --git a/I7000/i7000_cdr.c b/I7000/i7000_cdr.c index 0e39b73..f5da1c3 100644 --- a/I7000/i7000_cdr.c +++ b/I7000/i7000_cdr.c @@ -203,6 +203,7 @@ cdr_srv(UNIT *uptr) { (uptr->u5 & URCSTA_CARD) == 0) { switch(sim_read_card(uptr)) { case SCPE_EOF: + sim_debug(DEBUG_DETAIL, &cdr_dev, "%d: EOF\n", u); case SCPE_UNATT: chan_set_eof(chan); chan_set_attn(chan); @@ -211,6 +212,7 @@ cdr_srv(UNIT *uptr) { uptr->u5 &= ~(URCSTA_BUSY|URCSTA_READ); return SCPE_OK; case SCPE_IOERR: + sim_debug(DEBUG_DETAIL, &cdr_dev, "%d: ERF\n", u); uptr->u5 |= URCSTA_ERR; uptr->u5 &= ~(URCSTA_BUSY|URCSTA_READ); chan_set_attn(chan); @@ -260,7 +262,10 @@ cdr_srv(UNIT *uptr) { if (ch == 0x7f) { #ifdef I7080 uptr->u5 &= ~(URCSTA_READ|URCSTA_BUSY); + sim_debug(DEBUG_DETAIL, &cdr_dev, "%d: bad punch %d\n", u, + uptr->u4); chan_set_attn(chan); + chan_set_error(chan); chan_clear(chan, DEV_SEL); #else uptr->u5 |= URCSTA_ERR; diff --git a/I7000/i7000_con.c b/I7000/i7000_con.c index 8379078..75b717b 100644 --- a/I7000/i7000_con.c +++ b/I7000/i7000_con.c @@ -56,18 +56,10 @@ con_data[NUM_DEVS_CON]; uint32 con_cmd(UNIT *, uint16, uint16); void con_ini(UNIT *, t_bool); t_stat con_srv(UNIT *); -t_stat con_reset(DEVICE *); -t_stat con_attach(UNIT *, CONST char *); -t_stat con_detach(UNIT *); t_stat con_help(FILE *, DEVICE *, UNIT *, int32, const char *); const char *con_description(DEVICE *dptr); extern char ascii_to_six[128]; -extern t_stat chan_boot(int32, DEVICE *); -#ifdef I7070 -t_stat cdr_setload(UNIT *, int32, char *, void *); -t_stat cdr_getload(FILE *, UNIT *, int32, void *); -#endif UNIT con_unit[] = { {UDATA(con_srv, UNIT_S_CHAN(CHAN_CHUREC), 0), 0}, /* A */ @@ -75,7 +67,7 @@ UNIT con_unit[] = { DEVICE con_dev = { "INQ", con_unit, NULL, NULL, - NUM_DEVS_LPR, 8, 15, 1, 8, 8, + NUM_DEVS_CON, 8, 15, 1, 8, 8, NULL, NULL, NULL, NULL, NULL, NULL, &con_dib, DEV_DISABLE | DEV_DEBUG, 0, dev_debug, NULL, NULL, &con_help, NULL, NULL, &con_description diff --git a/I7000/i7000_mt.c b/I7000/i7000_mt.c index 138d3e0..2389620 100644 --- a/I7000/i7000_mt.c +++ b/I7000/i7000_mt.c @@ -514,7 +514,7 @@ uint32 mt_cmd(UNIT * uptr, uint16 cmd, uint16 dev) } uptr->u5 |= MT_WEF; mt_chan[chan] |= MTC_BSY; -#if I7010 | I7080 +#if I7010 chan_set_sel(chan, 1); chan_clear_status(chan); mt_chan[chan] = 0; @@ -748,9 +748,9 @@ t_stat mt_srv(UNIT * uptr) if ((mt_chan[chan] & 037) == (MTC_SEL | unit) && chan_stat(chan, DEV_DISCO)) { uptr->u5 &= ~MT_CMDMSK; + reclen = uptr->hwmark; if (cmd == MT_WRS || cmd == MT_WRSB) { if (uptr->u6 > 0) { - reclen = uptr->hwmark; uptr->u3 += GAP_LEN; sim_debug(DEBUG_DETAIL, dptr, "Write flush unit=%d %s Block %d chars\n", diff --git a/I7000/i7080_chan.c b/I7000/i7080_chan.c index c8fac7b..7150454 100644 --- a/I7000/i7080_chan.c +++ b/I7000/i7080_chan.c @@ -338,6 +338,9 @@ int chan_decr_reccnt(int chan) { } } } + if (chan_dev.dctrl & (0x0100 << chan)) + sim_debug(DEBUG_DETAIL, &chan_dev, "chan %d reccnt- %02o %02o %02o\n", + chan, AC[unit + 3], AC[unit + 2], AC[unit + 1]); if (AC[unit + 1] == 10 && AC[unit + 2] == 10 && AC[unit + 3] == 10) return 1; return 0; @@ -475,11 +478,16 @@ chan_proc() case CHAN_7621: case CHAN_7908: irqflags |= 1 << chan; + if (chan_dev.dctrl & cmask) + sim_debug(DEBUG_EXP, &chan_dev, "chan %d IRQ %x\n", + chan, irqdev[chan]); break; } chan_flags[chan] &= ~(CHS_ATTN|STA_ACTIVE|STA_WAIT|DEV_WRITE); + cmd[chan] &= ~CHAN_RECCNT; unit = irqdev[chan]; - ioflags[unit/8] |= (1 << (unit & 07)); + if (chan_flags[chan] & CHS_EOF) + ioflags[unit/8] |= (1 << (unit & 07)); flags |= 0x400; /* Set Any flag */ /* Disconnect if selected */ if (chan_flags[chan] & DEV_SEL) @@ -752,11 +760,11 @@ chan_proc() } void chan_set_attn_inq(int chan) { -// inquiry = 1; +/* inquiry = 1; */ } void chan_clear_attn_inq(int chan) { - // inquiry = 0; +/* inquiry = 0; */ } @@ -872,8 +880,7 @@ chan_cmd(uint16 dev, uint16 dcmd, uint32 addr) case IO_WEF: case IO_ERG: case IO_BSR: - unit = 512 + chan_unit[chan].u3 * 32; - if (AC[unit+1] == 10 && AC[unit+2] == 10 && AC[unit+3] == 10) { + if (chan_zero_reccnt(chan)) { /* Just check if unit ready */ r = chan_issue_cmd(chan, OP_TRS, dev); if (r == SCPE_OK) @@ -914,7 +921,7 @@ chan_cmd(uint16 dev, uint16 dcmd, uint32 addr) AC[unit+16+5] = 10; /* Set digit next to 0 */ AC[unit+24+5] = 10; store_addr(caddr[chan], 8 + unit); - if (cmd[chan] & CHAN_RECCNT && chan_decr_reccnt(chan)) { + if (cmd[chan] & CHAN_RECCNT && chan_zero_reccnt(chan)) { cmd[chan] &= ~CHAN_RECCNT; } break; @@ -928,10 +935,11 @@ chan_cmd(uint16 dev, uint16 dcmd, uint32 addr) case IO_WEF: case IO_ERG: case IO_BSR: - if (cmd[chan] & CHAN_RECCNT && chan_decr_reccnt(chan)) { + if (cmd[chan] & CHAN_RECCNT && chan_zero_reccnt(chan)) { cmd[chan] &= ~CHAN_RECCNT; } if (cmd[chan] & CHAN_RECCNT) { + chan_decr_reccnt(chan); cmd[chan] &= CHAN_RECCNT; cmd[chan] |= (op << 9) | CHAN_CMD; } diff --git a/I7000/i7080_cpu.c b/I7000/i7080_cpu.c index a7d06f6..7d7f802 100644 --- a/I7000/i7080_cpu.c +++ b/I7000/i7080_cpu.c @@ -59,6 +59,7 @@ */ #include "i7080_defs.h" +#include "sim_card.h" #include #define UNIT_V_MSIZE (UNIT_V_UF + 0) @@ -95,7 +96,7 @@ struct InstHistory uint8 reg; uint8 op; uint16 flags; - uint8 store[32]; + uint8 store[256]; }; t_stat cpu_ex(t_value * vptr, t_addr addr, UNIT * uptr, @@ -543,10 +544,12 @@ stop_cpu: if (temp == 0x20) /* Channel 40 */ addr = 0x400; } + sim_debug(DEBUG_TRAP, &cpu_dev, "Trap on channel %x\n", addr); irqflags &= ~temp; load_cpu(addr, 0); intprog = 1; spc = 0x200; + sim_debug(DEBUG_TRAP, &cpu_dev, "Trap to addr %d\n", IC); } /* Make sure IC is on correct boundry */ if ((IC % 5) != 4) { @@ -877,10 +880,12 @@ stop_cpu: switch(reg) { case 7: /* C */ /* Develop parity */ - t = (t ^ (t << 3)) & 070; /* 654 ^ 321 */ - t = (t ^ (t << 2)) & 0140; /* C6 ^ 54 */ - t ^= ((t << 1) & 0100); + t = sim_parity_table[t & 077]; t ^= M[MAC % EMEMSIZE] & 0100; /* C654 */ + if (t == 0) + IC = MA; + break; + case 1: /* 1 */ case 2: /* 2 */ case 3: /* 4 */ @@ -1042,6 +1047,12 @@ stop_cpu: MAC--; addr = next_addr[addr]; sim_interval --; /* count down */ + if (sim_interval <= 0) { /* event queue? */ + reason = sim_process_event(); + if (reason != 0) + break; + chan_proc(); + } } /* Insert a mark at new end */ AC[addr] = 0; @@ -2213,7 +2224,7 @@ stop_cpu: if (hst_lnt) { /* history enabled? */ hst[hst_p].flags = flags; addr = get_acstart(reg); - for (t = 0; t < 32; t++) { + for (t = 0; t < 254; t++) { hst[hst_p].store[t] = AC[addr]; addr = next_addr[addr]; if (hst[hst_p].store[t] == 0) @@ -3336,8 +3347,7 @@ cpu_show_hist(FILE * st, UNIT * uptr, int32 val, CONST void *desc) di = hst_p - lnt; /* work forward */ if (di < 0) di = di + hst_lnt; - fprintf(st, -"IC OP MA REG\n\n"); + fprintf(st, "IC OP MA REG\n\n"); for (k = 0; k < lnt; k++) { /* print specified */ h = &hst[(++di) % hst_lnt]; /* entry pointer */ if (h->ic & HIST_PC) { /* instruction? */ @@ -3349,7 +3359,7 @@ cpu_show_hist(FILE * st, UNIT * uptr, int32 val, CONST void *desc) sim_eval[3] = (h->inst >> (1 * 6)) & 077; sim_eval[4] = h->inst & 077; (void)fprint_sym (st, h->ic, sim_eval, &cpu_unit, SWMASK('M')); - for(len = 0; len < 32 && (h->store[len] & 077) != 0; len++); + for(len = 0; len < 256 && (h->store[len] & 077) != 0; len++); fprintf(st, "\t%-2d %c%c %c%c %c@", len, (h->flags & AZERO)?'Z':' ', (h->flags & ASIGN)?'-':'+', (h->flags & BZERO)?'Z':' ', (h->flags & BSIGN)?'-':'+', diff --git a/I7000/i7080_sys.c b/I7000/i7080_sys.c index c4b6334..56f7000 100644 --- a/I7000/i7080_sys.c +++ b/I7000/i7080_sys.c @@ -220,8 +220,8 @@ load_rec(uint8 *image) { while(addr > EMEMSIZE) addr -= EMEMSIZE; /* Wrap around */ len = bcd_bin[image[14] & 0xf]; len += 10 * bcd_bin[image[13] & 0xf]; - if (len > 64) - len = 64; + if (len > 65) + len = 65; if (len == 0) { IC = addr; return 1;