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SEL32: Add iocl processing support per device.

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This commit is contained in:
AZBevier 2020-12-03 20:25:20 -07:00
parent 99cc00f83a
commit e3e3133760
16 changed files with 6323 additions and 1997 deletions
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1378
SEL32/sel32_chan.c
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File diff suppressed because it is too large Load Diff

14
SEL32/sel32_clk.c
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@ -128,7 +128,7 @@ t_stat rtc_srv (UNIT *uptr)
((SPAD[rtc_lvl+0x80] & SINT_ACT) == 0))) { /* in spad too */
/* HACK for console I/O stopping */
/* This reduces the number of console I/O stopping errors */
/* need tp find real cause of I/O stopping on clock interrupt */
/* need to find real cause of I/O stopping on clock interrupt */
if ((outbusy==0) && (inbusy==0)) /* skip interrupt if con I/O in busy wait */
INTS[rtc_lvl] |= INTS_REQ; /* request the interrupt */
irq_pend = 1; /* make sure we scan for int */
@ -247,9 +247,9 @@ const char *itm_desc(DEVICE *dptr);
itm_reg Interval Timer ITM register list
*/
/* Mike suggested I remove the UNIT_IDLE flag from ITM. This causes SEL32 */
/* Mark suggested I remove the UNIT_IDLE flag from ITM. This causes SEL32 */
/* to use 100% of the CPU instead of waiting and running 10% cpu usage */
//BAD Mike UNIT itm_unit = { UDATA (&itm_srv, 0, 0), 26042, UNIT_ADDR(0x7F04)};
//BAD Mark UNIT itm_unit = { UDATA (&itm_srv, UNIT_IDLE, 0), 26042, UNIT_ADDR(0x7F04)};
UNIT itm_unit = { UDATA (&itm_srv, 0, 0), 26042, UNIT_ADDR(0x7F04)};
REG itm_reg[] = {
@ -493,7 +493,7 @@ int32 itm_rdwr(uint32 cmd, int32 cnt, uint32 level)
if (itm_run) { /* if we were running save curr cnt */
/* read timer value */
temp = (uint32)(100.0*sim_activate_time_usecs(&itm_unit)/itm_tick_size_x_100);
sim_debug(DEBUG_CMD, &itm_dev, "Intv 0x%2x temp value %08x (%d)\n", cmd, temp, temp);
sim_debug(DEBUG_CMD, &itm_dev, "Intv 0x%2x read value %08x (%d)\n", cmd, temp, temp);
if (itm_strt) { /* see if running neg */
/* we only get here if timer ran out and no reload value */
/* get simulated negative start time in counts */
@ -510,7 +510,7 @@ int32 itm_rdwr(uint32 cmd, int32 cnt, uint32 level)
if (itm_run) { /* if we were running save curr cnt */
/* read timer value */
temp = (uint32)(100.0*sim_activate_time_usecs(&itm_unit)/itm_tick_size_x_100);
sim_debug(DEBUG_CMD, &itm_dev, "Intv 0x%2x temp value %08x (%d)\n", cmd, temp, temp);
sim_debug(DEBUG_CMD, &itm_dev, "Intv 0x%2x read value %08x (%d)\n", cmd, temp, temp);
if (itm_strt) { /* see if running neg */
/* we only get here if timer ran out and no reload value */
/* get simulated negative start time in counts */
@ -534,7 +534,7 @@ int32 itm_rdwr(uint32 cmd, int32 cnt, uint32 level)
if (itm_run) { /* if we were running save curr cnt */
/* read timer value */
temp = (uint32)(100.0*sim_activate_time_usecs(&itm_unit)/itm_tick_size_x_100);
sim_debug(DEBUG_CMD, &itm_dev, "Intv 0x%2x temp value %08x (%d)\n", cmd, temp, temp);
sim_debug(DEBUG_CMD, &itm_dev, "Intv 0x%2x read value %08x (%d)\n", cmd, temp, temp);
if (itm_strt) { /* see if running neg */
/* we only get here if timer ran out and no reload value */
/* get simulated negative start time in counts */
@ -565,7 +565,7 @@ int32 itm_rdwr(uint32 cmd, int32 cnt, uint32 level)
if (itm_run) { /* if we were running save curr cnt */
/* read timer value */
temp = (uint32)(100.0*sim_activate_time_usecs(&itm_unit)/itm_tick_size_x_100);
sim_debug(DEBUG_CMD, &itm_dev, "Intv 0x%2x temp value %08x (%d)\n", cmd, temp, temp);
sim_debug(DEBUG_CMD, &itm_dev, "Intv 0x%2x read value %08x (%d)\n", cmd, temp, temp);
if (itm_strt) { /* see if running neg */
/* we only get here if timer ran out and no reload value */
/* get simulated negative start time in counts */

16
SEL32/sel32_com.c
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@ -242,12 +242,16 @@ UNIT com_unit[] = {
DIB com_dib = {
NULL, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
com_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
com_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
com_unit, /* UNIT* units */ /* Pointer to units structure */
com_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
COM_UNITS, /* uint8 numunits */ /* number of units defined */
0xFF, /* uint8 mask */ /* 16 devices - device mask */
0x7E00, /* uint16 chan_addr */ /* parent channel address */
@ -314,12 +318,16 @@ UNIT coml_unit[] = {
DIB coml_dib = {
NULL, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
com_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
coml_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
coml_unit, /* UNIT* units */ /* Pointer to units structure */
coml_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
COM_LINES*2, /* uint8 numunits */ /* number of units defined */
0xff, /* uint8 mask */ /* 16 devices - device mask */
0x7E00, /* uint16 chan_addr */ /* parent channel address */

286
SEL32/sel32_con.c
View File

@ -45,6 +45,7 @@
#define CON_NOP 0x03 /* No op command */
#define CON_SNS 0x04 /* Sense command */
#define CON_ECHO 0x0a /* Read with Echo */
#define CON_RDBWD 0x0c /* Read backward */
#define CON_CON 0x1f /* connect line */
#define CON_DIS 0x23 /* disconnect line */
#define CON_RWD 0x37 /* TOF and write line */
@ -53,10 +54,10 @@
/* Status held in u3 */
/* controller/unit address in upper 16 bits */
#define CON_INPUT 0x100 /* Input ready for unit */
#define CON_CR 0x200 /* Output at beginning of line */
#define CON_REQ 0x400 /* Request key pressed */
#define CON_EKO 0x800 /* Echo input character */
#define CON_INPUT 0x0100 /* Input ready for unit */
#define CON_CR 0x0200 /* Output at beginning of line */
#define CON_REQ 0x0400 /* Request key pressed */
#define CON_EKO 0x0800 /* Echo input character */
#define CON_OUTPUT 0x1000 /* Output ready for unit */
#define CON_READ 0x2000 /* Read mode selected */
#define CON_ATAT 0x4000 /* working on @@A input */
@ -119,12 +120,16 @@ UNIT con_unit[] = {
DIB con_dib = {
con_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Start I/O */
con_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
con_haltio, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
con_haltio, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
con_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
con_unit, /* UNIT* units */ /* Pointer to units structure */
con_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
NUM_UNITS_CON, /* uint8 numunits */ /* number of units defined */
0x0f, /* uint8 mask */ /* 2 devices - device mask */
0x7e00, /* uint16 chan_addr */ /* parent channel address */
@ -165,13 +170,13 @@ uint16 con_preio(UNIT *uptr, uint16 chan) {
}
sim_debug(DEBUG_CMD, &con_dev, "con_preio unit=%02x OK\n", unit);
return 0; /* good to go */
return SCPE_OK; /* good to go */
}
/* start an I/O operation */
uint16 con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
int unit = (uptr - con_unit); /* unit 0 is read, unit 1 is write */
uint8 ch;
// uint8 ch;
if ((uptr->CMD & CON_MSK) != 0) { /* is unit busy */
sim_debug(DEBUG_CMD, &con_dev,
@ -182,69 +187,42 @@ uint16 con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
sim_debug(DEBUG_CMD, &con_dev,
"con_startcmd unit %01x chan %02x cmd %02x enter\n", unit, chan, cmd);
/* substitute CON_INCH2 for CON_INCH for pprocessing */
if (cmd == CON_INCH)
cmd = CON_INCH2; /* save INCH command as 0xf0 */
// uptr->CMD &= LMASK; /* leave only chsa */
/* process the commands */
switch (cmd & 0xFF) {
case CON_INCH: /* 0x00 */ /* INCH command */
sim_debug(DEBUG_CMD, &con_dev, "con_startcmd %04x: Cmd INCH\n", chan);
uptr->CMD &= LMASK; /* leave only chsa */
uptr->CMD |= CON_INCH2; /* save INCH command as 0xf0 */
uptr->SNS = SNS_RDY|SNS_ONLN; /* status is online & ready */
if (unit == 1)
//720 sim_activate(uptr, 240); /* start us off */
sim_activate(uptr, 200); /* start us off */
return 0; /* no status change */
break;
case CON_ECHO: /* 0x0a */ /* Read command w/ECHO */
uptr->CMD |= CON_EKO; /* save echo status */
case CON_RD: /* 0x02 */ /* Read command */
atbuf = 0; /* reset attention buffer */
uptr->CMD |= CON_READ; /* show read mode */
/* fall through */
case CON_INCH2: /* 0xf0 */ /* INCH command */
case CON_RWD: /* 0x37 */ /* TOF and write line */
case CON_WR: /* 0x01 */ /* Write command */
/* if input requested for output device, give error */
uptr->CMD &= LMASK; /* leave only chsa */
uptr->CMD |= (cmd & CON_MSK); /* save command */
uptr->SNS = SNS_RDY|SNS_ONLN; /* status is online & ready */
if (unit == 1)
//720 sim_activate(uptr, 240); /* start us off */
sim_activate(uptr, 200); /* start us off */
return 0; /* no status change */
break;
case CON_RD: /* 0x02 */ /* Read command */
case CON_ECHO: /* 0x0a */ /* Read command w/ECHO */
/* if output requested for input device, give error */
uptr->CMD &= ~CON_MSK; /* remove old CMD */
uptr->CMD |= (cmd & CON_MSK); /* save command */
if (cmd == CON_ECHO) /* echo command? */
uptr->CMD |= CON_EKO; /* save echo status */
uptr->CMD |= CON_READ; /* show read mode */
atbuf = 0; /* reset attention buffer */
uptr->SNS = SNS_RDY|SNS_ONLN; /* status is online & ready */
if (unit == 1)
//720 sim_activate(uptr, 240); /* start us off */
sim_activate(uptr, 200); /* start us off */
return 0;
break;
case CON_NOP: /* 0x03 */ /* NOP has do nothing */
uptr->SNS = SNS_RDY|SNS_ONLN; /* status is online & ready */
case CON_RDBWD: /* 0x0c */ /* Read Backward */
uptr->SNS |= (SNS_RDY|SNS_ONLN); /* status is online & ready */
case CON_CON: /* 0x1f */ /* Connect, return Data Set ready */
case CON_DIS: /* 0x23 */ /* Disconnect has do nothing */
case CON_SNS: /* 0x04 */ /* Sense */
uptr->CMD &= ~CON_MSK; /* remove old CMD */
uptr->CMD |= (cmd & CON_MSK); /* save command */
if (unit == 1)
//720 sim_activate(uptr, 240); /* start us off */
sim_activate(uptr, 200); /* start us off */
return 0; /* no status change */
break;
case 0x0C: /* 0x0C */ /* Unknown command */
uptr->SNS = SNS_RDY|SNS_ONLN; /* status is online & ready */
uptr->CMD &= LMASK; /* leave only chsa */
uptr->CMD |= (cmd & CON_MSK); /* save command */
if (unit == 1)
//720 sim_activate(uptr, 240); /* start us off */
sim_activate(uptr, 200); /* start us off */
return 0; /* no status change */
if (unit == 0)
sim_cancel(uptr); /* stop input poll */
// sim_activate(uptr, 400); /* start us off */
// sim_activate(uptr,1000); /* start us off */
sim_activate(uptr, 500); /* start us off */
return SCPE_OK; /* no status change */
break;
#ifdef NONO
case CON_CON: /* 0x1f */ /* Connect, return Data Set ready */
sim_debug(DEBUG_CMD, &con_dev, "con_startcmd %04x: Cmd %02x CON\n", chan, cmd);
sim_debug(DEBUG_CMD, &con_dev, "con_startcmd %04x: Cmd %02xN\n", chan, cmd);
uptr->SNS |= (SNS_DSR|SNS_DCD); /* Data set ready, Data Carrier detected */
return SNS_CHNEND|SNS_DEVEND; /* good return */
break;
@ -264,6 +242,7 @@ uint16 con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
chan_write_byte(GET_UADDR(uptr->CMD), &ch); /* write status */
return SNS_CHNEND|SNS_DEVEND; /* good return */
break;
#endif
default: /* invalid command */
break;
@ -273,7 +252,7 @@ uint16 con_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) {
sim_debug(DEBUG_CMD, &con_dev,
"con_startcmd %04x: Invalid command %02x Sense %02x\n",
chan, cmd, uptr->SNS);
return SNS_CHNEND|STATUS_PCHK;
return SNS_CHNEND|SNS_DEVEND|STATUS_PCHK;
}
/* Handle output transfers for console */
@ -296,7 +275,7 @@ t_stat con_srvo(UNIT *uptr) {
/* if input tried from output device, error */
case CON_RD: /* 0x02 */ /* Read command */
case CON_ECHO: /* 0x0a */ /* Read command w/ECHO */
case 0x0C: /* 0x0C */ /* Unknown command */
case CON_RDBWD: /* 0x0c */ /* Read Backward */
/* if input requested for output device, give error */
uptr->SNS |= SNS_CMDREJ; /* command rejected */
uptr->CMD &= LMASK; /* nothing left, command complete */
@ -305,6 +284,22 @@ t_stat con_srvo(UNIT *uptr) {
chan_end(chsa, SNS_CHNEND|SNS_UNITCHK); /* unit check */
break;
case CON_CON: /* 0x1f */ /* Connect, return Data Set ready */
uptr->SNS |= (SNS_DSR|SNS_DCD); /* Data set ready, Data Carrier detected */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvo CON CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
uptr->CMD &= ~CON_MSK; /* remove old CMD */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
break;
case CON_DIS: /* 0x23 */ /* Disconnect has do nothing */
uptr->SNS &= ~(SNS_DSR|SNS_DCD); /* Data set not ready */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvo DIS CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
uptr->CMD &= ~CON_MSK; /* remove old CMD */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
break;
case CON_INCH2: /* 0xf0 */ /* INCH command */
uptr->CMD &= LMASK; /* nothing left, command complete */
sim_debug(DEBUG_CMD, &con_dev,
@ -324,28 +319,53 @@ t_stat con_srvo(UNIT *uptr) {
}
sim_debug(DEBUG_CMD, &con_dev,
"con_srvo INCH CMD %08x chsa %04x len %02x inch %06x\n", uptr->CMD, chsa, len, mema);
chan_end(chsa, SNS_CHNEND); /* return OK */
/* WARNING, if SNS_DEVEND is not set, diags fail by looping in CON diag */
//1003 chan_end(chsa, SNS_CHNEND); /* return OK */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
break;
case CON_NOP: /* 0x03 */ /* NOP has do nothing */
uptr->CMD &= LMASK; /* nothing left, command complete */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvo NOP unit %02x: CMD %08x cmd %02x incnt %02x u4 %02x\n",
unit, uptr->CMD, cmd, con_data[unit].incnt, uptr->u4);
//1003 uptr->CMD &= LMASK; /* nothing left, command complete */
uptr->CMD &= ~CON_MSK; /* remove old CMD */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvo NOP CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
break;
case CON_SNS: /* 0x04 */ /* Sense */
/* value 4 is Data Set Ready */
/* value 5 is Data carrier detected n/u */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvo cmd %04x: Cmd Sense %02x\n", chsa, uptr->SNS);
/* value 4 is Data Set Ready */
/* value 5 is Data carrier detected n/u */
ch = uptr->SNS & 0xff; /* Sense byte 3 */
if (chan_write_byte(chsa, &ch)) { /* write byte to memory */
/* write error */
cmd = 0; /* no cmd now */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvo write error unit %02x: CMD %08x read %02x u4 %02x ccw_count %02x\n",
unit, uptr->CMD, ch, uptr->u4, chp->ccw_count);
uptr->CMD &= LMASK; /* nothing left, command complete */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
break;
}
uptr->CMD &= LMASK; /* nothing left, command complete */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* good return */
break;
case CON_RWD: /* 0x37 */ /* TOF and write line */
case CON_WR: /* 0x01 */ /* Write command */
#ifdef OLDWAY
/* see if write complete */
if (uptr->CMD & CON_OUTPUT) {
/* write is complete, post status */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvo write CMD %08x chsa %04x cmd %02x complete\n",
uptr->CMD, chsa, cmd);
uptr->CMD &= LMASK; /* nothing left, command complete */
//1003 uptr->CMD &= LMASK; /* nothing left, command complete */
uptr->CMD &= ~CON_MSK; /* remove old CMD */
uptr->CMD &= ~CON_OUTPUT; /* remove output command */
/*RTC*/ outbusy = 0; /* output done */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
break;
@ -362,13 +382,31 @@ t_stat con_srvo(UNIT *uptr) {
uptr->CMD |= CON_OUTPUT; /* output command complete */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvo write wait %03x CMD %08x chsa %04x cmd %02x to complete\n",
// 41*cnt+47, uptr->CMD, chsa, cmd);
19*cnt+23, uptr->CMD, chsa, cmd);
41*cnt+47, uptr->CMD, chsa, cmd);
// 19*cnt+23, uptr->CMD, chsa, cmd);
// sim_activate(uptr, 19*cnt+23); /* wait for a while */
// sim_activate(uptr, 31*cnt+47); /* wait for a while */
/*719*/ sim_activate(uptr, 41*cnt+47); /* wait for a while */
//719 sim_activate(uptr, 81*cnt+87); /* wait for a while */
break;
#else
/*RTC*/ outbusy = 1; /* tell clock output waiting */
/* Write to device */
while (chan_read_byte(chsa, &ch) == SCPE_OK) { /* get byte from memory */
/* HACK HACK HACK */
ch &= 0x7f; /* make 7 bit w/o parity */
sim_putchar(ch); /* output next char to device */
cnt++; /* count chars output */
}
/* write is complete, post status */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvo write CMD %08x chsa %04x cmd %02x complete\n",
uptr->CMD, chsa, cmd);
uptr->CMD &= LMASK; /* nothing left, command complete */
/*RTC*/ outbusy = 0; /* output done */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
break;
#endif
}
return SCPE_OK;
}
@ -384,9 +422,10 @@ t_stat con_srvi(UNIT *uptr) {
uint32 tstart;
uint8 ch;
t_stat r;
int32 wait_time=10000;
// sim_clock_coschedule(uptr, tmxr_poll); /* keep polling the input */
sim_clock_coschedule(uptr, 10000); /* keep polling the input */
// sim_clock_coschedule(uptr, 10000); /* keep polling the input */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi enter CMD %08x chsa %04x cmd %02x incnt %02x u4 %02x\n",
@ -397,7 +436,6 @@ t_stat con_srvi(UNIT *uptr) {
/* if output tried to input device, error */
case CON_RWD: /* 0x37 */ /* TOF and write line */
case CON_WR: /* 0x01 */ /* Write command */
case 0x0C: /* 0x0C */ /* Unknown command */
/* if input requested for output device, give error */
uptr->SNS |= SNS_CMDREJ; /* command rejected */
uptr->CMD &= LMASK; /* nothing left, command complete */
@ -427,23 +465,61 @@ t_stat con_srvi(UNIT *uptr) {
uptr->u4 = 0; /* no I/O yet */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi INCH CMD %08x chsa %04x len %02x inch %06x\n", uptr->CMD, chsa, len, mema);
/* WARNING, if SNS_DEVEND is not set, diags fail by looping in CON diag */
//1003 chan_end(chsa, SNS_CHNEND); /* return OK */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
/* drop through to poll input */
break;
case CON_NOP: /* 0x03 */ /* NOP has do nothing */
uptr->CMD &= LMASK; /* nothing left, command complete */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi NOP unit %02x: CMD %08x cmd %02x incnt %02x u4 %02x\n",
unit, uptr->CMD, cmd, con_data[unit].incnt, uptr->u4);
//1003 uptr->CMD &= LMASK; /* nothing left, command complete */
uptr->CMD &= ~CON_MSK; /* remove old CMD */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi NOP CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
/* drop through to poll input */
break;
case CON_RD: /* 0x02 */ /* read from device */
case CON_CON: /* 0x1f */ /* Connect, return Data Set ready */
uptr->SNS |= (SNS_DSR|SNS_DCD); /* Data set ready, Data Carrier detected */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi CON CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
uptr->CMD &= ~CON_MSK; /* remove old CMD */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
break;
case CON_DIS: /* 0x23 */ /* Disconnect has do nothing */
uptr->SNS &= ~(SNS_DSR|SNS_DCD); /* Data set not ready */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi DIS CMD %08x chsa %04x cmd = %02x\n", uptr->CMD, chsa, cmd);
uptr->CMD &= ~CON_MSK; /* remove old CMD */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
break;
case CON_SNS: /* 0x04 */ /* Sense */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi cmd %04x: Cmd Sense %02x\n", chsa, uptr->SNS);
/* value 4 is Data Set Ready */
/* value 5 is Data carrier detected n/u */
ch = uptr->SNS & 0xff; /* Sense byte 3 */
if (chan_write_byte(chsa, &ch)) { /* write byte to memory */
/* write error */
cmd = 0; /* no cmd now */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi write error unit %02x: CMD %08x read %02x u4 %02x ccw_count %02x\n",
unit, uptr->CMD, ch, uptr->u4, chp->ccw_count);
uptr->CMD &= LMASK; /* nothing left, command complete */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
break;
}
uptr->CMD &= LMASK; /* nothing left, command complete */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
break;
case CON_ECHO: /* 0x0a */ /* read from device w/ECHO */
uptr->CMD |= CON_EKO; /* save echo status */
case CON_RD: /* 0x02 */ /* read from device */
case CON_RDBWD: /* 0x0c */ /* Read Backward */
if ((uptr->u4 != con_data[unit].incnt) || /* input empty */
(uptr->CMD & CON_INPUT)) { /* input waiting? */
@ -457,46 +533,51 @@ t_stat con_srvi(UNIT *uptr) {
ch = con_data[unit].ibuff[uptr->u4]; /* get char from read buffer */
#ifndef ECHO_ON_READ_092220
/* this fixes mpx1x time entry on startup */
if (uptr->CMD & CON_EKO) /* ECHO requested */
sim_putchar(ch); /* ECHO the char */
if (uptr->CMD & CON_EKO) /* ECHO requested */
sim_putchar(ch); /* ECHO the char */
#endif
if (chan_write_byte(chsa, &ch)) { /* write byte to memory */
/* write error */
cmd = 0; /* no cmd now */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi write error unit %02x: CMD %08x read %02x u4 %02x ccw_count %02x\n",
unit, uptr->CMD, ch, uptr->u4, chp->ccw_count);
uptr->CMD &= LMASK; /* nothing left, command complete */
// uptr->CMD &= LMASK; /* nothing left, command complete */
uptr->CMD &= ~CON_MSK; /* remove old CMD */
uptr->CMD &= ~CON_INPUT; /* input waiting? */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
break;
}
/* character accepted, bump buffer pointer */
uptr->u4++; /* next char position */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi write to mem unit %02x: CMD %08x read %02x u4 %02x incnt %02x\n",
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt);
/* character accepted, bump buffer pointer */
uptr->u4++; /* next char position */
/* see if at end of buffer */
if (uptr->u4 >= sizeof(con_data[unit].ibuff))
if (uptr->u4 >= (int32)sizeof(con_data[unit].ibuff))
uptr->u4 = 0; /* reset pointer */
/* user want more data? */
if ((test_write_byte_end(chsa)) == 0) {
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi need more unit %02x CMD %08x u4 %02x incnt %02x ccw_count %02x\n",
unit, uptr->CMD, uptr->u4, con_data[unit].incnt, chp->ccw_count);
"con_srvi need more unit %02x CMD %08x u4 %02x ccw_count %02x incnt %02x\n",
unit, uptr->CMD, uptr->u4, chp->ccw_count, con_data[unit].incnt);
/* user wants more, look next time */
if (uptr->u4 == con_data[unit].incnt) { /* input empty */
uptr->CMD &= ~CON_INPUT; /* no input available */
}
// wait_time = 200; /* process next time */
// wait_time = 400; /* process next time */
wait_time = 800; /* process next time */
break;
}
/* command is completed */
cmd = 0; /* no cmd now */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi read done unit %02x: CMD %08x read %02x u4 %02x incnt %02x ccw_count %02x\n",
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt, chp->ccw_count);
"con_srvi read done unit %02x CMD %08x read %02x u4 %02x ccw_count %02x incnt %02x\n",
unit, uptr->CMD, ch, uptr->u4, chp->ccw_count, con_data[unit].incnt);
uptr->CMD &= LMASK; /* nothing left, command complete */
if (uptr->u4 != con_data[unit].incnt) { /* input empty */
uptr->CMD |= CON_INPUT; /* input still available */
@ -504,7 +585,9 @@ t_stat con_srvi(UNIT *uptr) {
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* we done */
break;
}
break;
}
default:
break;
}
@ -512,7 +595,8 @@ t_stat con_srvi(UNIT *uptr) {
r = sim_poll_kbd(); /* poll for a char */
if (r & SCPE_KFLAG) { /* got a char */
ch = r & 0xff; /* drop any extra bits */
if ((uptr->CMD & CON_INPUT) == 0) { /* looking for input? */
//1003 if ((uptr->CMD & CON_INPUT) == 0) { /* looking for input? */
if ((uptr->CMD & CON_READ)) { /* looking for input? */
atbuf = 0; /* reset attention buffer */
uptr->CMD &= ~CON_ATAT; /* no @@A input */
if (ch == '@') { /* maybe for console int */
@ -521,16 +605,9 @@ t_stat con_srvi(UNIT *uptr) {
}
if (ch == '\n') /* convert newline */
ch = '\r'; /* make newline into carriage return */
#ifdef TESTING
if (ch == 3) { /* see if <clt>C */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi ctrl^C readch unit %02x: CMD %08x read %02x u4 %02x incnt %02x\n",
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt);
}
#endif
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi handle readch unit %02x: CMD %08x read %02x u4 %02x incnt %02x\n",
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt);
"con_srvi handle readch unit %02x: CMD %08x read %02x u4 %02x incnt %02x r %x\n",
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt, r);
#ifdef ECHO_ON_READ_092220
/* this fixes mpx1x time entry on startup */
@ -549,6 +626,8 @@ t_stat con_srvi(UNIT *uptr) {
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi readch unit %02x: CMD %08x read %02x u4 %02x incnt %02x\n",
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt);
sim_activate(uptr, 400); /* do this again */
// sim_activate(uptr, 800); /* do this again */
// return sim_activate (uptr, 30); /* come back real soon */
return SCPE_OK;
}
@ -577,6 +656,8 @@ t_stat con_srvi(UNIT *uptr) {
uptr->u4 = 0; /* no input count */
con_data[unit].incnt = 0; /* no input data */
}
// sim_activate(uptr, wait_time); /* do this again */
sim_activate(uptr, 400); /* do this again */
return SCPE_OK;
}
/* char not for us, so keep looking */
@ -594,17 +675,20 @@ t_stat con_srvi(UNIT *uptr) {
if (con_data[unit].incnt >= sizeof(con_data[unit].ibuff))
con_data[unit].incnt = 0; /* reset buffer cnt */
#ifdef ECHO_ON_READ_092220
if (uptr->CMD & CON_EKO) /* ECHO requested */
sim_putchar(ch); /* ECHO the char */
#endif
/* put char in buffer */
con_data[unit].ibuff[con_data[unit].incnt++] = ch;
uptr->CMD |= CON_INPUT; /* we have a char available */
sim_debug(DEBUG_CMD, &con_dev,
"con_srvi readch2 unit %02x: CMD %08x read %02x u4 %02x incnt %02x\n",
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt);
"con_srvi readch2 unit %02x: CMD %08x read %02x u4 %02x incnt %02x r %x\n",
unit, uptr->CMD, ch, uptr->u4, con_data[unit].incnt, r);
}
sim_activate(uptr, wait_time); /* do this again */
return SCPE_OK;
}

1017
SEL32/sel32_cpu.c
View File

File diff suppressed because it is too large Load Diff

163
SEL32/sel32_defs.h
View File

@ -42,72 +42,73 @@
/* I/O equates */
/* Channel sense bytes set by device */
#define SNS_BSY 0x80 /* Unit Busy */
#define SNS_SMS 0x40 /* Status modified */
#define SNS_CTLEND 0x20 /* Control unit end */
#define SNS_ATTN 0x10 /* Unit attention */
#define SNS_CHNEND 0x08 /* Channel end */
#define SNS_DEVEND 0x04 /* Device end */
#define SNS_UNITCHK 0x02 /* Unit check */
#define SNS_UNITEXP 0x01 /* Unit exception */
#define SNS_BSY 0x80 /* Unit Busy */
#define SNS_SMS 0x40 /* Status modified */
#define SNS_CTLEND 0x20 /* Control unit end */
#define SNS_ATTN 0x10 /* Unit attention */
#define SNS_CHNEND 0x08 /* Channel end */
#define SNS_DEVEND 0x04 /* Device end */
#define SNS_UNITCHK 0x02 /* Unit check */
#define SNS_UNITEXP 0x01 /* Unit exception */
/* Command masks */
#define CCMDMSK 0xff000000 /* Mask for command */
#define CMD_CHAN 0x00 /* Channel control */
#define CMD_SENSE 0x04 /* Sense channel command */
#define CMD_TIC 0x08 /* Transfer in channel */
#define CMD_RDBWD 0x0c /* Read backward (not used) */
#define CCMDMSK 0xff000000 /* Mask for command */
#define CMD_CHAN 0x00 /* Channel control */
#define CMD_SENSE 0x04 /* Sense channel command */
#define CMD_TIC 0x08 /* Transfer in channel */
#define CMD_RDBWD 0x0c /* Read backward */
/* operation types */
#define CMD_TYPE 0x03 /* Type mask */
#define CMD_WRITE 0x01 /* Write command */
#define CMD_READ 0x02 /* Read command */
#define CMD_CTL 0x03 /* Control command */
#define CMD_TYPE 0x03 /* Type mask */
#define CMD_WRITE 0x01 /* Write command */
#define CMD_READ 0x02 /* Read command */
#define CMD_CTL 0x03 /* Control command */
/* IOCD word 2 status bits */
#define STATUS_ECHO 0x8000 /* Halt I/O and Stop I/O function */
#define STATUS_PCI 0x4000 /* Program controlled interrupt */
#define STATUS_LENGTH 0x2000 /* Incorrect length */
#define STATUS_PCHK 0x1000 /* Channel program check */
#define STATUS_CDATA 0x0800 /* Channel data check */
#define STATUS_CCNTL 0x0400 /* Channel control check */
#define STATUS_INTER 0x0200 /* Channel interface check */
#define STATUS_CHAIN 0x0100 /* Channel chain check */
#define STATUS_BUSY 0x0080 /* Device busy */
#define STATUS_MOD 0x0040 /* Status modified */
#define STATUS_CTLEND 0x0020 /* Controller end */
#define STATUS_ATTN 0x0010 /* Device raised attention */
#define STATUS_CEND 0x0008 /* Channel end */
#define STATUS_DEND 0x0004 /* Device end */
#define STATUS_CHECK 0x0002 /* Unit check */
#define STATUS_EXPT 0x0001 /* Unit exception */
#define STATUS_ERROR 0x3f03 /* bad errors */
#define STATUS_ECHO 0x8000 /* Halt I/O and Stop I/O function */
#define STATUS_PCI 0x4000 /* Program controlled interrupt */
#define STATUS_LENGTH 0x2000 /* Incorrect length */
#define STATUS_PCHK 0x1000 /* Channel program check */
#define STATUS_CDATA 0x0800 /* Channel data check */
#define STATUS_CCNTL 0x0400 /* Channel control check */
#define STATUS_INTER 0x0200 /* Channel interface check */
#define STATUS_CHAIN 0x0100 /* Channel chain check */
#define STATUS_BUSY 0x0080 /* Device busy */
#define STATUS_MOD 0x0040 /* Status modified */
#define STATUS_CTLEND 0x0020 /* Controller end */
#define STATUS_ATTN 0x0010 /* Device raised attention */
#define STATUS_CEND 0x0008 /* Channel end */
#define STATUS_DEND 0x0004 /* Device end */
#define STATUS_CHECK 0x0002 /* Unit check */
#define STATUS_EXPT 0x0001 /* Unit exception */
#define STATUS_ERROR 0x3f03 /* bad errors */
//#define STATUS_ERROR (STATUS_LENGTH|STATUS_PCHK|STATUS_CDATA|STATUS_CCNTL|
// STATUS_INTER|STATUS_CHAIN|STATUS_CHECK|STATUS_EXPT)
/* Class F channel bits */
/* bit 32 - 37 of IOCD word 2 (0-5) */
/* ccw_flags bit assignment */
#define FLAG_DC 0x8000 /* Data chain */
#define FLAG_CC 0x4000 /* Chain command */
#define FLAG_SLI 0x2000 /* Suppress length indicator */
#define FLAG_SKIP 0x1000 /* Suppress memory write */
#define FLAG_PCI 0x0800 /* Program controlled interrupt */
#define FLAG_RTO 0x0400 /* Real-Time Option */
#define FLAG_DC 0x8000 /* Data chain */
#define FLAG_CC 0x4000 /* Chain command */
#define FLAG_SLI 0x2000 /* Suppress length indicator */
#define FLAG_SKIP 0x1000 /* Suppress memory write */
#define FLAG_PCI 0x0800 /* Program controlled interrupt */
#define FLAG_RTO 0x0400 /* Real-Time Option */
/* chan_byte bit assignments */
#define BUFF_EMPTY 0x0 /* Buffer is empty */
#define BUFF_BUSY 0x4 /* Channel program busy & empty */
#define BUFF_NEXT 0xC /* 0x08|0x04 Continue Channel with next IOCB */
#define BUFF_CHNEND 0x14 /* 0x10|0x04 Channel end */
#define BUFF_DONE 0x20 /* 0x20 Channel ready for new command */
#define BUFF_POST 0x24 /* 0x20|0x04 Waiting for status to be posted */
#define BUFF_EMPTY 0x00 /* Buffer is empty */
#define BUFF_BUSY 0x04 /* Channel program busy & empty */
#define BUFF_NEXT 0x0C /* 0x08|0x04 Continue Channel with next IOCB */
#define BUFF_CHNEND 0x14 /* 0x10|0x04 Channel end */
#define BUFF_DONE 0x20 /* 0x20 Channel ready for new command */
#define BUFF_POST 0x24 /* 0x20|0x04 Waiting for status to be posted */
/* chan_info bit flags */
#define INFO_SIOCD 0x01 /* Initial IOCD from SIO if set */
/* bits 0-6 unused */
#define INFO_SIOCD 0x01 /* Initial IOCD from SIO if set */
#define INFO_CEND 0x02 /* Channel End (chan_end) called if set */
/* bits 0-5 unused */
#define MAX_CHAN 128 /* max channels that can be defined */
#define SUB_CHANS 256 /* max sub channels that can be defined */
#define MAX_CHAN 128 /* max channels that can be defined */
#define SUB_CHANS 256 /* max sub channels that can be defined */
#define MAX_DEV (MAX_CHAN * SUB_CHANS) /* max possible */
/* simulator devices configuration */
@ -127,7 +128,7 @@
//#define NUM_UNITS_DISK 2 /* 2 disk drive devices */
#define NUM_UNITS_DISK 4 /* 4 disk drive devices */
#define NUM_DEVS_SCFI 1 /* 1 scfi (SCSI) disk drive units */
#define NUM_UNITS_SCFI 1 /* 1 of 4 disk drive devices */
#define NUM_UNITS_SCFI 2 /* 1 of 4 disk drive devices */
#define NUM_DEVS_SCSI 2 /* 2 scsi (MFP SCSI) scsi buss units */
#define NUM_UNITS_SCSI 2 /* 2 scsi disk drive devices */
#define NUM_DEVS_RTOM 1 /* 1 IOP RTOM channel */
@ -135,7 +136,7 @@
#define NUM_DEVS_LPR 1 /* 1 IOP Line printer */
#define NUM_UNITS_LPR 1 /* 1 IOP Line printer device */
#define NUM_DEVS_ETHER 1 /* 1 Ethernet controller */
#define NUM_UNITS_ETHER 1 /* 1 Ethernet controller */
#define NUM_UNITS_ETHER 10 /* 10 Ethernet devices */
extern DEVICE cpu_dev; /* cpu device */
extern UNIT cpu_unit; /* the cpu unit */
@ -203,7 +204,7 @@ extern DEVICE ec_dev;
typedef struct chp {
/* channel program values */
UNIT *unitptr; /* Back pointer to units structure */
uint32 chan_inch_addr; /* Channel status dw in memory */
uint32 chan_inch_addr; /* Channel status dw addr in memory */
uint32 chan_caw; /* Channel command address word */
uint32 ccw_addr; /* Channel address */
uint32 chan_buf; /* Channel data buffer */
@ -219,31 +220,54 @@ typedef struct chp {
/* Device information block */
#define FIFO_SIZE 256 /* fifo to hold 128 double words of status */
extern int32 FIFO_Put(uint16 chsa, uint32 entry);
extern int32 FIFO_Get(uint16 chsa, uint32 *old);
extern int32 FIFO_Num(uint16 chsa);
#define IOCLQ_SIZE 32 /* fifo to hold 32 iocl cmds */
typedef struct ioclq {
uint32 ioclq_fifo[IOCLQ_SIZE];
int16 ioclq_in;
int16 ioclq_out;
} IOCLQ;
extern int32 IOCLQ_Put(IOCLQ *qptr, uint32 entry);
extern int32 IOCLQ_Get(IOCLQ *qptr, uint32 *old);
extern int32 IOCLQ_Num(IOCLQ *qptr);
typedef struct dib {
/* Pre start I/O operation */
uint16 (*pre_io)(UNIT *uptr, uint16 chan);
/* Start a channel command SIO */
uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd);
/* Halt I/O HIO */
uint16 (*halt_io)(UNIT *uptr);
uint16 (*halt_io)(UNIT *uptr); /* Halt I/O */
/* Test I/O STOPIO */
uint16 (*stop_io)(UNIT *uptr); /* Stop I/O */
/* Test I/O TESTIO */
uint16 (*test_io)(UNIT *uptr);
uint16 (*test_io)(UNIT *uptr); /* Test I/O */
/* Reset Controller RSCTL */
uint16 (*rsctl_io)(UNIT *uptr); /* Reset Controller */
/* Reset Controller RSCHNL */
uint16 (*rschnl_io)(UNIT *uptr); /* Reset Channel */
/* Post I/O processing */
uint16 (*post_io)(UNIT *uptr);
uint16 (*iocl_io)(CHANP *chp, int32 tic_ok); /* IOCL processing */
/* Controller init */
void (*dev_ini)(UNIT *, t_bool); /* init function */
UNIT *units; /* Pointer to units structure */
CHANP *chan_prg; /* Pointer to channel program */
uint8 numunits; /* number of units */
uint8 mask; /* device mask */
uint16 chan_addr; /* parent channel address */
uint32 chan_fifo_in; /* fifo input index */
uint32 chan_fifo_out; /* fifo output index */
UNIT *units; /* Pointer to units structure */
CHANP *chan_prg; /* Pointer to channel program */
IOCLQ *ioclq_ptr; /* pointer to array of IOCLQ entries */
uint8 numunits; /* number of units */
uint8 mask; /* device mask */
uint16 chan_addr; /* parent channel address */
uint32 chan_fifo_in; /* fifo input index */
uint32 chan_fifo_out; /* fifo output index */
uint32 chan_fifo[FIFO_SIZE]; /* interrupt status fifo for each channel */
} DIB;
extern DIB *dib_unit[MAX_DEV]; /* Pointer to Device info block */
extern DIB *dib_chan[MAX_CHAN]; /* Pointer to channel mux dib */
extern DIB *dib_unit[MAX_DEV]; /* Pointer to Device info block */
extern DIB *dib_chan[MAX_CHAN]; /* Pointer to channel mux dib */
#define DEV_CHAN (1 << DEV_V_UF) /* Device is channel mux if set */
#define DEV_V_UF2 (DEV_V_UF+1) /* current usage */
@ -324,7 +348,7 @@ extern DEBTAB dev_debug[];
#define MODEL_V6 6 /* V6 CPU */
#define MODEL_V9 7 /* V9 CPU */
#define TMR_RTC 1
#define TMR_RTC 1 /* RTC will not work if set to 0!! */
//#define TMR_RTC 0
#define HIST_MIN 64
@ -348,7 +372,7 @@ extern DEBTAB dev_debug[];
#define BASEBIT 0x02000000 /* Base Mode PSD 1 bit 6 */
#define AEXPBIT 0x01000000 /* Arithmetic exception PSD 1 bit 7 */
#define BLKEDBIT 0x00004000 /* Set blocked mode, PSD 2 bit 17 */
#define SETBBIT 0x00004000 /* Set blocked mode, PSD 2 bit 17 */
#define RETBBIT 0x00008000 /* Retain current blocking state, PSD 2 bit 16 */
#define RETMBIT 0x00010000 /* Retain current maps, PSD 2 bit 15 */
#define MAPBIT 0x80000000 /* Map mode, PSD 2 bit 0 */
@ -431,11 +455,10 @@ extern DEBTAB dev_debug[];
/* INTS int entry equates, entries accessed by interrupt level number */
#define INTS_NU1 0x80000000 /* Not used */
#define INTS_NU2 0x40000000 /* Not used */
#define INTS_REQ 0x40000000 /* Interrupt is requesting (use bit 1) */
#define INTS_ACT 0x20000000 /* Interrupt active when set (copy is of SPAD */
#define INTS_ENAB 0x10000000 /* Interrupt enabled when set (copy is of SPAD */
#define INTS_EXTL 0x00800000 /* IOP/RTOM ext interrupt if set, I/O if not set (copy of SPAD) */
#define INTS_REQ 0x40000000 /* Interrupt is requesting (use bit 1) */
/* ReadAddr memory access requested */
#define MEM_RD 0x0 /* read memory */
@ -493,3 +516,5 @@ extern int32 RDYQ_Put(uint32 entry);
extern int32 RDYQ_Get(uint32 *old);
extern int32 RDYQ_Num(void);
#define get_chan(chsa) ((chsa>>8)&0x7f) /* get channel number from ch/sa */

1786
SEL32/sel32_disk.c
View File

File diff suppressed because it is too large Load Diff

328
SEL32/sel32_ec.c
View File

@ -207,19 +207,21 @@ struct ec_device {
int poll; /* Need to poll receiver */
} ec_data;
int8 conf[12] = {0}; /* user specified configuration */
uint8 conf[12] = {0}; /* user specified configuration */
extern int32 tmxr_poll;
extern int32 tmxr_poll;
extern uint32 readfull(CHANP *chp, uint32 maddr, uint32 *word);
static CONST ETH_MAC broadcast_ethaddr = {0xff,0xff,0xff,0xff,0xff,0xff};
/* channel program information */
//CHANP ec_chp[8] = {0};
CHANP ec_chp[10] = {0};
CHANP ec_chp[NUM_UNITS_ETHER] = {0};
uint16 ec_startcmd(UNIT *uptr, uint16 chan, uint8 cmd) ;
uint16 ec_startcmd(UNIT *uptr, uint16 chan, uint8 cmd);
t_stat ec_srv(UNIT *uptr);
uint16 ec_haltio(UNIT *uptr);
uint16 ec_iocl(CHANP *chp, int32 tic_ok);
void ec_packet_debug(struct ec_device *ec, const char *action, ETH_PACK *packet);
t_stat ec_reset (DEVICE *dptr);
void ec_ini(UNIT *, t_bool);
@ -260,14 +262,18 @@ UNIT ec_unit[] = {
DIB ec_dib = {
NULL, /* Pre start I/O */
ec_startcmd, /* Start a command */
ec_haltio, /* Halt I/O */
NULL, /* Test I/O */
NULL, /* Post I/O */
ec_ini, /* init function */
ec_unit, /* Pointer to units structure */
ec_chp, /* Pointer to chan_prg structure */
ec_haltio, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
ec_iocl, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
ec_ini, /* void (*dev_ini)(UNIT *uptr) */ /* init function */
ec_unit, /* UNIT *units */ /* Pointer to units structure */
ec_chp, /* CHANP *chan_prg */ /* Pointer to chan_prg structure */
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
// 8, /* number of units defined */
10, /* number of units defined */
NUM_UNITS_ETHER, /* number of units defined */
0x0F, /* device mask */
0x0E00, /* parent channel address */
0, /* fifo input index */
@ -311,12 +317,274 @@ DEBTAB ec_debug[] = {
DEVICE ec_dev = {
"EC", ec_unit, NULL, ec_mod,
// 8, 16, 24, 4, 16, 32,
10, 16, 24, 4, 16, 32,
NUM_UNITS_ETHER, 16, 24, 4, 16, 32,
NULL, NULL, &ec_reset, NULL, &ec_attach, &ec_detach,
&ec_dib, DEV_DISABLE | DEV_DEBUG | DEV_ETHER, 0, ec_debug,
NULL, NULL, &ec_help, NULL, NULL, &ec_description
};
/* load in the IOCD and process the commands */
/* return = 0 OK */
/* return = 1 error, chan_status will have reason */
uint16 ec_iocl(CHANP *chp, int32 tic_ok)
{
uint32 word1 = 0;
uint32 word2 = 0;
int32 docmd = 0;
// DIB *dibp = dib_unit[chp->chan_dev];/* get the DIB pointer */
UNIT *uptr = chp->unitptr; /* get the unit ptr */
uint16 chan = get_chan(chp->chan_dev); /* our channel */
uint16 devstat = 0;
DEVICE *dptr = get_dev(uptr);
/* check for valid iocd address if 1st iocd */
if (chp->chan_info & INFO_SIOCD) { /* see if 1st IOCD in channel prog */
if (chp->chan_caw & 0x3) { /* must be word bounded */
sim_debug(DEBUG_EXP, dptr,
"ec_iocl iocd bad address chan %02x caw %06x\n",
chan, chp->chan_caw);
chp->ccw_addr = chp->chan_caw; /* set the bad iocl address */
chp->chan_status |= STATUS_PCHK; /* program check for invalid iocd addr */
// uptr->SNS |= SNS_INAD; /* invalid address status */
return 1; /* error return */
}
}
loop:
sim_debug(DEBUG_EXP, dptr,
"ec_iocl @%06x entry chan_status[%04x] %04x SNS %08x\n",
chp->chan_caw, chan, chp->chan_status, uptr->SNS);
/* Abort if we have any errors */
if (chp->chan_status & STATUS_ERROR) { /* check channel error status */
sim_debug(DEBUG_EXP, dptr,
"ec_iocl ERROR1 chan_status[%04x] %04x\n", chan, chp->chan_status);
return 1; /* return error */
}
#ifdef WHATISTHIS
/* Check if we have status modifier set */
if (chp->chan_status & STATUS_MOD) {
chp->chan_caw += 8; /* move to next IOCD */
chp->chan_status &= ~STATUS_MOD; /* turn off status modifier flag */
}
#endif
/* Read in first CCW */
if (readfull(chp, chp->chan_caw, &word1) != 0) { /* read word1 from memory */
chp->chan_status |= STATUS_PCHK; /* memory read error, program check */
sim_debug(DEBUG_EXP, dptr,
"ec_iocl ERROR2 chan_status[%04x] %04x\n", chan, chp->chan_status);
return 1; /* error return */
}
/* Read in second CCW */
if (readfull(chp, chp->chan_caw+4, &word2) != 0) { /* read word2 from memory */
chp->chan_status |= STATUS_PCHK; /* memory read error, program check */
sim_debug(DEBUG_EXP, dptr,
"ec_iocl ERROR3 chan_status[%04x] %04x\n", chan, chp->chan_status);
return 1; /* error return */
}
sim_debug(DEBUG_CMD, dptr,
"ec_iocl @%06x read ccw chan %02x IOCD wd 1 %08x wd 2 %08x SNS %08x\n",
chp->chan_caw, chan, word1, word2, uptr->SNS);
chp->chan_caw = (chp->chan_caw & 0xfffffc) + 8; /* point to next IOCD */
chp->ccw_cmd = (word1 >> 24) & 0xff; /* set command from IOCD wd 1 */
if (!MEM_ADDR_OK(word1 & MASK24)) { /* see if memory address invalid */
chp->chan_status |= STATUS_PCHK; /* bad, program check */
// uptr->SNS |= SNS_INAD; /* invalid address status */
sim_debug(DEBUG_EXP, dptr,
"ec_iocl bad IOCD1 chan_status[%04x] %04x\n", chan, chp->chan_status);
return 1; /* error return */
}
chp->ccw_count = 0;
/* this switch is here to satisify the SEL diag who wants a program */
/* check error instead of a unit check error for these cmd values??? */
/* validate the commands for the ethernet */
switch (chp->ccw_cmd) {
case 0x18: case 0x20: case 0x28: case 0x30: case 0x38: case 0x40: case 0x48:
case 0x50: case 0x58: case 0x60: case 0x68: case 0x70: case 0x78: case 0x80:
case 0x88: case 0x90: case 0x98: case 0xa0: case 0xa8: case 0xb0: case 0xb8:
case 0xc0: case 0xc8: case 0xd0: case 0xd8: case 0xe0: case 0xe8: case 0xf0:
case 0xf8:
// uptr->SNS |= SNS_CMDREJ;
uptr->SNS &= ~SNS_CMDREJ; /* remove CMD reject status */
sim_debug(DEBUG_CMD, dptr,
"ec_startcmd illegal at ec_startcmd %02x SNS %08x\n",
chp->ccw_cmd, uptr->SNS);
chp->ccw_count = 0; /* diags want zero count */
chp->chan_status |= STATUS_PCHK; /* program check for invalid cmd */
return 1; /* error return */
case EC_INCH: case EC_WRITE: case EC_READ: case EC_NOP: case EC_SNS:
case EC_LIA: case EC_TIC: case EC_CGA: case EC_LGA: case EC_LCC:
case EC_STATS: case EC_CSTATS:
break;
default:
uptr->SNS |= SNS_CMDREJ;
chp->chan_status |= STATUS_CHECK; /* diags want unit check */
sim_debug(DEBUG_CMD, dptr,
"ec_startcmd illegal cmd %02x SNS %08x\n",
chp->ccw_cmd, uptr->SNS);
return 1; /* error return */
break;
}
chp->ccw_count = word2 & 0xffff; /* get 16 bit byte count from IOCD WD 2 */
if (chp->chan_info & INFO_SIOCD) { /* see if 1st IOCD in channel prog */
/* 1st command can not be a TIC */
if (chp->ccw_cmd == CMD_TIC) {
chp->chan_status |= STATUS_PCHK; /* program check for invalid tic */
uptr->SNS |= SNS_CMDREJ; /* cmd rejected status */
sim_debug(DEBUG_EXP, dptr,
"ec_iocl TIC bad cmd chan_status[%04x] %04x\n",
chan, chp->chan_status);
return 1; /* error return */
}
}
/* TIC can't follow TIC or be first in command chain */
/* diags send bad commands for testing. Use all of op */
if (chp->ccw_cmd == CMD_TIC) {
if (tic_ok) {
if (((word1 & MASK24) == 0) || (word1 & 0x3)) {
sim_debug(DEBUG_EXP, dptr,
"ec_iocl tic cmd bad address chan %02x tic caw %06x IOCD wd 1 %08x\n",
chan, chp->chan_caw, word1);
chp->chan_status |= STATUS_PCHK; /* program check for invalid tic */
// chp->chan_caw = word1; /* get new IOCD address */
chp->chan_caw = word1 & MASK24; /* get new IOCD address */
uptr->SNS |= SNS_CMDREJ; /* cmd rejected status */
// uptr->SNS |= SNS_INAD; /* invalid address status */
return 1; /* error return */
}
tic_ok = 0; /* another tic not allowed */
chp->chan_caw = word1 & MASK24; /* get new IOCD address */
sim_debug(DEBUG_CMD, dptr,
"ec_iocl tic cmd ccw chan %02x tic caw %06x IOCD wd 1 %08x\n",
chan, chp->chan_caw, word1);
goto loop; /* restart the IOCD processing */
}
// chp->chan_caw = word1; /* get new IOCD address */
chp->chan_caw = word1 & MASK24; /* get new IOCD address */
chp->chan_status |= STATUS_PCHK; /* program check for invalid tic */
uptr->SNS |= SNS_CMDREJ; /* cmd rejected status */
// if (((word1 & MASK24) == 0) || (word1 & 0x3))
// uptr->SNS |= SNS_INAD; /* invalid address status */
sim_debug(DEBUG_EXP, dptr,
"ec_iocl TIC ERROR chan_status[%04x] %04x\n", chan, chp->chan_status);
return 1; /* error return */
}
/* Check if we had data chaining in previous iocd */
if ((chp->chan_info & INFO_SIOCD) || /* see if 1st IOCD in channel prog */
((chp->ccw_flags & FLAG_DC) == 0)) { /* last IOCD have DC set? */
sim_debug(DEBUG_CMD, dptr,
"ec_iocl @%06x DO CMD No DC, ccw_flags %04x cmd %02x\n",
chp->chan_caw, chp->ccw_flags, chp->ccw_cmd);
docmd = 1; /* show we have a command */
}
/* Set up for this command */
chp->ccw_flags = (word2 >> 16) & 0xf800; /* get flags from bits 0-4 of WD 2 of IOCD */
chp->chan_status = 0; /* clear status for next IOCD */
/* make a 24 bit address */
chp->ccw_addr = word1 & MASK24; /* set the data/seek address */
/* validate parts of IOCD2 that are reserved */
if (word2 & 0x07ff0000) { /* bits 5-15 must be zero */
chp->chan_status |= STATUS_PCHK; /* program check for invalid iocd */
sim_debug(DEBUG_EXP, dptr,
"ec_iocl IOCD2 chan_status[%04x] %04x\n", chan, chp->chan_status);
return 1; /* error return */
}
/* DC can only be used with a read/write cmd */
if (chp->ccw_flags & FLAG_DC) {
if ((chp->ccw_cmd == EC_INCH) || (chp->ccw_cmd == EC_NOP) ||
(chp->ccw_cmd == EC_CGA) || (chp->ccw_cmd == EC_CSTATS)) {
chp->chan_status |= STATUS_PCHK; /* program check for invalid DC */
// uptr->SNS |= SNS_CHER; /* chaining error */
sim_debug(DEBUG_EXP, dptr,
"ec_iocl DC ERROR chan_status[%04x] %04x\n", chan, chp->chan_status);
return 1; /* error return */
}
}
chp->chan_byte = BUFF_BUSY; /* busy & no bytes transferred yet */
sim_debug(DEBUG_XIO, dptr,
"ec_iocl @%06x read docmd %01x addr %06x count %04x chan %04x ccw_flags %04x\n",
chp->chan_caw, docmd, chp->ccw_addr, chp->ccw_count, chan, chp->ccw_flags);
if (docmd) { /* see if we need to process a command */
DIB *dibp = dib_unit[chp->chan_dev]; /* get the DIB pointer */
uptr = chp->unitptr; /* get the unit ptr */
if (dibp == 0 || uptr == 0) {
chp->chan_status |= STATUS_PCHK; /* program check if it is */
return 1; /* if none, error */
}
sim_debug(DEBUG_XIO, dptr,
"ec_iocl @%06x before start_cmd chan %04x status %04x count %04x SNS %08x\n",
chp->chan_caw, chan, chp->chan_status, chp->ccw_count, uptr->u5);
/* call the device startcmd function to process the current command */
/* just replace device status bits */
devstat = dibp->start_cmd(uptr, chan, chp->ccw_cmd);
chp->chan_status = (chp->chan_status & 0xff00) | devstat;
chp->chan_info &= ~INFO_SIOCD; /* show not first IOCD in channel prog */
sim_debug(DEBUG_XIO, dptr,
"ec_iocl @%06x after start_cmd chan %04x status %08x count %04x\n",
chp->chan_caw, chan, chp->chan_status, chp->ccw_count);
/* see if bad status */
if (chp->chan_status & (STATUS_ATTN|STATUS_ERROR)) {
chp->chan_status |= STATUS_CEND; /* channel end status */
chp->ccw_flags = 0; /* no flags */
/* see if chan_end already called */
if (chp->chan_byte == BUFF_NEXT) {
sim_debug(DEBUG_EXP, dptr,
"ec_iocl BUFF_NEXT ERROR chp %p chan_byte %04x\n",
chp, chp->chan_byte);
} else {
chp->chan_byte = BUFF_NEXT; /* have main pick us up */
sim_debug(DEBUG_EXP, dptr,
"ec_iocl bad status chan %04x status %04x cmd %02x\n",
chan, chp->chan_status, chp->ccw_cmd);
RDYQ_Put(chp->chan_dev); /* queue us up */
sim_debug(DEBUG_EXP, dptr,
"ec_iocl continue wait chsa %04x status %08x\n",
chp->chan_dev, chp->chan_status);
}
} else
/* NOTE this code needed for MPX 1.X to run! */
/* see if command completed */
/* we have good status */
if (chp->chan_status & (STATUS_DEND|STATUS_CEND)) {
uint16 chsa = GET_UADDR(uptr->u3); /* get channel & sub address */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* show I/O complete */
sim_debug(DEBUG_XIO, dptr,
"ec_iocl @%06x FIFO #%1x cmd complete chan %04x status %04x count %04x\n",
chp->chan_caw, FIFO_Num(chsa), chan, chp->chan_status, chp->ccw_count);
}
}
/* the device processor returned OK (0), so wait for I/O to complete */
/* nothing happening, so return */
sim_debug(DEBUG_XIO, dptr,
"ec_iocl @%06x return, chan %04x status %04x count %04x\n",
chp->chan_caw, chan, chp->chan_status, chp->ccw_count);
return 0; /* good return */
}
/* Start ethernet command */
uint16 ec_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
@ -332,25 +600,6 @@ uint16 ec_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
sim_debug(DEBUG_CMD, dptr, "ec_startcmd busy\n");
return SNS_BSY;
}
/* this switch is here to satisify the SEL diag who wants a program */
/* check error instead of a unit check error for these cmd values??? */
switch (cmd) {
case 0x18: case 0x20: case 0x28: case 0x30: case 0x38: case 0x40: case 0x48:
case 0x50: case 0x58: case 0x60: case 0x68: case 0x70: case 0x78: case 0x80:
case 0x88: case 0x90: case 0x98: case 0xa0: case 0xa8: case 0xb0: case 0xb8:
case 0xc0: case 0xc8: case 0xd0: case 0xd8: case 0xe0: case 0xe8: case 0xf0:
case 0xf8:
// uptr->SNS |= SNS_CMDREJ;
uptr->SNS &= ~SNS_CMDREJ; /* remove CMD reject status */
sim_debug(DEBUG_CMD, dptr,
"ec_startcmd illegal at ec_startcmd %02x SNS %08x\n",
cmd, uptr->SNS);
chp->ccw_count = 0; /* diags want zero count */
return SNS_CHNEND|SNS_DEVEND|STATUS_PCHK; /* diags want prog check */
// return SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK; /* diags want unit check */
default:
break;
}
/* Unit is online, so process a command */
switch (cmd) {
@ -368,7 +617,7 @@ uint16 ec_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
case EC_LGA: /* Load Multicast address */
uptr->SNS &= 0xffff0000;
// uptr->SNS &= 0x7fff0000; /* remove invalid cmd status */
uptr->SNS &= ~SNS_CMDREJ; /* remove CMD reject status */
// uptr->SNS &= ~SNS_CMDREJ; /* remove CMD reject status */
/* Fall through */
case EC_SNS: /* Sense 0x04 */
/* nop must have non zero count */
@ -386,7 +635,6 @@ uint16 ec_startcmd(UNIT *uptr, uint16 chan, uint8 cmd)
cmd, uptr->SNS);
chp->ccw_count = 0; /* diags want zero count */
return SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK; /* diags want unit check */
// return SNS_CHNEND|SNS_DEVEND|STATUS_PCHK; /* diags want prog check */
}
/* Handle processing of ethernet requests. */
@ -415,7 +663,7 @@ t_stat ec_srv(UNIT *uptr)
sim_debug(DEBUG_CMD, dptr,
"ec_srv starting INCH %06x cmd, chsa %04x addr %06x cnt %04x\n",
chp->chan_inch_addr, chsa, chp->ccw_addr, chp->ccw_count);
uptr->CMD &= LMASK; /* remove old status bits & */
uptr->CMD &= LMASK; /* remove old status bits & cmd */
/* now call set_inch() function to write and test inch buffer addresses */
i = set_inch(uptr, mema); /* new address */
@ -429,7 +677,6 @@ t_stat ec_srv(UNIT *uptr)
for (i=0; i < len; i++) {
if (chan_read_byte(chsa, &buf[i])) {
/* we have error, bail out */
uptr->CMD &= ~(0xffff); /* remove old status bits & cmd */
uptr->SNS |= SNS_CMDREJ|SNS_EQUCHK;
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
break;
@ -724,7 +971,10 @@ runt:
"ec_startcmd CMD sense excess cnt %02x\n", chp->ccw_count);
break;
}
chan_end(chsa, SNS_CHNEND|SNS_DEVEND);
uptr->SNS &= ~(SNS_CMDREJ|SNS_EQUCHK); /* clear old status */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* done */
break;
default:
@ -734,7 +984,7 @@ runt:
uptr->CMD &= LMASK; /* remove old status bits & cmd */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
#else
sim_debug(DEBUG_CMD, dptr, "allow unknown command %02x\n", cmd);
sim_debug(DEBUG_CMD, dptr, "for testing, allow unknown command %02x\n", cmd);
#endif
}
sim_debug(DEBUG_DETAIL, dptr,
@ -760,7 +1010,6 @@ uint16 ec_haltio(UNIT *uptr) {
"ec_haltio HIO chsa %04x cmd = %02x ccw_count %02x\n", chsa, cmd, chp->ccw_count);
// stop any I/O and post status and return error status */
chp->chan_byte = BUFF_EMPTY; /* there is no data to read/store */
// chp->ccw_count = 0; /* zero the count */
chp->ccw_count = 0; /* zero the count */
chp->ccw_flags &= ~(FLAG_DC|FLAG_CC);/* stop any chaining */
uptr->CMD &= LMASK; /* make non-busy */
@ -768,7 +1017,6 @@ uint16 ec_haltio(UNIT *uptr) {
sim_cancel(uptr); /* clear the input timer */
sim_debug(DEBUG_CMD, dptr,
"ec_haltio HIO I/O stop chsa %04x cmd = %02x\n", chsa, cmd);
// chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITEXP); /* force error */
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* force end */
return SCPE_IOERR;
}
@ -978,7 +1226,7 @@ t_stat ec_set_mode (UNIT* uptr, int32 val, CONST char* cptr, void* desc)
if (!cptr) return SCPE_IERR;
newmode = get_uint (cptr, 10, 4, &r);
newmode = get_uint(cptr, 10, 4, &r);
if (r != SCPE_OK)
return r;

1900
SEL32/sel32_hsdp.c
View File

File diff suppressed because it is too large Load Diff

8
SEL32/sel32_iop.c
View File

@ -101,12 +101,16 @@ UNIT iop_unit[] = {
DIB iop_dib = {
NULL, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Start I/O */
iop_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command SIO */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O HIO */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O HIO */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O HIO */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O TIO */
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
iop_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
iop_unit, /* UNIT* units */ /* Pointer to units structure */
iop_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
NUM_UNITS_IOP, /* uint8 numunits */ /* number of units defined */
0xff, /* uint8 mask */ /* 16 devices - device mask */
0x7e00, /* uint16 chan_addr */ /* parent channel address */

8
SEL32/sel32_lpr.c
View File

@ -172,12 +172,16 @@ UNIT lpr_unit[] = {
DIB lpr_dib = {
NULL, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Start I/O */
lpr_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
lpr_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
lpr_unit, /* UNIT* units */ /* Pointer to units structure */
lpr_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
NUM_DEVS_LPR, /* uint8 numunits */ /* number of units defined */
0xff, /* uint8 mask */ /* 2 devices - device mask */
0x7e00, /* uint16 chan_addr */ /* parent channel address */

8
SEL32/sel32_mfp.c
View File

@ -104,12 +104,16 @@ UNIT mfp_unit[] = {
DIB mfp_dib = {
NULL, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Start I/O */
mfp_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O HIO */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O HIO */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O HIO */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O TIO */
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
mfp_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
mfp_unit, /* UNIT* units */ /* Pointer to units structure */
mfp_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
NUM_UNITS_MFP, /* uint8 numunits */ /* number of units defined */
0xff, /* uint8 mask */ /* 16 devices - device mask */
0x7600, /* uint16 chan_addr */ /* parent channel address */

16
SEL32/sel32_mt.c
View File

@ -293,12 +293,16 @@ CHANP mta_chp[NUM_UNITS_MT] = {0};
DIB mta_dib = {
NULL, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
mt_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
mt_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
mta_unit, /* UNIT* units */ /* Pointer to units structure */
mta_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
NUM_UNITS_MT, /* uint8 numunits */ /* number of units defined */
0x07, /* uint8 mask */ /* 8 devices - device mask */
0x1000, /* uint16 chan_addr */ /* parent channel address */
@ -337,12 +341,16 @@ UNIT mtb_unit[] = {
DIB mtb_dib = {
NULL, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
mt_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
mt_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
mtb_unit, /* UNIT* units */ /* Pointer to units structure */
mtb_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
NUM_UNITS_MT, /* uint8 numunits */ /* number of units defined */
0x07, /* uint8 mask */ /* 8 devices - device mask */
0x1800, /* uint16 chan_addr */ /* parent channel address */

1363
SEL32/sel32_scfi.c
View File

File diff suppressed because it is too large Load Diff

25
SEL32/sel32_scsi.c
View File

@ -324,12 +324,16 @@ UNIT sba_unit[] = {
DIB sba_dib = {
scsi_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
scsi_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
scsi_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
sba_unit, /* UNIT* units */ /* Pointer to units structure */
sba_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
NUM_UNITS_SCSI, /* uint8 numunits */ /* number of units defined */
0x0f, /* uint8 mask */ /* 8 devices - device mask */
0x7600, /* uint16 chan_addr */ /* parent channel address */
@ -363,18 +367,22 @@ UNIT sbb_unit[] = {
DIB sbb_dib = {
scsi_preio, /* uint16 (*pre_io)(UNIT *uptr, uint16 chan)*/ /* Pre Start I/O */
scsi_startcmd, /* uint16 (*start_cmd)(UNIT *uptr, uint16 chan, uint8 cmd)*/ /* Start command */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*halt_io)(UNIT *uptr) */ /* Halt I/O */
NULL, /* uint16 (*stop_io)(UNIT *uptr) */ /* Stop I/O */
NULL, /* uint16 (*test_io)(UNIT *uptr) */ /* Test I/O */
NULL, /* uint16 (*post_io)(UNIT *uptr) */ /* Post I/O */
NULL, /* uint16 (*rsctl_io)(UNIT *uptr) */ /* Reset Controller */
NULL, /* uint16 (*rschnl_io)(UNIT *uptr) */ /* Reset Channel */
NULL, /* uint16 (*iocl_io)(CHANP *chp, int32 tic_ok)) */ /* Process IOCL */
scsi_ini, /* void (*dev_ini)(UNIT *, t_bool) */ /* init function */
sbb_unit, /* UNIT* units */ /* Pointer to units structure */
sbb_chp, /* CHANP* chan_prg */ /* Pointer to chan_prg structure */
NULL, /* IOCLQ *ioclq_ptr */ /* IOCL entries, 1 per UNIT */
NUM_UNITS_SCSI, /* uint8 numunits */ /* number of units defined */
0x0f, /* uint8 mask */ /* 2 devices - device mask */
0x7600, /* uint16 chan_addr */ /* parent channel address */
0, /* uint32 chan_fifo_in */ /* fifo input index */
0, /* uint32 chan_fifo_out */ /* fifo output index */
{0}, /* uint32 chan_fifo[FIFO_SIZE] */ /* interrupt status fifo for channel */
{0} /* uint32 chan_fifo[FIFO_SIZE] */ /* interrupt status fifo for channel */
};
DEVICE sbb_dev = {
@ -509,6 +517,7 @@ t_stat scsi_srv(UNIT *uptr)
int len=0;
int i;
uint32 cap = CAP(type);
uint32 mema; /* memory address */
uint8 ch;
int32 ssize = scsi_type[type].ssiz*4; /* Size of one sector in bytes */
uint32 tstart = 0; /* Location of start of cyl/track/sect in data */
@ -534,9 +543,6 @@ t_stat scsi_srv(UNIT *uptr)
break;
case DSK_INCH2: /* use 0xF0 for inch, just need int */
{
uint32 mema; /* memory address */
len = chp->ccw_count; /* INCH command count */
mema = chp->ccw_addr; /* get inch or buffer addr */
sim_debug(DEBUG_CMD, dptr,
@ -551,7 +557,6 @@ t_stat scsi_srv(UNIT *uptr)
/* now call set_inch() function to write and test inch buffer addresses */
i = set_inch(uptr, mema); /* new address */
#ifdef NOTYET
if ((i == SCPE_MEM) || (i == SCPE_ARG)) { /* any error */
/* we have error, bail out */
uptr->CMD &= LMASK; /* remove old status bits & cmd */
@ -559,13 +564,11 @@ t_stat scsi_srv(UNIT *uptr)
chan_end(chsa, SNS_CHNEND|SNS_DEVEND|SNS_UNITCHK);
break;
}
#endif
uptr->CMD &= LMASK; /* remove old cmd */
sim_debug(DEBUG_CMD, dptr,
"scsi_srv cmd INCH chsa %04x chsa %06x count %04x completed\n",
chsa, mema, chp->ccw_count);
chan_end(chsa, SNS_CHNEND|SNS_DEVEND); /* return OK */
}
break;
case DSK_NOP: /* NOP 0x03 */

4
SEL32/sel32_sys.c
View File

@ -847,7 +847,7 @@ int fprint_inst(FILE *of, uint32 val, int32 sw)
i = (val & 3) | ((inst >> 1) & 04);
if (((inst&0xfc00) == 0xe000) ||
((inst&0xfc00) == 0xe400))
i &= ~4; /* remode f bit from fpt instr */
i &= ~4; /* remove f bit from fpt instr */
if (((inst&0xfc00) != 0xdc00) &&
((inst&0xfc00) != 0xd000) &&
((inst&0xfc00) != 0x5400) &&
@ -1050,7 +1050,7 @@ t_stat fprint_sym (FILE *of, t_addr addr, t_value *val, UNIT *uptr, int32 sw)
if (sw & SWMASK ('C')) {
fputc('\'', of); /* opening apostorphe */
for(i = 0; i < l; i++) {
char ch = val[i] & 0xff; /* get the char */
int ch = val[i] & 0xff; /* get the char */
if (ch >= 0x20 && ch <= 0x7f) /* see if printable */
fprintf(of, "%c", ch); /* output the ascii char */
else