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KA10: More KS10 fixes.
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parent
73c9952ed5
commit
f3384d2110
100
PDP10/ks10_cty.c
100
PDP10/ks10_cty.c
@ -74,18 +74,6 @@ const char *cty_description (DEVICE *dptr);
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static int32 rtc_tps = 1;
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struct _buffer {
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int in_ptr; /* Insert pointer */
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int out_ptr; /* Remove pointer */
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char buff[32]; /* Buffer */
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} cty_in, cty_out;
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#define full(q) ((((q)->in_ptr + 1) & 0x1f) == (q)->out_ptr)
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#define empty(q) ((q)->in_ptr == (q)->out_ptr)
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#define not_empty(q) ((q)->in_ptr != (q)->out_ptr)
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#define inco(q) (q)->out_ptr = ((q)->out_ptr + 1) & 0x1f
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#define inci(q) (q)->in_ptr = ((q)->in_ptr + 1) & 0x1f
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MTAB cty_mod[] = {
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{ UNIT_DUMMY, 0, NULL, "STOP", &cty_stop_os },
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{ TT_MODE, TT_MODE_UC, "UC", "UC", &tty_set_mode },
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@ -96,14 +84,12 @@ MTAB cty_mod[] = {
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};
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UNIT cty_unit[] = {
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{ UDATA (&ctyo_svc, TT_MODE_7B, 0), 2000},
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{ UDATA (&ctyo_svc, TT_MODE_7B, 0), 1000},
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{ UDATA (&ctyi_svc, TT_MODE_7B|UNIT_DIS, 0), 2000 },
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{ UDATA (&ctyrtc_srv, UNIT_IDLE|UNIT_DIS, 0), 1000 }
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};
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REG cty_reg[] = {
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{SAVEDATA(IN, cty_in) },
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{SAVEDATA(OUT, cty_out) },
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{HRDATAD(WRU, sim_int_char, 8, "interrupt character") },
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{ 0 },
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};
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@ -121,7 +107,6 @@ void
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cty_wakeup()
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{
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sim_debug(DEBUG_EXP, &cty_dev, "CTY wakeup\n");
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sim_cancel(&cty_unit[0]);
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sim_activate(&cty_unit[0], cty_unit[0].wait);
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}
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@ -134,35 +119,19 @@ t_stat ctyi_svc (UNIT *uptr)
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sim_clock_coschedule (uptr, tmxr_poll);
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/* If we have room see if any new lines */
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while (!full(&cty_in)) {
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ch = sim_poll_kbd ();
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if (ch & SCPE_KFLAG) {
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ch = 0177 & sim_tt_inpcvt(ch, TT_GET_MODE (cty_unit[0].flags));
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cty_in.buff[cty_in.in_ptr] =ch & 0377;
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inci(&cty_in);
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sim_debug(DEBUG_DETAIL, &cty_dev, "CTY char %o '%c'\n", ch,
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((ch > 040 && ch < 0177)? ch: '.'));
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} else
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break;
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}
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if (not_empty(&cty_in)) {
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if (Mem_read_word(CTY_IN, &buffer, 0))
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return SCPE_OK;
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if (buffer & CTY_CHAR)
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return SCPE_OK;
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sim_debug(DEBUG_DETAIL, &cty_dev, "CTY Read %012llo\n", buffer);
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ch = cty_in.buff[cty_in.out_ptr];
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if (ch != 0) {
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buffer = (uint64)(ch) | CTY_CHAR;
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if (Mem_write_word(CTY_IN, &buffer, 0))
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return SCPE_OK;
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inco(&cty_in);
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cty_interrupt();
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} else {
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inco(&cty_in);
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}
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if (Mem_read_word(CTY_IN, &buffer, 0))
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return SCPE_OK;
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if (buffer & CTY_CHAR)
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return SCPE_OK;
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sim_debug(DEBUG_DETAIL, &cty_dev, "CTY Read %012llo\n", buffer);
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ch = sim_poll_kbd ();
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if (ch & SCPE_KFLAG) {
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ch = 0177 & sim_tt_inpcvt(ch, TT_GET_MODE (cty_unit[0].flags));
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sim_debug(DEBUG_DETAIL, &cty_dev, "CTY char %o '%c'\n", ch,
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((ch > 040 && ch < 0177)? ch: '.'));
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buffer = (uint64)(ch) | CTY_CHAR;
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if (Mem_write_word(CTY_IN, &buffer, 0) == 0)
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cty_interrupt();
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}
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return SCPE_OK;
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}
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@ -176,18 +145,17 @@ t_stat ctyo_svc (UNIT *uptr)
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return SCPE_OK;
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sim_debug(DEBUG_DETAIL, &cty_dev, "CTY Write %012llo\n", buffer);
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if (buffer & CTY_CHAR) {
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if (!full(&cty_out)) {
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int32 ch;
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ch = buffer & 0377;
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ch = sim_tt_outcvt ( ch, TT_GET_MODE (uptr->flags));
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cty_out.buff[cty_out.in_ptr] = (uint8)(ch & 0377);
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buffer = 0;
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if (Mem_write_word(CTY_OUT, &buffer, 0) == 0) {
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inci(&cty_out);
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cty_interrupt();
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}
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} else {
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sim_activate(uptr, tmxr_poll);
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int32 ch;
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ch = buffer & 0377;
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ch = sim_tt_outcvt ( ch, TT_GET_MODE (uptr->flags));
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if (sim_putchar_s(ch) != SCPE_OK) {
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sim_activate(uptr, 2000);
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return SCPE_OK;
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}
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buffer = 0;
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if (Mem_write_word(CTY_OUT, &buffer, 0) == 0) {
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cty_interrupt();
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}
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}
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@ -200,20 +168,6 @@ t_stat ctyo_svc (UNIT *uptr)
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}
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}
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/* Flush out any pending CTY output */
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while(not_empty(&cty_out)) {
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char ch = cty_out.buff[cty_out.out_ptr];
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if (ch != 0) {
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if (sim_putchar_s(ch) != SCPE_OK) {
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sim_activate(uptr, tmxr_poll);
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return SCPE_OK;
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}
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}
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inco(&cty_out);
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sim_debug(DEBUG_DETAIL, &cty_dev, "CTY outch %o '%c'\n", ch,
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((ch > 040 && ch < 0177)? ch: '.'));
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}
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return SCPE_OK;
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}
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@ -231,13 +185,13 @@ ctyrtc_srv(UNIT * uptr)
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t_stat cty_reset (DEVICE *dptr)
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{
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cty_in.in_ptr = cty_in.out_ptr = 0;
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cty_out.in_ptr = cty_out.out_ptr = 0;
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sim_activate(&cty_unit[1], cty_unit[1].wait);
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sim_activate(&cty_unit[2], cty_unit[2].wait);
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M[STATUS] = 0;
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M[CTY_IN] = 0;
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M[CTY_OUT] = 0;
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M[KLINK_IN] = 0;
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M[KLINK_OUT] = 0;
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return SCPE_OK;
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}
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@ -864,7 +864,7 @@ t_stat rp_svc (UNIT *uptr)
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uptr->STATUS |= DS_PIP;
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}
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}
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sim_activate(uptr, 250);
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sim_activate(uptr, 300);
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return SCPE_OK;
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}
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rd_end:
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@ -953,7 +953,7 @@ wr_done:
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}
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if (sts) {
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sim_activate(uptr, 250);
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sim_activate(uptr, 300);
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} else {
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sim_debug(DEBUG_DETAIL, dptr, "RP%o write done\n", unit);
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uptr->STATUS &= ~DS_PIP;
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@ -813,16 +813,16 @@ rd_end:
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uptr->CPOS = (uptr->CPOS & 010) | ((uptr->CPOS & 07) + 1);
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if ((uptr->CPOS & 7) == cc_max) {
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uptr->CPOS &= 010;
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}
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tu_frame = 0177777 & (tu_frame + 1);
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if (tu_wc == 0)
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uptr->CPOS = 010;
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else if (tu_frame == 0) {
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}
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tu_frame = 0177777 & (tu_frame + 1);
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if (tu_frame == 0) {
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uptr->CPOS = 010;
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tu_tcr &= ~(TC_FCS);
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}
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wr_end:
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if (uptr->CPOS & 010) {
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if (uptr->CPOS == 010) {
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/* Write out the block */
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reclen = uptr->hwmark;
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r = sim_tape_wrrecf(uptr, &tu_buf[0], reclen);
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