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KA10: More waits fixes. Dectape/Magtape working.

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This commit is contained in:
Richard Cornwell 2019-06-25 22:55:12 -04:00
parent d66f04fb32
commit f7aea9437f
4 changed files with 70 additions and 83 deletions
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79
PDP10/ka10_cpu.c
View File

@ -2237,34 +2237,20 @@ int page_lookup_waits(int addr, int flag, int *loc, int wr, int cur_context, int
int Mem_read_waits(int flag, int cur_context, int fetch) {
int addr;
if (AB < 020) {
int uf = (FLAGS & USER) != 0;
if (uf || flag || xct_flag == 0 || fetch) {
MB = get_reg(AB);
return 0;
}
if (xct_flag & 010 && cur_context) /* Indirect */
uf = 1;
if (xct_flag & 004) /* XR */
uf = 1;
if (xct_flag & 001 && BYF5) /* XW or XLB or XDB */
uf = 1;
if (uf && (FLAGS & USER) == 0)
MB = M[AB + Rl];
else
MB = get_reg(AB);
} else {
sim_interval--;
if (!page_lookup_waits(AB, flag, &addr, 0, cur_context, fetch))
return 1;
if (addr >= (int)MEMSIZE) {
nxm_flag = 1;
return 1;
}
if (sim_brk_summ && sim_brk_test(AB, SWMASK('R')))
watch_stop = 1;
MB = M[addr];
if (AB < 020 && ((xct_flag == 0 || fetch || cur_context || (FLAGS & USER) != 0))) {
MB = get_reg(AB);
return 0;
}
sim_interval--;
if (!page_lookup_waits(AB, flag, &addr, 0, cur_context, fetch))
return 1;
if (addr >= (int)MEMSIZE) {
nxm_flag = 1;
return 1;
}
if (sim_brk_summ && sim_brk_test(AB, SWMASK('R')))
watch_stop = 1;
MB = M[addr];
return 0;
}
@ -2278,32 +2264,21 @@ int Mem_write_waits(int flag, int cur_context) {
int addr;
if (AB < 020) {
int uf = (FLAGS & USER) != 0;
if (uf || flag || xct_flag == 0) {
set_reg(AB, MB);
return 0;
}
if (xct_flag & 010 && cur_context) /* Indirect */
uf = 1;
if (xct_flag & 001) /* XW or XLB or XDB */
uf = 1;
if (uf && (FLAGS & USER) == 0)
M[AB + Rl] = MB;
else
set_reg(AB, MB);
} else {
sim_interval--;
if (!page_lookup_waits(AB, flag, &addr, 1, cur_context, 0))
return 1;
if (addr >= (int)MEMSIZE) {
nxm_flag = 1;
return 1;
}
if (sim_brk_summ && sim_brk_test(AB, SWMASK('W')))
watch_stop = 1;
M[addr] = MB;
/* If not doing any special access, just access register */
if (AB < 020 && ((xct_flag == 0 || cur_context || (FLAGS & USER) != 0))) {
set_reg(AB, MB);
return 0;
}
sim_interval--;
if (!page_lookup_waits(AB, flag, &addr, 1, cur_context, 0))
return 1;
if (addr >= (int)MEMSIZE) {
nxm_flag = 1;
return 1;
}
if (sim_brk_summ && sim_brk_test(AB, SWMASK('W')))
watch_stop = 1;
M[addr] = MB;
return 0;
}
#endif

11
PDP10/ka10_pmp.c
View File

@ -2192,16 +2192,7 @@ pmp_format(UNIT * uptr, int flag) {
data->cbuf[pos++] = (cyl & 0xff);
data->cbuf[pos++] = (hd >> 8);
data->cbuf[pos++] = (hd & 0xff);
data->cbuf[pos++] = (cyl >> 8); /* R0 */
data->cbuf[pos++] = (cyl & 0xff);
data->cbuf[pos++] = (hd >> 8);
data->cbuf[pos++] = (hd & 0xff);
data->cbuf[pos++] = rec++; /* Rec */
data->cbuf[pos++] = 0; /* keylen */
data->cbuf[pos++] = 0; /* dlen */
data->cbuf[pos++] = 8; /* */
pos += 8;
data->cbuf[pos++] = (cyl >> 8); /* R1 Rib block */
data->cbuf[pos++] = (cyl >> 8); /* R0 Rib block */
data->cbuf[pos++] = (cyl & 0xff);
data->cbuf[pos++] = (hd >> 8);
data->cbuf[pos++] = (hd & 0xff);

52
PDP10/pdp6_dtc.c
View File

@ -366,6 +366,15 @@ dtc_devio(uint32 dev, uint64 *data) {
}
dtc_dtsb |= DTB_REQ;
} else {
/* If not selecting, but delaying, give it to a unit to handle */
if (dtc_dtsb & DTB_DLY) {
dtc_unit[i].CMD = (dtc_dtsa & 0007007);
if ((dtc_unit[i].DSTATE & DTC_MOT) == 0) {
if (!sim_is_active(&dtc_unit[i])) {
sim_activate(&dtc_unit[i], 10000);
}
}
}
/* Not selecting any, stop all */
for (i = 0; i < DTC_NUMDR; i++)
dtc_unit[i].CMD = DTC_FNC_STOP;
@ -488,10 +497,10 @@ dtc_svc (UNIT *uptr)
sim_activate(uptr, DT_WRDTIM*10);
if ((dtc_dtsb & DTB_DLY) != 0) {
uptr->DELAY = 0;
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
dtc_dtsb &= ~DTB_DLY;
dtc_dtsb |= DTB_TIME;
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
}
break;
@ -543,10 +552,10 @@ dtc_svc (UNIT *uptr)
uptr->DSTATE = DTC_FBLK|(word << DTC_V_BLK) | (uptr->DSTATE & DTC_MOTMASK);
if ((dtc_dtsb & DTB_DLY) != 0) {
if (uptr->DELAY < 0) {
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
dtc_dtsb &= ~DTB_DLY;
dtc_dtsb |= DTB_TIME;
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
}
break;
}
@ -640,10 +649,10 @@ dtc_svc (UNIT *uptr)
dtc_dtsb |= DTB_DONE;
if ((dtc_dtsb & DTB_DLY) != 0) {
if (uptr->DELAY < 0) {
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
dtc_dtsb &= ~DTB_DLY;
dtc_dtsb |= DTB_TIME;
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
}
break;
}
@ -677,10 +686,10 @@ dtc_svc (UNIT *uptr)
dtc_dtsb &= ~DTB_EOT;
if ((dtc_dtsb & DTB_DLY) != 0) {
if (uptr->DELAY < 0) {
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
dtc_dtsb &= ~DTB_DLY;
dtc_dtsb |= DTB_TIME;
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
}
break;
}
@ -747,10 +756,10 @@ dtc_svc (UNIT *uptr)
data = (uint64)word;
if ((dtc_dtsb & DTB_DLY) != 0) {
if (uptr->DELAY < 0) {
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
dtc_dtsb &= ~DTB_DLY;
dtc_dtsb |= DTB_TIME;
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
}
break;
}
@ -796,10 +805,10 @@ dtc_svc (UNIT *uptr)
dtc_dtsb |= DTB_DONE;
if ((dtc_dtsb & DTB_DLY) != 0) {
if (uptr->DELAY < 0) {
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
dtc_dtsb &= ~DTB_DLY;
dtc_dtsb |= DTB_TIME;
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
}
break;
}
@ -892,10 +901,10 @@ dtc_svc (UNIT *uptr)
dtc_dtsb |= DTB_DONE;
if ((dtc_dtsb & DTB_DLY) != 0) {
if (uptr->DELAY < 0) {
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
dtc_dtsb &= ~DTB_DLY;
dtc_dtsb |= DTB_TIME;
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
}
break;
}
@ -938,10 +947,10 @@ dtc_svc (UNIT *uptr)
sim_debug(DEBUG_DETAIL, &dtc_dev, "DTC %o reverse block %o\n", u, word);
if ((dtc_dtsb & DTB_DLY) != 0) {
if (uptr->DELAY < 0) {
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
dtc_dtsb &= ~DTB_DLY;
dtc_dtsb |= DTB_TIME;
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
}
break;
}
@ -984,10 +993,10 @@ dtc_svc (UNIT *uptr)
if (dtc_dtsa & DTC_ETF)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
if ((dtc_dtsb & DTB_DLY) != 0) {
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
dtc_dtsb &= ~DTB_DLY;
dtc_dtsb |= DTB_TIME;
if (uptr->CMD & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
}
sim_activate(uptr, DT_WRDTIM*10);
break;
@ -1030,6 +1039,13 @@ dtc_svc (UNIT *uptr)
}
sim_debug(DEBUG_DETAIL, &dtc_dev, "DTC %o start %06o\n", u, uptr->CMD);
return SCPE_OK;
} else if ((dtc_dtsb & DTB_DLY) != 0) {
uptr->DELAY = 0;
dtc_dtsb |= DTB_TIME;
dtc_dtsb &= ~DTB_DLY;
if(dtc_dtsa & DTC_TIME)
set_interrupt(DTC_DEVNUM, dtc_dtsa);
sim_debug(DEBUG_DETAIL, &dtc_dev, "DTC %o delay over %06o\n", u, dtc_dtsa);
}
return SCPE_OK;
}

11
PDP10/pdp6_mtc.c
View File

@ -283,7 +283,7 @@ mtc_devio(uint32 dev, uint64 *data) {
if ((uptr->flags & MTUF_WLK) != 0)
res |= WRITE_LOCK;
if (sim_tape_bot(uptr))
res |= BOT_FLAG|LD_PT;
res |= BOT_FLAG;
if (sim_tape_eot(uptr))
res |= EOT_FLAG;
if ((uptr->flags & UNIT_ATT) != 0 && (uptr->CNTRL & (MTC_START|MTC_BUSY)) == 0)
@ -303,7 +303,7 @@ mtc_devio(uint32 dev, uint64 *data) {
/* Switch to drive to check status */
mtc_sel_unit = (mtc_hold_cmd >> 4) & 07;
}
sim_debug(DEBUG_CONI, dptr, "MTC CONO %03o status %012llo %o %08o PC=%06o\n",
sim_debug(DEBUG_CONO, dptr, "MTC CONO %03o status %012llo %o %08o PC=%06o\n",
dev, *data, mtc_sel_unit, mtc_status, PC);
uptr = &mtc_unit[mtc_sel_unit];
mtc_checkirq(uptr);
@ -365,12 +365,16 @@ mtc_checkirq(UNIT * uptr)
set_interrupt(MTC_DEVCTL, mtc_pia);
return;
}
#if 0
/* Need to verify if this is real interrupt or not */
if ((mtc_status & IRQ_JNU) != 0 &&
(mtc_hold_cmd & CMD_FULL) == 0 &&
(uptr->CNTRL & (MTC_START|MTC_BUSY)) == 0) {
sim_debug(DEBUG_DETAIL, &mtc_dev, "MTC%o jnu %o %08o\n", mtc_sel_unit, mtc_pia, mtc_status);
set_interrupt(MTC_DEVCTL, mtc_pia);
return;
}
#endif
}
/* Handle processing of tape requests. */
@ -702,8 +706,9 @@ mtc_srv(UNIT * uptr)
sim_debug(DEBUG_DETAIL, dptr, "MTC%o Write %d %d\n", unit, reclen, r);
if (r == MTSE_EOM)
uptr->STATUS |= ILL_OPR;
else
else if (r != MTSE_OK)
uptr->STATUS |= PARITY_ERRL;
mtc_status |= EOR_FLAG;
uptr->CNTRL &= ~(MTC_BUSY);
uptr->BPOS = 0;
uptr->hwmark = 0;