github.com/rcornwell.sims
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662 Commits 4 Branches 0 Tags
cde7ef8bb5e9d95706b4af26c044f424ab05fb6a
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4 Commits

Author SHA1 Message Date
AZBevier
1a2eefec9d SEL32: Add more UTX support for V6 & V9 processors. 
SEL32: Fix ADFD, SUFD, MPFD, DVFD instructions display.
SEL32: Change console output to handle 8 bit parity for UTX.
SEL32: Correct RPSWT instruction for V9 processor.
SEL32: Reverse scan order of channel complete and interrupts.
SEL32: Move memory and map register r/w macros to sel32_defs.h.
 2020-01-11 13:55:02 -07:00
AZBevier
987f9e3e1e SEL32: Correct Windows and coverity detected warnings. Add diagcopy.c. 2019-11-05 17:23:52 -07:00
AZBevier
53026c66c3 SEL32: Add three missing basemode instructions. 
SEL32: Handle multiple EOFs on MT.
SEL32: Correct basemode instruction processing and display errors.
SEL32:Fix ex -m to display basemode instructions.
 2019-07-25 12:58:19 -07:00
Richard Cornwell
84fe5127a0 SEL32: Added tape tools. 2019-07-23 20:37:41 -04:00