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Files
rcornwell.sims/SEL32/tests/diag.ini
AZBevier b6523197ef SEL32: Add CSW (console switches) and BOOTR (boot regs) variables.
SEL32: Fix sel32_clk.c coding error in interval timer code.
SEL32: Update to latest makecode.c utility and add makefile.
SEL32: Update diag.ini file to show how to set boot regs and CSW values.
2019-09-01 16:37:26 -07:00

55 lines
1.1 KiB
INI

set debug -n sel.log
;set CPU 32/27 4M
set CPU 32/67 4M
;set CPU 32/87 4M
;set CPU 32/97 4M
;set CPU V6 4M
;set CPU V9 4M
;set debug stderr
;set mta debug=cmd;detail;exp;data
;set mta debug=inst;cmd;detail;exp
;set inq debug=cmd;detail
;set cpu debug=cmd;exp
;set cpu debug=cmd;exp;inst;detail;data
;set cpu debug=cmd;exp;inst;detail
;set cpu debug=exp;
;set con debug=cmd;exp;data
;set mta debug=cmd;exp;inst;data;detail
;set mta debug=cmd
;set dma debug=cmd;exp;detail;data
;set dma debug=cmd;exp;detail;data
;
;set coml0 enable
;set coml1 enable
;set coml2 enable
;set coml3 enable
;set coml4 enable
;set coml5 enable
;set coml6 enable
;set coml7 enable
;
;set comc enable
;at comc 4747
;
;set con debug=CMD
;
;set lpr enable
;at lpr lprout
;
;at mta0 mpxsdt4.tap
;at mta0 mpxsdt5.tap
;at sda0 diskfile4
;at sda1 diskfile5
;
;at mta0 sim32sdt.tap
at mta0 diag.tap
;at mta1 temptape.tap
;at mta2 output.tap
;at dma0 diagdisk
;bo dma0
deposit CSW 0
;deposit bootr[0] ffffffff
deposit bootr[1] 0
deposit bootr[2] 0
bo mta0