mirror of
https://github.com/rcornwell/sims.git
synced 2026-05-03 22:50:05 +00:00
6ed7b3add1
SEL32: Change code to correctly detect interrupt level for RT clock. SEL32: Add debug support for interval timer and RT clock. SEL32: Change auto diag command file to not run unsupport device diags.
67 lines
1.3 KiB
INI
67 lines
1.3 KiB
INI
set debug -n sel.log
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;set RTC 50
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set RTC 60
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;set RTC debug=cmd
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;set ITM debug=cmd
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;set CPU 32/27 4M
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;set CPU 32/87 4M
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;set CPU 32/67 4M
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;set CPU 32/97 4M
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set CPU V6 4M
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;set CPU V9 4M
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;set debug stderr
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;set mta debug=cmd;detail;exp;data
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;set mta debug=inst;cmd;detail;exp
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;set inq debug=cmd;detail
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;set cpu debug=cmd;exp
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;set cpu debug=exp;irq
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;set cpu debug=irq
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;set cpu debug=inst;cmd;exp;irq
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;set cpu debug=cmd;exp;inst;detail;data
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;set cpu debug=cmd;exp;inst;detail
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;set cpu debug=cmd;exp;irq
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;set con debug=exp
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;set con debug=cmd;exp
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;set con debug=cmd;exp;data
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;set mta debug=cmd;exp;inst;data;detail
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;set mta debug=cmd;exp
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;set dma debug=cmd;exp;detail;data
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;set dma debug=cmd;exp;detail;data
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;
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;set coml0 enable
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;set coml1 enable
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;set coml2 enable
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;set coml3 enable
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;set coml4 enable
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;set coml5 enable
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;set coml6 enable
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;set coml7 enable
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;
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;set comc enable
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;at comc 4747
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;
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;set con debug=CMD
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;
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;set lpr enable
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;at lpr lprout
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;
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;at mta0 mpxsdt4.tap
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;at mta0 mpxsdt5.tap
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;at sda0 diskfile4
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;at sda1 diskfile5
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;
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;at mta0 sim32sdt.tap
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at mta0 diag.tap
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;at mta1 temptape.tap
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;at mta2 output.tap
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;at dma0 diagdisk
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;bo dma0
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;set history=10000
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deposit CSW 0
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; uncomment next line to get diag loader prompt
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;deposit bootr[0] ffffffff
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deposit bootr[1] 0
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deposit bootr[2] 0
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; Boot from mag tape
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bo mta0
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