diff --git a/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr.h b/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr.h index 45c52a6..eb95646 100644 --- a/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr.h +++ b/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr.h @@ -92,6 +92,7 @@ struct NuBusFPGADriverGlobals { //unsigned char shadowClut[768]; unsigned short hres[16]; /* HW max in 0 */ unsigned short vres[16]; /* HW max in 0 */ + unsigned short curPage; unsigned char maxMode; unsigned char curMode; /* mode ; this is resolution (which can't be changed in 7.1 except via reboot ?) */ unsigned char curDepth; /* depth */ @@ -104,6 +105,17 @@ typedef struct NuBusFPGADriverGlobals NuBusFPGADriverGlobals; typedef struct NuBusFPGADriverGlobals *NuBusFPGADriverGlobalsPtr; typedef struct NuBusFPGADriverGlobals **NuBusFPGADriverGlobalsHdl; +typedef struct NuBusFPGAPramRecord { /* slot parameter RAM record, derived from SPRAMRecord */ + short boardID; /* Apple-defined card ID */ + char vendorUse1; /* reserved for vendor use */ /* DCDMF3 p210 says reserved for system ... */ + unsigned char mode; /* vendorUse2 */ + unsigned char depth; /* vendorUse3 */ + unsigned char page; /* vendorUse4 */ + char vendorUse5; /* reserved for vendor use */ + char vendorUse6; /* reserved for vendor use */ +} NuBusFPGAPramRecord; +typedef struct NuBusFPGAPramRecord *NuBusFPGAPramRecordPtr; + static inline void write_reg(AuxDCEPtr dce, unsigned int reg, unsigned int val) { *((volatile unsigned int*)(dce->dCtlDevBase+GOBOFB_BASE+reg)) = val; } @@ -117,6 +129,8 @@ extern SlotIntServiceProcPtr interruptRoutine; void linearGamma(NuBusFPGADriverGlobalsPtr dStore); OSErr changeIRQ(AuxDCEPtr dce, char en, OSErr err); OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce); +OSErr reconfHW(AuxDCEPtr dce, unsigned char mode, unsigned char depth, unsigned short page); +OSErr updatePRAM(AuxDCEPtr dce, unsigned char mode, unsigned char depth, unsigned short page); /* status */ OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce); /* open close */ diff --git a/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr_Ctrl.c b/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr_Ctrl.c index 2969d53..401c0d9 100644 --- a/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr_Ctrl.c +++ b/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr_Ctrl.c @@ -20,7 +20,7 @@ OSErr changeIRQ(AuxDCEPtr dce, char en, OSErr err) { NuBusFPGADriverGlobalsPtr dStore = *dStoreHdl; char busMode = 1; if (en != dStore->irqen) { - /* write_reg(dce, GOBOFB_DEBUG, 0xBEEF000F); */ + /* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0005); */ /* write_reg(dce, GOBOFB_DEBUG, en); */ if (en) { @@ -81,8 +81,8 @@ OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) short ret = -1; char busMode = 1; - /* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0001); */ - /* write_reg(dce, GOBOFB_DEBUG, pb->csCode); */ + write_reg(dce, GOBOFB_DEBUG, 0xBEEF0001); + write_reg(dce, GOBOFB_DEBUG, pb->csCode); #if 1 switch (pb->csCode) @@ -108,36 +108,11 @@ OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) case cscSetMode: /* 2 */ { VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam; - if (vPInfo->csPage != 0) - return paramErr; - SwapMMUMode ( &busMode ); - switch (vPInfo->csMode) { - case kDepthMode1: - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_8BIT); - break; - case kDepthMode2: - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_4BIT); - break; - case kDepthMode3: - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_2BIT); - break; - case kDepthMode4: - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_1BIT); - break; - case kDepthMode5: - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_24BIT); - break; - case kDepthMode6: - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_15BIT); - break; - default: - SwapMMUMode ( &busMode ); - return paramErr; - } - dStore->curDepth = vPInfo->csMode; - SwapMMUMode ( &busMode ); - vPInfo->csBaseAddr = 0; - ret = noErr; + + ret = reconfHW(dce, dStore->curMode, vPInfo->csMode, vPInfo->csPage); + + if (ret == noErr) + vPInfo->csBaseAddr = (void*)(vPInfo->csPage * 1024 * 1024 * 4); } break; case cscSetEntries: /* 3 */ @@ -234,14 +209,16 @@ OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) { VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam; const uint8_t idx = dStore->curMode % 4; // checkme - const UInt32 a32 = dce->dCtlDevBase; + UInt32 a32 = dce->dCtlDevBase; UInt32 a32_l0, a32_l1; UInt32 a32_4p0, a32_4p1; const uint32_t wb = dStore->hres[0] >> idx; unsigned short j, i; - - if (vPInfo->csPage != 0) + short npage = (vPInfo->csMode == kDepthMode5) ? 1 : 2; + if (vPInfo->csPage >= npage) return paramErr; + + a32 += vPInfo->csPage * 1024 * 1024 * 4; /* fixme */ SwapMMUMode ( &busMode ); #if 0 @@ -326,115 +303,28 @@ OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) case cscSetDefaultMode: /* 9 */ { /* fixme: NVRAM */ VDDefMode *vddefm = (VDDefMode *)*(long *)pb->csParam; - if ((((UInt8)vddefm->csID) < nativeVidMode) || - (((UInt8)vddefm->csID) > dStore->maxMode)) - return paramErr; - ret = noErr; - } + + ret = updatePRAM(dce, vddefm->csID, dStore->curDepth, 0); + } break; case cscSwitchMode: /* 0xa */ { VDSwitchInfoRec *vdswitch = *(VDSwitchInfoRec **)(long *)pb->csParam; - if (vdswitch->csPage != 0) - return paramErr; - if ((vdswitch->csData == dStore->curMode) && - (vdswitch->csMode == dStore->curDepth)) { - return noErr; - } - unsigned short i; - for (i = nativeVidMode ; i <= dStore->maxMode ; i++) { - // disable spurious resources, enable only the right one - SpBlock spb; - spb.spParamData = (i != vdswitch->csData ? 1 : 0); /* disable/enable */ - spb.spSlot = dStore->slot; - spb.spID = i; - spb.spExtDev = 0; - SetSRsrcState(&spb); - } - dce->dCtlSlotId = vdswitch->csData; // where is that explained ? cscSwitchMode is not in DCDMF3, and you should'nt do that anymore says PDCD... - - /* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0021); */ - /* write_reg(dce, GOBOFB_DEBUG, vdswitch->csMode); */ - /* write_reg(dce, GOBOFB_DEBUG, vdswitch->csData); */ - SwapMMUMode ( &busMode ); - if (vdswitch->csData != dStore->curMode) { - UInt8 id = ((UInt8)vdswitch->csData) - nativeVidMode; - unsigned int ho = ((dStore->hres[0] - dStore->hres[id]) / 2); - unsigned int vo = ((dStore->vres[0] - dStore->vres[id]) / 2); - /* write_reg(dce, GOBOFB_VIDEOCTRL, 0); */ - write_reg(dce, GOBOFB_HRES_START, __builtin_bswap32(ho)); - write_reg(dce, GOBOFB_VRES_START, __builtin_bswap32(vo)); - write_reg(dce, GOBOFB_HRES_END, __builtin_bswap32(ho + dStore->hres[id])); - write_reg(dce, GOBOFB_VRES_END, __builtin_bswap32(vo + dStore->vres[id])); - /* write_reg(dce, GOBOFB_VIDEOCTRL, 1); */ - } - if (vdswitch->csMode != dStore->curDepth) { - switch (vdswitch->csMode) { - case kDepthMode1: - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_8BIT); - break; - case kDepthMode2: - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_4BIT); - break; - case kDepthMode3: - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_2BIT); - break; - case kDepthMode4: - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_1BIT); - break; - case kDepthMode5: - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_24BIT); - break; - case kDepthMode6: - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_15BIT); - break; - default: - SwapMMUMode ( &busMode ); - return paramErr; - } - } - dStore->curMode = vdswitch->csData; - dStore->curDepth = vdswitch->csMode; - SwapMMUMode ( &busMode ); - vdswitch->csBaseAddr = 0; - ret = noErr; + ret = reconfHW(dce, vdswitch->csData, vdswitch->csMode, vdswitch->csPage); + + if (ret == noErr) + vdswitch->csBaseAddr = (void*)(vdswitch->csPage * 1024 * 1024 * 4); } break; case cscSavePreferredConfiguration: /* 0x10 */ - // is that ony for PCI drivers? -#if 1 { VDSwitchInfoRec *vdswitch = *(VDSwitchInfoRec **)(long *)pb->csParam; - if ((((UInt8)vdswitch->csData) < nativeVidMode) || - (((UInt8)vdswitch->csData) > dStore->maxMode)) - return paramErr; - switch (vdswitch->csMode) { - case kDepthMode1: - break; - case kDepthMode2: - break; - case kDepthMode3: - break; - case kDepthMode4: - break; - case kDepthMode5: - break; - case kDepthMode6: - break; - default: - return paramErr; - } - if (vdswitch->csPage != 0) - return paramErr; - vdswitch->csBaseAddr = 0; - ret = noErr; + + ret = updatePRAM(dce, vdswitch->csData, vdswitch->csMode, 0); } -#else - ret = controlErr; -#endif break; default: /* always return controlErr for unknown csCode */ @@ -445,3 +335,149 @@ OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) #endif return ret; } + +OSErr reconfHW(AuxDCEPtr dce, unsigned char mode, unsigned char depth, unsigned short page) { + NuBusFPGADriverGlobalsHdl dStoreHdl = (NuBusFPGADriverGlobalsHdl)dce->dCtlStorage; + NuBusFPGADriverGlobalsPtr dStore = *dStoreHdl; + const short npage = (depth == kDepthMode5) ? 1 : 2; + OSErr err = noErr; + char busMode = 1; + + write_reg(dce, GOBOFB_DEBUG, 0xBEEF0031); + write_reg(dce, GOBOFB_DEBUG, mode); + write_reg(dce, GOBOFB_DEBUG, depth); + write_reg(dce, GOBOFB_DEBUG, page); + + if ((mode == dStore->curMode) && + (depth == dStore->curDepth) && + (page == dStore->curPage)) { + return noErr; + } + + if (page >= npage) + return paramErr; + + if ((mode < nativeVidMode) || + (mode > dStore->maxMode)) + return paramErr; + + switch (depth) { + case kDepthMode1: + break; + case kDepthMode2: + break; + case kDepthMode3: + break; + case kDepthMode4: + break; + case kDepthMode5: + break; + case kDepthMode6: + break; + default: + return paramErr; + } + + SwapMMUMode ( &busMode ); + if (mode != dStore->curMode) { + unsigned short i; + for (i = nativeVidMode ; i <= dStore->maxMode ; i++) { + // disable spurious resources, enable only the right one + SpBlock spb; + spb.spParamData = (i != mode ? 1 : 0); /* disable/enable */ + spb.spSlot = dStore->slot; + spb.spID = i; + spb.spExtDev = 0; + SetSRsrcState(&spb); + } + dce->dCtlSlotId = mode; // where is that explained ? cscSwitchMode is not in DCDMF3, and you should'nt do that anymore says PDCD... + + UInt8 id = mode - nativeVidMode; + unsigned int ho = ((dStore->hres[0] - dStore->hres[id]) / 2); + unsigned int vo = ((dStore->vres[0] - dStore->vres[id]) / 2); + /* write_reg(dce, GOBOFB_VIDEOCTRL, 0); */ + write_reg(dce, GOBOFB_HRES_START, __builtin_bswap32(ho)); + write_reg(dce, GOBOFB_VRES_START, __builtin_bswap32(vo)); + write_reg(dce, GOBOFB_HRES_END, __builtin_bswap32(ho + dStore->hres[id])); + write_reg(dce, GOBOFB_VRES_END, __builtin_bswap32(vo + dStore->vres[id])); + /* write_reg(dce, GOBOFB_VIDEOCTRL, 1); */ + } + if (depth != dStore->curDepth) { + switch (depth) { + case kDepthMode1: + write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_8BIT); + break; + case kDepthMode2: + write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_4BIT); + break; + case kDepthMode3: + write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_2BIT); + break; + case kDepthMode4: + write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_1BIT); + break; + case kDepthMode5: + write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_24BIT); + break; + case kDepthMode6: + write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_15BIT); + break; + default: + SwapMMUMode ( &busMode ); + return paramErr; + } + } + dStore->curMode = mode; + dStore->curDepth = depth; + dStore->curPage = page; /* FIXME: HW */ + + SwapMMUMode ( &busMode ); + + return err; +} + +OSErr updatePRAM(AuxDCEPtr dce, unsigned char mode, unsigned char depth, unsigned short page) { + NuBusFPGADriverGlobalsHdl dStoreHdl = (NuBusFPGADriverGlobalsHdl)dce->dCtlStorage; + NuBusFPGADriverGlobalsPtr dStore = *dStoreHdl; + const short npage = (depth == kDepthMode5) ? 1 : 2; + SpBlock spb; + NuBusFPGAPramRecord pram; + OSErr err; + + if (page >= npage) + return paramErr; + + if ((mode < nativeVidMode) || + (mode > dStore->maxMode)) + return paramErr; + + switch (depth) { + case kDepthMode1: + break; + case kDepthMode2: + break; + case kDepthMode3: + break; + case kDepthMode4: + break; + case kDepthMode5: + break; + case kDepthMode6: + break; + default: + return paramErr; + } + + spb.spSlot = dce->dCtlSlot; + spb.spResult = (UInt32)&pram; + err = SReadPRAMRec(&spb); + if (err == noErr) { + pram.mode = mode; + pram.depth = depth; + pram.page = page; + spb.spSlot = dce->dCtlSlot; + spb.spsPointer = &pram; + err = SPutPRAMRec(&spb); + } + return err; +} diff --git a/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr_OpenClose.c b/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr_OpenClose.c index d3720a6..9da6e30 100644 --- a/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr_OpenClose.c +++ b/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr_OpenClose.c @@ -22,21 +22,22 @@ OSErr cNuBusFPGAOpen(IOParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) return(openErr); HLock(dce->dCtlStorage); NuBusFPGADriverGlobalsHdl dStoreHdl = (NuBusFPGADriverGlobalsHdl)dce->dCtlStorage; + NuBusFPGADriverGlobalsPtr dStore = *dStoreHdl; /* (*dStore)->dce = dce; */ /* for (i = 0 ; i < 256 ; i++) { */ - /* (*dStoreHdl)->shadowClut[i*3+0] = i; */ - /* (*dStoreHdl)->shadowClut[i*3+1] = i; */ - /* (*dStoreHdl)->shadowClut[i*3+2] = i; */ + /* dStore->shadowClut[i*3+0] = i; */ + /* dStore->shadowClut[i*3+1] = i; */ + /* dStore->shadowClut[i*3+2] = i; */ /* } */ - (*dStoreHdl)->gray = 0; - (*dStoreHdl)->irqen = 0; - (*dStoreHdl)->slot = dce->dCtlSlot; + dStore->gray = 0; + dStore->irqen = 0; + dStore->slot = dce->dCtlSlot; /* Get the HW setting for native resolution */ - (*dStoreHdl)->hres[0] = __builtin_bswap32((unsigned int)read_reg(dce, GOBOFB_HRES)); // fixme: endianness - (*dStoreHdl)->vres[0] = __builtin_bswap32((unsigned int)read_reg(dce, GOBOFB_VRES)); // fixme: endianness + dStore->hres[0] = __builtin_bswap32((unsigned int)read_reg(dce, GOBOFB_HRES)); // fixme: endianness + dStore->vres[0] = __builtin_bswap32((unsigned int)read_reg(dce, GOBOFB_VRES)); // fixme: endianness SlotIntQElement *siqel = (SlotIntQElement *)NewPtrSysClear(sizeof(SlotIntQElement)); if (siqel == NULL) { @@ -50,10 +51,11 @@ OSErr cNuBusFPGAOpen(IOParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) asm("lea %%pc@(interruptRoutine),%0\n" : "=a"(sqAddr)); siqel->sqAddr = sqAddr; siqel->sqParm = (long)dce->dCtlDevBase; - (*dStoreHdl)->siqel = siqel; + dStore->siqel = siqel; - (*dStoreHdl)->curMode = nativeVidMode; - (*dStoreHdl)->curDepth = kDepthMode1; + dStore->curPage = 0; + dStore->curMode = nativeVidMode; + dStore->curDepth = kDepthMode1; { OSErr err = noErr; @@ -84,16 +86,16 @@ OSErr cNuBusFPGAOpen(IOParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) max = spb.spID; err = SGetTypeSRsrc(&spb); } - (*dStoreHdl)->maxMode = max; + dStore->maxMode = max; } /* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0000); */ - /* write_reg(dce, GOBOFB_DEBUG, (*dStoreHdl)->maxMode); */ + /* write_reg(dce, GOBOFB_DEBUG, dStore->maxMode); */ { OSErr err = noErr; SpBlock spb; /* check for resolution */ UInt8 id; - for (id = nativeVidMode; id <= (*dStoreHdl)->maxMode ; id ++) { + for (id = nativeVidMode; id <= dStore->maxMode ; id ++) { /* try every resource, enabled or not */ spb.spParamData = 1<hres[idx] = vpblock->vpBounds.right; - (*dStoreHdl)->vres[idx] = vpblock->vpBounds.bottom; + dStore->hres[idx] = vpblock->vpBounds.right; + dStore->vres[idx] = vpblock->vpBounds.bottom; } } } } - linearGamma(*dStoreHdl); - - write_reg(dce, GOBOFB_MODE, GOBOFB_MODE_8BIT); + linearGamma(dStore); + /* now check the content of PRAM */ + if (0) { + SpBlock spb; + NuBusFPGAPramRecord pram; + OSErr err; + spb.spSlot = dce->dCtlSlot; + spb.spResult = (UInt32)&pram; + err = SReadPRAMRec(&spb); + if (err == noErr) { + err = reconfHW(dce, pram.mode, pram.depth, pram.page); + } + } + write_reg(dce, GOBOFB_VIDEOCTRL, 1); ret = changeIRQ(dce, 1, openErr); diff --git a/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr_Status.c b/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr_Status.c index 82f508d..9219453 100644 --- a/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr_Status.c +++ b/nubus-to-ztex-gateware/DeclROM/NuBusFPGADrvr_Status.c @@ -39,8 +39,8 @@ OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) NuBusFPGADriverGlobalsPtr dStore = *dStoreHdl; short ret = -1; - /* write_reg(dce, GOBOFB_DEBUG, 0xBEEF0002); */ - /* write_reg(dce, GOBOFB_DEBUG, pb->csCode); */ + write_reg(dce, GOBOFB_DEBUG, 0xBEEF0002); + write_reg(dce, GOBOFB_DEBUG, pb->csCode); #if 1 switch (pb->csCode) @@ -57,33 +57,45 @@ OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) { VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam; vPInfo->csMode = dStore->curDepth; /* checkme: PCI says depth, 7.5+ doesn't call anyway? */ - vPInfo->csPage = 0; - vPInfo->csBaseAddr = 0; + vPInfo->csPage = dStore->curPage; + vPInfo->csBaseAddr = dStore->curPage * 1024 * 1024 * 4; /* fixme */ ret = noErr; } break; case cscGetEntries: /* 3 */ /* FIXME: TODO */ + /* never called in >= 7.1 ? */ asm volatile(".word 0xfe16\n"); ret = noErr; break; case cscGetPageCnt: /* 4 == cscGetPages */ { VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam; - if ((((UInt8)vPInfo->csMode) < nativeVidMode) || - (((UInt8)vPInfo->csMode) > dStore->maxMode)) - return paramErr; - vPInfo->csPage = 0; + if ((vPInfo->csMode != kDepthMode1) && + (vPInfo->csMode != kDepthMode2) && + (vPInfo->csMode != kDepthMode3) && + (vPInfo->csMode != kDepthMode4) && + (vPInfo->csMode != kDepthMode5) && + (vPInfo->csMode != kDepthMode6)) + return paramErr; + vPInfo->csPage = (vPInfo->csMode == kDepthMode5) ? 1 : 2; + ret = noErr; } - asm volatile(".word 0xfe16\n"); - ret = noErr; break; case cscGetPageBase: /* 5 == cscGetBaseAddr */ { VDPageInfo *vPInfo = (VDPageInfo *)*(long *)pb->csParam; - if (vPInfo->csPage != 0) + if ((vPInfo->csMode != kDepthMode1) && + (vPInfo->csMode != kDepthMode2) && + (vPInfo->csMode != kDepthMode3) && + (vPInfo->csMode != kDepthMode4) && + (vPInfo->csMode != kDepthMode5) && + (vPInfo->csMode != kDepthMode6)) + return paramErr; + short npage = (vPInfo->csMode == kDepthMode5) ? 1 : 2; + if (vPInfo->csPage >= npage) return paramErr; - vPInfo->csBaseAddr = 0; + vPInfo->csBaseAddr = vPInfo->csPage * 1024 * 1024 * 4; /* fixme for > 2 pages ? */ ret = noErr; } asm volatile(".word 0xfe16\n"); @@ -114,10 +126,16 @@ OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) break; case cscGetDefaultMode: /* 9 */ { /* obsolete in PCI, not called >= 7.5 */ - /* fixme for 7.1: store in NVRAM */ VDDefMode *vddefm = (VDDefMode *)*(long *)pb->csParam; - vddefm->csID = nativeVidMode; - ret = noErr; + SpBlock spb; + NuBusFPGAPramRecord pram; + OSErr err; + spb.spSlot = dce->dCtlSlot; + spb.spResult = (UInt32)&pram; + ret = SReadPRAMRec(&spb); + if (ret == noErr) { + vddefm->csID = pram.mode; + } } break; @@ -129,8 +147,8 @@ OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) /* write_reg(dce, GOBOFB_DEBUG, (unsigned int)dStore->curMode); */ vdswitch->csMode = dStore->curDepth; vdswitch->csData = dStore->curMode; - vdswitch->csPage = 0; - vdswitch->csBaseAddr = 0; + vdswitch->csPage = dStore->curPage; + vdswitch->csBaseAddr = dStore->curPage * 1024 * 1024 * 4; /* fixme */ ret = noErr; } break; @@ -198,6 +216,16 @@ OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) vdswitch->csMode = kDepthMode1; //dStore->curDepth; /* fixme: prefered not current / default */ vdswitch->csData = nativeVidMode; //dStore->curMode; ret = noErr; + SpBlock spb; + NuBusFPGAPramRecord pram; + OSErr err; + spb.spSlot = dce->dCtlSlot; + spb.spResult = (UInt32)&pram; + ret = SReadPRAMRec(&spb); + if (ret == noErr) { + vdswitch->csMode = pram.depth; + vdswitch->csData = pram.mode; + } } break; @@ -263,7 +291,7 @@ OSErr cNuBusFPGAStatus(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce) if (mode == kDisplayModeIDCurrent) mode = dStore->curMode; /* basically the same as the EBVParms ? */ - vdparam->csPageCount = 0; + vdparam->csPageCount = (vdparam->csDepthMode == kDepthMode5) ? 1 : 2; vpblock->vpBaseOffset = 0; vpblock->vpBounds.left = 0; vpblock->vpBounds.top = 0; diff --git a/nubus-to-ztex-gateware/DeclROM/NuBusFPGAPrimaryInit_Primary.c b/nubus-to-ztex-gateware/DeclROM/NuBusFPGAPrimaryInit_Primary.c index 707c59e..ece0fa9 100644 --- a/nubus-to-ztex-gateware/DeclROM/NuBusFPGAPrimaryInit_Primary.c +++ b/nubus-to-ztex-gateware/DeclROM/NuBusFPGAPrimaryInit_Primary.c @@ -13,7 +13,7 @@ UInt32 Primary(SEBlock* seblock) { UInt32 a32_l0, a32_l1; UInt32 a32_4p0, a32_4p1; SpBlock spblock; - UInt8 pram[8]; + /* UInt8 pram[8]; */ OSErr err; UInt16 i,j, hres, vres; char busMode; diff --git a/nubus-to-ztex-gateware/DeclROM/NuBusFPGASecondaryInit_Secondary.c b/nubus-to-ztex-gateware/DeclROM/NuBusFPGASecondaryInit_Secondary.c index d1677a1..a2e4606 100644 --- a/nubus-to-ztex-gateware/DeclROM/NuBusFPGASecondaryInit_Secondary.c +++ b/nubus-to-ztex-gateware/DeclROM/NuBusFPGASecondaryInit_Secondary.c @@ -38,7 +38,7 @@ UInt32 Secondary(SEBlock* seblock) { UInt32 a32_l0, a32_l1; UInt32 a32_4p0, a32_4p1; SpBlock spblock; - UInt8 pram[8]; + /* UInt8 pram[8]; */ OSErr err; UInt16 i,j; char busMode; diff --git a/nubus-to-ztex-gateware/DeclROM/gen_mode.c b/nubus-to-ztex-gateware/DeclROM/gen_mode.c index bb26471..1a911f2 100644 --- a/nubus-to-ztex-gateware/DeclROM/gen_mode.c +++ b/nubus-to-ztex-gateware/DeclROM/gen_mode.c @@ -35,7 +35,7 @@ static struct one_res res_db[NUM_RES] = { static struct one_res res_db[NUM_RES] = { { 1920, 1080 }, { 1600, 900 }, - { 640, 480 }, + /* { 640, 480 }, */ { 0, 0} }; #endif @@ -86,7 +86,7 @@ int main(int argc, char **argv) { fprintf(fd, "\tALIGN 2\n"); fprintf(fd, "_%sModes: /* id 0x%02x */\n", modename, id-1); fprintf(fd, "\tOSLstEntry\tmVidParams,_%sParms\t/* offset to vid parameters */\n", modename); - fprintf(fd, "\tDatLstEntry\tmPageCnt,1\t/* number of video pages */\n"); + fprintf(fd, "\tDatLstEntry\tmPageCnt,%d\t/* number of video pages */\n", (depth == 32) ? 1 : 2); fprintf(fd, "\tDatLstEntry\tmDevType,%s\t/* device type */\n", depth <= 8 ? "clutType" : "directType"); fprintf(fd, "\t.long\tEndOfList\t/* end of list */\n"); fprintf(fd, "_%sParms:\n", modename);