From 4ab5382a2f07c8acd007df2c5cc66c59b2130e36 Mon Sep 17 00:00:00 2001 From: Romain Dolbeau Date: Tue, 1 Nov 2022 14:54:29 +0100 Subject: [PATCH] arbiter source file needed --- nubus-to-ztex-gateware/nubus.py | 2 +- nubus-to-ztex-gateware/nubus_to_fpga_soc.py | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/nubus-to-ztex-gateware/nubus.py b/nubus-to-ztex-gateware/nubus.py index 70851ee..487429f 100644 --- a/nubus-to-ztex-gateware/nubus.py +++ b/nubus-to-ztex-gateware/nubus.py @@ -172,7 +172,7 @@ class NuBus(Module): platform.add_source("nubus.v", "verilog") # XiBus is from my github, branch 'more_fixes' platform.add_source("XiBus/nubus.svh", "verilog") - #platform.add_source("XiBus/nubus_arbiter.v", "verilog") # in the CPLDinfpga + platform.add_source("nubus_arbiter.v", "verilog") # for CPLDinfpga platform.add_source("XiBus/nubus_cpubus.v", "verilog") platform.add_source("XiBus/nubus_driver.v", "verilog") #platform.add_source("XiBus/nubus_errors.v", "verilog") # unused diff --git a/nubus-to-ztex-gateware/nubus_to_fpga_soc.py b/nubus-to-ztex-gateware/nubus_to_fpga_soc.py index 3bbb395..ee9987a 100644 --- a/nubus-to-ztex-gateware/nubus_to_fpga_soc.py +++ b/nubus-to-ztex-gateware/nubus_to_fpga_soc.py @@ -247,7 +247,7 @@ class NuBusFPGA(SoCCore): #self.submodules.wa2d = WA2D(self.platform) #self.bus.add_slave("WA2D", self.wa2d.bus, SoCRegion(origin=0x00C00000, size=0x00400000, cached=False)) - notsimul = 0 + notsimul = 1 if (notsimul): avail_sdram = 0 self.submodules.ddrphy = s7ddrphy.A7DDRPHY(platform.request("ddram"),