From 084d6ee3cadffda67f47cd081be84325ec1fe6d5 Mon Sep 17 00:00:00 2001 From: Romain Dolbeau Date: Mon, 6 Sep 2021 12:21:54 -0400 Subject: [PATCH] More prep; splits CSR includes per-device --- .../sys/dev/sbus/sbusfpga_curve25519engine.c | 27 +- .../9.0/usr/src/sys/dev/sbus/sbusfpga_sdram.c | 31 +- .../9.0/usr/src/sys/dev/sbus/sbusfpga_stat.c | 28 +- .../9.0/usr/src/sys/dev/sbus/sbusfpga_trng.c | 27 +- sbus-to-ztex-gateware-migen/netbsd_csr.h | 1125 ----------------- .../sbus_to_fpga_export.py | 55 + .../sbus_to_fpga_soc.py | 8 + 7 files changed, 69 insertions(+), 1232 deletions(-) delete mode 100644 sbus-to-ztex-gateware-migen/netbsd_csr.h diff --git a/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_curve25519engine.c b/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_curve25519engine.c index 1f623d6..6aecec1 100644 --- a/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_curve25519engine.c +++ b/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_curve25519engine.c @@ -298,32 +298,7 @@ sbusfpga_curve25519engine_attach(device_t parent, device_t self, void *aux) } #define CONFIG_CSR_DATA_WIDTH 32 -// define CSR_LEDS_BASE & others to avoid defining the CSRs of HW we don't handle -#define CSR_LEDS_BASE -//#define CSR_CURVE25519ENGINE_BASE -#define CSR_DDRPHY_BASE -#define CSR_EXCHANGE_WITH_MEM_BASE -#define CSR_SBUS_BUS_STAT_BASE -#define CSR_SDRAM_BASE -#define CSR_SDBLOCK2MEM_BASE -#define CSR_SDCORE_BASE -#define CSR_SDIRQ_BASE -#define CSR_SDMEM2BLOCK_BASE -#define CSR_SDPHY_BASE -#define CSR_TRNG_BASE -#include "dev/sbus/litex_csr.h" -#undef CSR_LEDS_BASE -//#undef CSR_CURVE25519ENGINE_BASE -#undef CSR_DDRPHY_BASE -#undef CSR_EXCHANGE_WITH_MEM_BASE -#undef CSR_SBUS_BUS_STAT_BASE -#undef CSR_SDRAM_BASE -#undef CSR_SDBLOCK2MEM_BASE -#undef CSR_SDCORE_BASE -#undef CSR_SDIRQ_BASE -#undef CSR_SDMEM2BLOCK_BASE -#undef CSR_SDPHY_BASE -#undef CSR_TRNG_BASE +#include "dev/sbus/sbusfpga_csr_curve25519engine.h" #define REG_BASE(reg) (base + (reg * 32)) #define SUBREG_ADDR(reg, off) (REG_BASE(reg) + (off)*4) diff --git a/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_sdram.c b/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_sdram.c index c99832b..b25cae6 100644 --- a/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_sdram.c +++ b/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_sdram.c @@ -540,37 +540,12 @@ sbusfpga_sdram_diskstart(device_t self, struct buf *bp) #define CONFIG_CSR_DATA_WIDTH 32 -// define CSR_LEDS_BASE & others to avoid defining the CSRs of HW we don't handle -#define CSR_LEDS_BASE -#define CSR_CURVE25519ENGINE_BASE -//#define CSR_DDRPHY_BASE -//#define CSR_SDRAM_BASE -//#define CSR_EXCHANGE_WITH_MEM_BASE -#define CSR_SBUS_BUS_STAT_BASE -#define CSR_SDBLOCK2MEM_BASE -#define CSR_SDCORE_BASE -#define CSR_SDIRQ_BASE -#define CSR_SDMEM2BLOCK_BASE -#define CSR_SDPHY_BASE -#define CSR_TRNG_BASE - /* grrr */ #define sbusfpga_exchange_with_mem_softc sbusfpga_sdram_softc #define sbusfpga_ddrphy_softc sbusfpga_sdram_softc - -#include "dev/sbus/litex_csr.h" -#undef CSR_LEDS_BASE -#undef CSR_CURVE25519ENGINE_BASE -//#undef CSR_DDRPHY_BASE -//#undef CSR_SDRAM_BASE -//#undef CSR_EXCHANGE_WITH_MEM_BASE -#undef CSR_SBUS_BUS_STAT_BASE -#undef CSR_SDBLOCK2MEM_BASE -#undef CSR_SDCORE_BASE -#undef CSR_SDIRQ_BASE -#undef CSR_SDMEM2BLOCK_BASE -#undef CSR_SDPHY_BASE -#undef CSR_TRNG_BASE +#include "dev/sbus/sbusfpga_csr_exchange_with_mem.h" +#include "dev/sbus/sbusfpga_csr_ddrphy.h" +#include "dev/sbus/sbusfpga_csr_sdram.h" /* not yet generated */ static inline void exchange_with_mem_checksum_read(struct sbusfpga_sdram_softc *sc, uint32_t* data) { diff --git a/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_stat.c b/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_stat.c index c63dd02..bfe6a76 100644 --- a/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_stat.c +++ b/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_stat.c @@ -106,33 +106,7 @@ sbusfpga_stat_match(device_t parent, cfdata_t cf, void *aux) } #define CONFIG_CSR_DATA_WIDTH 32 -// define CSR_LEDS_BASE & others to avoid defining the CSRs of HW we don't handle -#define CSR_LEDS_BASE -#define CSR_CURVE25519ENGINE_BASE -#define CSR_DDRPHY_BASE -#define CSR_EXCHANGE_WITH_MEM_BASE -// #define CSR_SBUS_BUS_STAT_BASE -#define CSR_SDRAM_BASE -#define CSR_SDBLOCK2MEM_BASE -#define CSR_SDCORE_BASE -#define CSR_SDIRQ_BASE -#define CSR_SDMEM2BLOCK_BASE -#define CSR_SDPHY_BASE -#define CSR_TRNG_BASE -#include "dev/sbus/litex_csr.h" -#undef CSR_LEDS_BASE -#undef CSR_CURVE25519ENGINE_BASE -#undef CSR_DDRPHY_BASE -#undef CSR_EXCHANGE_WITH_MEM_BASE -// #undef CSR_SBUS_BUS_STAT_BASE -#undef CSR_SDRAM_BASE -#undef CSR_SDBLOCK2MEM_BASE -#undef CSR_SDCORE_BASE -#undef CSR_SDIRQ_BASE -#undef CSR_SDMEM2BLOCK_BASE -#undef CSR_SDPHY_BASE -//#undef CSR_TRNG_BASE - +#include "dev/sbus/sbusfpga_csr_sbus_bus_stat.h" static void sbusfpga_stat_display(void *); diff --git a/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_trng.c b/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_trng.c index 96b7c85..1e8570a 100644 --- a/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_trng.c +++ b/NetBSD/9.0/usr/src/sys/dev/sbus/sbusfpga_trng.c @@ -107,32 +107,7 @@ sbusfpga_trng_match(device_t parent, cfdata_t cf, void *aux) } #define CONFIG_CSR_DATA_WIDTH 32 -// define CSR_LEDS_BASE & others to avoid defining the CSRs of HW we don't handle -#define CSR_LEDS_BASE -#define CSR_CURVE25519ENGINE_BASE -#define CSR_DDRPHY_BASE -#define CSR_EXCHANGE_WITH_MEM_BASE -#define CSR_SBUS_BUS_STAT_BASE -#define CSR_SDRAM_BASE -#define CSR_SDBLOCK2MEM_BASE -#define CSR_SDCORE_BASE -#define CSR_SDIRQ_BASE -#define CSR_SDMEM2BLOCK_BASE -#define CSR_SDPHY_BASE -//#define CSR_TRNG_BASE -#include "dev/sbus/litex_csr.h" -#undef CSR_LEDS_BASE -#undef CSR_CURVE25519ENGINE_BASE -#undef CSR_DDRPHY_BASE -#undef CSR_EXCHANGE_WITH_MEM_BASE -#undef CSR_SBUS_BUS_STAT_BASE -#undef CSR_SDRAM_BASE -#undef CSR_SDBLOCK2MEM_BASE -#undef CSR_SDCORE_BASE -#undef CSR_SDIRQ_BASE -#undef CSR_SDMEM2BLOCK_BASE -#undef CSR_SDPHY_BASE -//#undef CSR_TRNG_BASE +#include "dev/sbus/sbusfpga_csr_trng.h" static void sbusfpga_trng_getentropy(size_t nbytes, void *cookie) { diff --git a/sbus-to-ztex-gateware-migen/netbsd_csr.h b/sbus-to-ztex-gateware-migen/netbsd_csr.h deleted file mode 100644 index 01b3798..0000000 --- a/sbus-to-ztex-gateware-migen/netbsd_csr.h +++ /dev/null @@ -1,1125 +0,0 @@ -//-------------------------------------------------------------------------------- -// Auto-generated by Migen (3ffd64c) & LiteX (8a644c90) on 2021-09-03 09:40:05 -//-------------------------------------------------------------------------------- -#ifndef __GENERATED_CSR_H -#define __GENERATED_CSR_H -#ifndef CSR_BASE -#define CSR_BASE 0x40000L -#endif - -/* leds */ -#ifndef CSR_LEDS_BASE -#define CSR_LEDS_BASE (CSR_BASE + 0x0L) -#define CSR_LEDS_OUT_ADDR (CSR_LEDS_BASE + 0x0L) -#define CSR_LEDS_OUT_SIZE 1 -static inline uint32_t leds_out_read(struct sbusfpga_leds_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_leds, 0x0L); -} -static inline void leds_out_write(struct sbusfpga_leds_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_leds, 0x0L, v); -} -#endif // CSR_LEDS_BASE - -/* curve25519engine */ -#ifndef CSR_CURVE25519ENGINE_BASE -#define CSR_CURVE25519ENGINE_BASE (CSR_BASE + 0x1000L) -#define CSR_CURVE25519ENGINE_WINDOW_ADDR (CSR_CURVE25519ENGINE_BASE + 0x0L) -#define CSR_CURVE25519ENGINE_WINDOW_SIZE 1 -static inline uint32_t curve25519engine_window_read(struct sbusfpga_curve25519engine_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x0L); -} -static inline void curve25519engine_window_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x0L, v); -} -#define CSR_CURVE25519ENGINE_WINDOW_WINDOW_OFFSET 0 -#define CSR_CURVE25519ENGINE_WINDOW_WINDOW_SIZE 4 -static inline uint32_t curve25519engine_window_window_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 4)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t curve25519engine_window_window_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_window_read(sc); - return curve25519engine_window_window_extract(sc, word); -} -static inline uint32_t curve25519engine_window_window_replace(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 4)-1); - return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ; -} -static inline void curve25519engine_window_window_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t plain_value) { - uint32_t oldword = curve25519engine_window_read(sc); - uint32_t newword = curve25519engine_window_window_replace(sc, oldword, plain_value); - curve25519engine_window_write(sc, newword); -} -#define CSR_CURVE25519ENGINE_MPSTART_ADDR (CSR_CURVE25519ENGINE_BASE + 0x4L) -#define CSR_CURVE25519ENGINE_MPSTART_SIZE 1 -static inline uint32_t curve25519engine_mpstart_read(struct sbusfpga_curve25519engine_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x4L); -} -static inline void curve25519engine_mpstart_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x4L, v); -} -#define CSR_CURVE25519ENGINE_MPSTART_MPSTART_OFFSET 0 -#define CSR_CURVE25519ENGINE_MPSTART_MPSTART_SIZE 10 -static inline uint32_t curve25519engine_mpstart_mpstart_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 10)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t curve25519engine_mpstart_mpstart_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_mpstart_read(sc); - return curve25519engine_mpstart_mpstart_extract(sc, word); -} -static inline uint32_t curve25519engine_mpstart_mpstart_replace(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 10)-1); - return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ; -} -static inline void curve25519engine_mpstart_mpstart_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t plain_value) { - uint32_t oldword = curve25519engine_mpstart_read(sc); - uint32_t newword = curve25519engine_mpstart_mpstart_replace(sc, oldword, plain_value); - curve25519engine_mpstart_write(sc, newword); -} -#define CSR_CURVE25519ENGINE_MPLEN_ADDR (CSR_CURVE25519ENGINE_BASE + 0x8L) -#define CSR_CURVE25519ENGINE_MPLEN_SIZE 1 -static inline uint32_t curve25519engine_mplen_read(struct sbusfpga_curve25519engine_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x8L); -} -static inline void curve25519engine_mplen_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x8L, v); -} -#define CSR_CURVE25519ENGINE_MPLEN_MPLEN_OFFSET 0 -#define CSR_CURVE25519ENGINE_MPLEN_MPLEN_SIZE 10 -static inline uint32_t curve25519engine_mplen_mplen_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 10)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t curve25519engine_mplen_mplen_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_mplen_read(sc); - return curve25519engine_mplen_mplen_extract(sc, word); -} -static inline uint32_t curve25519engine_mplen_mplen_replace(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 10)-1); - return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ; -} -static inline void curve25519engine_mplen_mplen_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t plain_value) { - uint32_t oldword = curve25519engine_mplen_read(sc); - uint32_t newword = curve25519engine_mplen_mplen_replace(sc, oldword, plain_value); - curve25519engine_mplen_write(sc, newword); -} -#define CSR_CURVE25519ENGINE_CONTROL_ADDR (CSR_CURVE25519ENGINE_BASE + 0xcL) -#define CSR_CURVE25519ENGINE_CONTROL_SIZE 1 -static inline uint32_t curve25519engine_control_read(struct sbusfpga_curve25519engine_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0xcL); -} -static inline void curve25519engine_control_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0xcL, v); -} -#define CSR_CURVE25519ENGINE_CONTROL_GO_OFFSET 0 -#define CSR_CURVE25519ENGINE_CONTROL_GO_SIZE 1 -static inline uint32_t curve25519engine_control_go_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t curve25519engine_control_go_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_control_read(sc); - return curve25519engine_control_go_extract(sc, word); -} -static inline uint32_t curve25519engine_control_go_replace(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ; -} -static inline void curve25519engine_control_go_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t plain_value) { - uint32_t oldword = curve25519engine_control_read(sc); - uint32_t newword = curve25519engine_control_go_replace(sc, oldword, plain_value); - curve25519engine_control_write(sc, newword); -} -#define CSR_CURVE25519ENGINE_MPRESUME_ADDR (CSR_CURVE25519ENGINE_BASE + 0x10L) -#define CSR_CURVE25519ENGINE_MPRESUME_SIZE 1 -static inline uint32_t curve25519engine_mpresume_read(struct sbusfpga_curve25519engine_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x10L); -} -#define CSR_CURVE25519ENGINE_MPRESUME_MPRESUME_OFFSET 0 -#define CSR_CURVE25519ENGINE_MPRESUME_MPRESUME_SIZE 10 -static inline uint32_t curve25519engine_mpresume_mpresume_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 10)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t curve25519engine_mpresume_mpresume_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_mpresume_read(sc); - return curve25519engine_mpresume_mpresume_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_POWER_ADDR (CSR_CURVE25519ENGINE_BASE + 0x14L) -#define CSR_CURVE25519ENGINE_POWER_SIZE 1 -static inline uint32_t curve25519engine_power_read(struct sbusfpga_curve25519engine_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x14L); -} -static inline void curve25519engine_power_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x14L, v); -} -#define CSR_CURVE25519ENGINE_POWER_ON_OFFSET 0 -#define CSR_CURVE25519ENGINE_POWER_ON_SIZE 1 -static inline uint32_t curve25519engine_power_on_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t curve25519engine_power_on_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_power_read(sc); - return curve25519engine_power_on_extract(sc, word); -} -static inline uint32_t curve25519engine_power_on_replace(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ; -} -static inline void curve25519engine_power_on_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t plain_value) { - uint32_t oldword = curve25519engine_power_read(sc); - uint32_t newword = curve25519engine_power_on_replace(sc, oldword, plain_value); - curve25519engine_power_write(sc, newword); -} -#define CSR_CURVE25519ENGINE_POWER_PAUSE_REQ_OFFSET 1 -#define CSR_CURVE25519ENGINE_POWER_PAUSE_REQ_SIZE 1 -static inline uint32_t curve25519engine_power_pause_req_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 1) & mask ); -} -static inline uint32_t curve25519engine_power_pause_req_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_power_read(sc); - return curve25519engine_power_pause_req_extract(sc, word); -} -static inline uint32_t curve25519engine_power_pause_req_replace(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 1))) | (mask & plain_value)<< 1 ; -} -static inline void curve25519engine_power_pause_req_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t plain_value) { - uint32_t oldword = curve25519engine_power_read(sc); - uint32_t newword = curve25519engine_power_pause_req_replace(sc, oldword, plain_value); - curve25519engine_power_write(sc, newword); -} -#define CSR_CURVE25519ENGINE_STATUS_ADDR (CSR_CURVE25519ENGINE_BASE + 0x18L) -#define CSR_CURVE25519ENGINE_STATUS_SIZE 1 -static inline uint32_t curve25519engine_status_read(struct sbusfpga_curve25519engine_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x18L); -} -#define CSR_CURVE25519ENGINE_STATUS_RUNNING_OFFSET 0 -#define CSR_CURVE25519ENGINE_STATUS_RUNNING_SIZE 1 -static inline uint32_t curve25519engine_status_running_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t curve25519engine_status_running_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_status_read(sc); - return curve25519engine_status_running_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_STATUS_MPC_OFFSET 1 -#define CSR_CURVE25519ENGINE_STATUS_MPC_SIZE 10 -static inline uint32_t curve25519engine_status_mpc_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 10)-1); - return ( (oldword >> 1) & mask ); -} -static inline uint32_t curve25519engine_status_mpc_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_status_read(sc); - return curve25519engine_status_mpc_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_STATUS_PAUSE_GNT_OFFSET 11 -#define CSR_CURVE25519ENGINE_STATUS_PAUSE_GNT_SIZE 1 -static inline uint32_t curve25519engine_status_pause_gnt_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 11) & mask ); -} -static inline uint32_t curve25519engine_status_pause_gnt_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_status_read(sc); - return curve25519engine_status_pause_gnt_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_STATUS_SIGILL_OFFSET 12 -#define CSR_CURVE25519ENGINE_STATUS_SIGILL_SIZE 1 -static inline uint32_t curve25519engine_status_sigill_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 12) & mask ); -} -static inline uint32_t curve25519engine_status_sigill_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_status_read(sc); - return curve25519engine_status_sigill_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_STATUS_ABORT_OFFSET 13 -#define CSR_CURVE25519ENGINE_STATUS_ABORT_SIZE 1 -static inline uint32_t curve25519engine_status_abort_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 13) & mask ); -} -static inline uint32_t curve25519engine_status_abort_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_status_read(sc); - return curve25519engine_status_abort_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_STATUS_FINISHED_OFFSET 14 -#define CSR_CURVE25519ENGINE_STATUS_FINISHED_SIZE 1 -static inline uint32_t curve25519engine_status_finished_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 14) & mask ); -} -static inline uint32_t curve25519engine_status_finished_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_status_read(sc); - return curve25519engine_status_finished_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_EV_STATUS_ADDR (CSR_CURVE25519ENGINE_BASE + 0x1cL) -#define CSR_CURVE25519ENGINE_EV_STATUS_SIZE 1 -static inline uint32_t curve25519engine_ev_status_read(struct sbusfpga_curve25519engine_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x1cL); -} -#define CSR_CURVE25519ENGINE_EV_STATUS_FINISHED_OFFSET 0 -#define CSR_CURVE25519ENGINE_EV_STATUS_FINISHED_SIZE 1 -static inline uint32_t curve25519engine_ev_status_finished_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t curve25519engine_ev_status_finished_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_ev_status_read(sc); - return curve25519engine_ev_status_finished_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_EV_STATUS_ILLEGAL_OPCODE_OFFSET 1 -#define CSR_CURVE25519ENGINE_EV_STATUS_ILLEGAL_OPCODE_SIZE 1 -static inline uint32_t curve25519engine_ev_status_illegal_opcode_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 1) & mask ); -} -static inline uint32_t curve25519engine_ev_status_illegal_opcode_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_ev_status_read(sc); - return curve25519engine_ev_status_illegal_opcode_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_EV_PENDING_ADDR (CSR_CURVE25519ENGINE_BASE + 0x20L) -#define CSR_CURVE25519ENGINE_EV_PENDING_SIZE 1 -static inline uint32_t curve25519engine_ev_pending_read(struct sbusfpga_curve25519engine_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x20L); -} -static inline void curve25519engine_ev_pending_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x20L, v); -} -#define CSR_CURVE25519ENGINE_EV_PENDING_FINISHED_OFFSET 0 -#define CSR_CURVE25519ENGINE_EV_PENDING_FINISHED_SIZE 1 -static inline uint32_t curve25519engine_ev_pending_finished_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t curve25519engine_ev_pending_finished_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_ev_pending_read(sc); - return curve25519engine_ev_pending_finished_extract(sc, word); -} -static inline uint32_t curve25519engine_ev_pending_finished_replace(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ; -} -static inline void curve25519engine_ev_pending_finished_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t plain_value) { - uint32_t oldword = curve25519engine_ev_pending_read(sc); - uint32_t newword = curve25519engine_ev_pending_finished_replace(sc, oldword, plain_value); - curve25519engine_ev_pending_write(sc, newword); -} -#define CSR_CURVE25519ENGINE_EV_PENDING_ILLEGAL_OPCODE_OFFSET 1 -#define CSR_CURVE25519ENGINE_EV_PENDING_ILLEGAL_OPCODE_SIZE 1 -static inline uint32_t curve25519engine_ev_pending_illegal_opcode_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 1) & mask ); -} -static inline uint32_t curve25519engine_ev_pending_illegal_opcode_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_ev_pending_read(sc); - return curve25519engine_ev_pending_illegal_opcode_extract(sc, word); -} -static inline uint32_t curve25519engine_ev_pending_illegal_opcode_replace(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 1))) | (mask & plain_value)<< 1 ; -} -static inline void curve25519engine_ev_pending_illegal_opcode_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t plain_value) { - uint32_t oldword = curve25519engine_ev_pending_read(sc); - uint32_t newword = curve25519engine_ev_pending_illegal_opcode_replace(sc, oldword, plain_value); - curve25519engine_ev_pending_write(sc, newword); -} -#define CSR_CURVE25519ENGINE_EV_ENABLE_ADDR (CSR_CURVE25519ENGINE_BASE + 0x24L) -#define CSR_CURVE25519ENGINE_EV_ENABLE_SIZE 1 -static inline uint32_t curve25519engine_ev_enable_read(struct sbusfpga_curve25519engine_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x24L); -} -static inline void curve25519engine_ev_enable_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x24L, v); -} -#define CSR_CURVE25519ENGINE_EV_ENABLE_FINISHED_OFFSET 0 -#define CSR_CURVE25519ENGINE_EV_ENABLE_FINISHED_SIZE 1 -static inline uint32_t curve25519engine_ev_enable_finished_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t curve25519engine_ev_enable_finished_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_ev_enable_read(sc); - return curve25519engine_ev_enable_finished_extract(sc, word); -} -static inline uint32_t curve25519engine_ev_enable_finished_replace(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ; -} -static inline void curve25519engine_ev_enable_finished_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t plain_value) { - uint32_t oldword = curve25519engine_ev_enable_read(sc); - uint32_t newword = curve25519engine_ev_enable_finished_replace(sc, oldword, plain_value); - curve25519engine_ev_enable_write(sc, newword); -} -#define CSR_CURVE25519ENGINE_EV_ENABLE_ILLEGAL_OPCODE_OFFSET 1 -#define CSR_CURVE25519ENGINE_EV_ENABLE_ILLEGAL_OPCODE_SIZE 1 -static inline uint32_t curve25519engine_ev_enable_illegal_opcode_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 1) & mask ); -} -static inline uint32_t curve25519engine_ev_enable_illegal_opcode_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_ev_enable_read(sc); - return curve25519engine_ev_enable_illegal_opcode_extract(sc, word); -} -static inline uint32_t curve25519engine_ev_enable_illegal_opcode_replace(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 1))) | (mask & plain_value)<< 1 ; -} -static inline void curve25519engine_ev_enable_illegal_opcode_write(struct sbusfpga_curve25519engine_softc *sc, uint32_t plain_value) { - uint32_t oldword = curve25519engine_ev_enable_read(sc); - uint32_t newword = curve25519engine_ev_enable_illegal_opcode_replace(sc, oldword, plain_value); - curve25519engine_ev_enable_write(sc, newword); -} -#define CSR_CURVE25519ENGINE_INSTRUCTION_ADDR (CSR_CURVE25519ENGINE_BASE + 0x28L) -#define CSR_CURVE25519ENGINE_INSTRUCTION_SIZE 1 -static inline uint32_t curve25519engine_instruction_read(struct sbusfpga_curve25519engine_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x28L); -} -#define CSR_CURVE25519ENGINE_INSTRUCTION_OPCODE_OFFSET 0 -#define CSR_CURVE25519ENGINE_INSTRUCTION_OPCODE_SIZE 6 -static inline uint32_t curve25519engine_instruction_opcode_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 6)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t curve25519engine_instruction_opcode_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_instruction_read(sc); - return curve25519engine_instruction_opcode_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_INSTRUCTION_RA_OFFSET 6 -#define CSR_CURVE25519ENGINE_INSTRUCTION_RA_SIZE 5 -static inline uint32_t curve25519engine_instruction_ra_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 5)-1); - return ( (oldword >> 6) & mask ); -} -static inline uint32_t curve25519engine_instruction_ra_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_instruction_read(sc); - return curve25519engine_instruction_ra_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_INSTRUCTION_CA_OFFSET 11 -#define CSR_CURVE25519ENGINE_INSTRUCTION_CA_SIZE 1 -static inline uint32_t curve25519engine_instruction_ca_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 11) & mask ); -} -static inline uint32_t curve25519engine_instruction_ca_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_instruction_read(sc); - return curve25519engine_instruction_ca_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_INSTRUCTION_RB_OFFSET 12 -#define CSR_CURVE25519ENGINE_INSTRUCTION_RB_SIZE 5 -static inline uint32_t curve25519engine_instruction_rb_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 5)-1); - return ( (oldword >> 12) & mask ); -} -static inline uint32_t curve25519engine_instruction_rb_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_instruction_read(sc); - return curve25519engine_instruction_rb_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_INSTRUCTION_CB_OFFSET 17 -#define CSR_CURVE25519ENGINE_INSTRUCTION_CB_SIZE 1 -static inline uint32_t curve25519engine_instruction_cb_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 17) & mask ); -} -static inline uint32_t curve25519engine_instruction_cb_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_instruction_read(sc); - return curve25519engine_instruction_cb_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_INSTRUCTION_WD_OFFSET 18 -#define CSR_CURVE25519ENGINE_INSTRUCTION_WD_SIZE 5 -static inline uint32_t curve25519engine_instruction_wd_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 5)-1); - return ( (oldword >> 18) & mask ); -} -static inline uint32_t curve25519engine_instruction_wd_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_instruction_read(sc); - return curve25519engine_instruction_wd_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_INSTRUCTION_IMMEDIATE_OFFSET 23 -#define CSR_CURVE25519ENGINE_INSTRUCTION_IMMEDIATE_SIZE 9 -static inline uint32_t curve25519engine_instruction_immediate_extract(struct sbusfpga_curve25519engine_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 9)-1); - return ( (oldword >> 23) & mask ); -} -static inline uint32_t curve25519engine_instruction_immediate_read(struct sbusfpga_curve25519engine_softc *sc) { - uint32_t word = curve25519engine_instruction_read(sc); - return curve25519engine_instruction_immediate_extract(sc, word); -} -#define CSR_CURVE25519ENGINE_LS_STATUS_ADDR (CSR_CURVE25519ENGINE_BASE + 0x2cL) -#define CSR_CURVE25519ENGINE_LS_STATUS_SIZE 1 -static inline uint32_t curve25519engine_ls_status_read(struct sbusfpga_curve25519engine_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_curve25519engine, 0x2cL); -} -#endif // CSR_CURVE25519ENGINE_BASE - -/* ddrphy */ -#ifndef CSR_DDRPHY_BASE -#define CSR_DDRPHY_BASE (CSR_BASE + 0x2000L) -#define CSR_DDRPHY_RST_ADDR (CSR_DDRPHY_BASE + 0x0L) -#define CSR_DDRPHY_RST_SIZE 1 -static inline uint32_t ddrphy_rst_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x0L); -} -static inline void ddrphy_rst_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x0L, v); -} -#define CSR_DDRPHY_HALF_SYS8X_TAPS_ADDR (CSR_DDRPHY_BASE + 0x4L) -#define CSR_DDRPHY_HALF_SYS8X_TAPS_SIZE 1 -static inline uint32_t ddrphy_half_sys8x_taps_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x4L); -} -static inline void ddrphy_half_sys8x_taps_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x4L, v); -} -#define CSR_DDRPHY_WLEVEL_EN_ADDR (CSR_DDRPHY_BASE + 0x8L) -#define CSR_DDRPHY_WLEVEL_EN_SIZE 1 -static inline uint32_t ddrphy_wlevel_en_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x8L); -} -static inline void ddrphy_wlevel_en_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x8L, v); -} -#define CSR_DDRPHY_WLEVEL_STROBE_ADDR (CSR_DDRPHY_BASE + 0xcL) -#define CSR_DDRPHY_WLEVEL_STROBE_SIZE 1 -static inline uint32_t ddrphy_wlevel_strobe_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0xcL); -} -static inline void ddrphy_wlevel_strobe_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0xcL, v); -} -#define CSR_DDRPHY_DLY_SEL_ADDR (CSR_DDRPHY_BASE + 0x10L) -#define CSR_DDRPHY_DLY_SEL_SIZE 1 -static inline uint32_t ddrphy_dly_sel_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x10L); -} -static inline void ddrphy_dly_sel_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x10L, v); -} -#define CSR_DDRPHY_RDLY_DQ_RST_ADDR (CSR_DDRPHY_BASE + 0x14L) -#define CSR_DDRPHY_RDLY_DQ_RST_SIZE 1 -static inline uint32_t ddrphy_rdly_dq_rst_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x14L); -} -static inline void ddrphy_rdly_dq_rst_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x14L, v); -} -#define CSR_DDRPHY_RDLY_DQ_INC_ADDR (CSR_DDRPHY_BASE + 0x18L) -#define CSR_DDRPHY_RDLY_DQ_INC_SIZE 1 -static inline uint32_t ddrphy_rdly_dq_inc_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x18L); -} -static inline void ddrphy_rdly_dq_inc_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x18L, v); -} -#define CSR_DDRPHY_RDLY_DQ_BITSLIP_RST_ADDR (CSR_DDRPHY_BASE + 0x1cL) -#define CSR_DDRPHY_RDLY_DQ_BITSLIP_RST_SIZE 1 -static inline uint32_t ddrphy_rdly_dq_bitslip_rst_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x1cL); -} -static inline void ddrphy_rdly_dq_bitslip_rst_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x1cL, v); -} -#define CSR_DDRPHY_RDLY_DQ_BITSLIP_ADDR (CSR_DDRPHY_BASE + 0x20L) -#define CSR_DDRPHY_RDLY_DQ_BITSLIP_SIZE 1 -static inline uint32_t ddrphy_rdly_dq_bitslip_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x20L); -} -static inline void ddrphy_rdly_dq_bitslip_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x20L, v); -} -#define CSR_DDRPHY_WDLY_DQ_BITSLIP_RST_ADDR (CSR_DDRPHY_BASE + 0x24L) -#define CSR_DDRPHY_WDLY_DQ_BITSLIP_RST_SIZE 1 -static inline uint32_t ddrphy_wdly_dq_bitslip_rst_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x24L); -} -static inline void ddrphy_wdly_dq_bitslip_rst_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x24L, v); -} -#define CSR_DDRPHY_WDLY_DQ_BITSLIP_ADDR (CSR_DDRPHY_BASE + 0x28L) -#define CSR_DDRPHY_WDLY_DQ_BITSLIP_SIZE 1 -static inline uint32_t ddrphy_wdly_dq_bitslip_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x28L); -} -static inline void ddrphy_wdly_dq_bitslip_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x28L, v); -} -#define CSR_DDRPHY_RDPHASE_ADDR (CSR_DDRPHY_BASE + 0x2cL) -#define CSR_DDRPHY_RDPHASE_SIZE 1 -static inline uint32_t ddrphy_rdphase_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x2cL); -} -static inline void ddrphy_rdphase_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x2cL, v); -} -#define CSR_DDRPHY_WRPHASE_ADDR (CSR_DDRPHY_BASE + 0x30L) -#define CSR_DDRPHY_WRPHASE_SIZE 1 -static inline uint32_t ddrphy_wrphase_read(struct sbusfpga_ddrphy_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x30L); -} -static inline void ddrphy_wrphase_write(struct sbusfpga_ddrphy_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_ddrphy, 0x30L, v); -} -#endif // CSR_DDRPHY_BASE - -/* exchange_with_mem */ -#ifndef CSR_EXCHANGE_WITH_MEM_BASE -#define CSR_EXCHANGE_WITH_MEM_BASE (CSR_BASE + 0x3000L) -#define CSR_EXCHANGE_WITH_MEM_BLK_SIZE_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0x0L) -#define CSR_EXCHANGE_WITH_MEM_BLK_SIZE_SIZE 1 -static inline uint32_t exchange_with_mem_blk_size_read(struct sbusfpga_exchange_with_mem_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x0L); -} -#define CSR_EXCHANGE_WITH_MEM_BLK_BASE_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0x4L) -#define CSR_EXCHANGE_WITH_MEM_BLK_BASE_SIZE 1 -static inline uint32_t exchange_with_mem_blk_base_read(struct sbusfpga_exchange_with_mem_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x4L); -} -#define CSR_EXCHANGE_WITH_MEM_MEM_SIZE_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0x8L) -#define CSR_EXCHANGE_WITH_MEM_MEM_SIZE_SIZE 1 -static inline uint32_t exchange_with_mem_mem_size_read(struct sbusfpga_exchange_with_mem_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x8L); -} -#define CSR_EXCHANGE_WITH_MEM_BLK_ADDR_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0xcL) -#define CSR_EXCHANGE_WITH_MEM_BLK_ADDR_SIZE 1 -static inline uint32_t exchange_with_mem_blk_addr_read(struct sbusfpga_exchange_with_mem_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0xcL); -} -static inline void exchange_with_mem_blk_addr_write(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0xcL, v); -} -#define CSR_EXCHANGE_WITH_MEM_DMA_ADDR_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0x10L) -#define CSR_EXCHANGE_WITH_MEM_DMA_ADDR_SIZE 1 -static inline uint32_t exchange_with_mem_dma_addr_read(struct sbusfpga_exchange_with_mem_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x10L); -} -static inline void exchange_with_mem_dma_addr_write(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x10L, v); -} -#define CSR_EXCHANGE_WITH_MEM_BLK_CNT_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0x14L) -#define CSR_EXCHANGE_WITH_MEM_BLK_CNT_SIZE 1 -static inline uint32_t exchange_with_mem_blk_cnt_read(struct sbusfpga_exchange_with_mem_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x14L); -} -static inline void exchange_with_mem_blk_cnt_write(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x14L, v); -} -#define CSR_EXCHANGE_WITH_MEM_BLK_CNT_BLK_CNT_OFFSET 0 -#define CSR_EXCHANGE_WITH_MEM_BLK_CNT_BLK_CNT_SIZE 16 -static inline uint32_t exchange_with_mem_blk_cnt_blk_cnt_extract(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 16)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t exchange_with_mem_blk_cnt_blk_cnt_read(struct sbusfpga_exchange_with_mem_softc *sc) { - uint32_t word = exchange_with_mem_blk_cnt_read(sc); - return exchange_with_mem_blk_cnt_blk_cnt_extract(sc, word); -} -static inline uint32_t exchange_with_mem_blk_cnt_blk_cnt_replace(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 16)-1); - return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ; -} -static inline void exchange_with_mem_blk_cnt_blk_cnt_write(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t plain_value) { - uint32_t oldword = exchange_with_mem_blk_cnt_read(sc); - uint32_t newword = exchange_with_mem_blk_cnt_blk_cnt_replace(sc, oldword, plain_value); - exchange_with_mem_blk_cnt_write(sc, newword); -} -#define CSR_EXCHANGE_WITH_MEM_BLK_CNT_RSVD_OFFSET 16 -#define CSR_EXCHANGE_WITH_MEM_BLK_CNT_RSVD_SIZE 15 -static inline uint32_t exchange_with_mem_blk_cnt_rsvd_extract(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 15)-1); - return ( (oldword >> 16) & mask ); -} -static inline uint32_t exchange_with_mem_blk_cnt_rsvd_read(struct sbusfpga_exchange_with_mem_softc *sc) { - uint32_t word = exchange_with_mem_blk_cnt_read(sc); - return exchange_with_mem_blk_cnt_rsvd_extract(sc, word); -} -static inline uint32_t exchange_with_mem_blk_cnt_rsvd_replace(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 15)-1); - return (oldword & (~(mask << 16))) | (mask & plain_value)<< 16 ; -} -static inline void exchange_with_mem_blk_cnt_rsvd_write(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t plain_value) { - uint32_t oldword = exchange_with_mem_blk_cnt_read(sc); - uint32_t newword = exchange_with_mem_blk_cnt_rsvd_replace(sc, oldword, plain_value); - exchange_with_mem_blk_cnt_write(sc, newword); -} -#define CSR_EXCHANGE_WITH_MEM_BLK_CNT_RD_WR_OFFSET 31 -#define CSR_EXCHANGE_WITH_MEM_BLK_CNT_RD_WR_SIZE 1 -static inline uint32_t exchange_with_mem_blk_cnt_rd_wr_extract(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 31) & mask ); -} -static inline uint32_t exchange_with_mem_blk_cnt_rd_wr_read(struct sbusfpga_exchange_with_mem_softc *sc) { - uint32_t word = exchange_with_mem_blk_cnt_read(sc); - return exchange_with_mem_blk_cnt_rd_wr_extract(sc, word); -} -static inline uint32_t exchange_with_mem_blk_cnt_rd_wr_replace(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 31))) | (mask & plain_value)<< 31 ; -} -static inline void exchange_with_mem_blk_cnt_rd_wr_write(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t plain_value) { - uint32_t oldword = exchange_with_mem_blk_cnt_read(sc); - uint32_t newword = exchange_with_mem_blk_cnt_rd_wr_replace(sc, oldword, plain_value); - exchange_with_mem_blk_cnt_write(sc, newword); -} -#define CSR_EXCHANGE_WITH_MEM_LAST_BLK_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0x18L) -#define CSR_EXCHANGE_WITH_MEM_LAST_BLK_SIZE 1 -static inline uint32_t exchange_with_mem_last_blk_read(struct sbusfpga_exchange_with_mem_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x18L); -} -#define CSR_EXCHANGE_WITH_MEM_LAST_DMA_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0x1cL) -#define CSR_EXCHANGE_WITH_MEM_LAST_DMA_SIZE 1 -static inline uint32_t exchange_with_mem_last_dma_read(struct sbusfpga_exchange_with_mem_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x1cL); -} -#define CSR_EXCHANGE_WITH_MEM_DMA_WRDONE_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0x20L) -#define CSR_EXCHANGE_WITH_MEM_DMA_WRDONE_SIZE 1 -static inline uint32_t exchange_with_mem_dma_wrdone_read(struct sbusfpga_exchange_with_mem_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x20L); -} -#define CSR_EXCHANGE_WITH_MEM_BLK_REM_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0x24L) -#define CSR_EXCHANGE_WITH_MEM_BLK_REM_SIZE 1 -static inline uint32_t exchange_with_mem_blk_rem_read(struct sbusfpga_exchange_with_mem_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x24L); -} -#define CSR_EXCHANGE_WITH_MEM_DMA_STATUS_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0x28L) -#define CSR_EXCHANGE_WITH_MEM_DMA_STATUS_SIZE 1 -static inline uint32_t exchange_with_mem_dma_status_read(struct sbusfpga_exchange_with_mem_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x28L); -} -#define CSR_EXCHANGE_WITH_MEM_DMA_STATUS_RD_FSM_BUSY_OFFSET 0 -#define CSR_EXCHANGE_WITH_MEM_DMA_STATUS_RD_FSM_BUSY_SIZE 1 -static inline uint32_t exchange_with_mem_dma_status_rd_fsm_busy_extract(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t exchange_with_mem_dma_status_rd_fsm_busy_read(struct sbusfpga_exchange_with_mem_softc *sc) { - uint32_t word = exchange_with_mem_dma_status_read(sc); - return exchange_with_mem_dma_status_rd_fsm_busy_extract(sc, word); -} -#define CSR_EXCHANGE_WITH_MEM_DMA_STATUS_WR_FSM_BUSY_OFFSET 1 -#define CSR_EXCHANGE_WITH_MEM_DMA_STATUS_WR_FSM_BUSY_SIZE 1 -static inline uint32_t exchange_with_mem_dma_status_wr_fsm_busy_extract(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 1) & mask ); -} -static inline uint32_t exchange_with_mem_dma_status_wr_fsm_busy_read(struct sbusfpga_exchange_with_mem_softc *sc) { - uint32_t word = exchange_with_mem_dma_status_read(sc); - return exchange_with_mem_dma_status_wr_fsm_busy_extract(sc, word); -} -#define CSR_EXCHANGE_WITH_MEM_DMA_STATUS_HAS_WR_DATA_OFFSET 2 -#define CSR_EXCHANGE_WITH_MEM_DMA_STATUS_HAS_WR_DATA_SIZE 1 -static inline uint32_t exchange_with_mem_dma_status_has_wr_data_extract(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 2) & mask ); -} -static inline uint32_t exchange_with_mem_dma_status_has_wr_data_read(struct sbusfpga_exchange_with_mem_softc *sc) { - uint32_t word = exchange_with_mem_dma_status_read(sc); - return exchange_with_mem_dma_status_has_wr_data_extract(sc, word); -} -#define CSR_EXCHANGE_WITH_MEM_DMA_STATUS_HAS_REQUESTS_OFFSET 3 -#define CSR_EXCHANGE_WITH_MEM_DMA_STATUS_HAS_REQUESTS_SIZE 1 -static inline uint32_t exchange_with_mem_dma_status_has_requests_extract(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 3) & mask ); -} -static inline uint32_t exchange_with_mem_dma_status_has_requests_read(struct sbusfpga_exchange_with_mem_softc *sc) { - uint32_t word = exchange_with_mem_dma_status_read(sc); - return exchange_with_mem_dma_status_has_requests_extract(sc, word); -} -#define CSR_EXCHANGE_WITH_MEM_DMA_STATUS_HAS_RD_DATA_OFFSET 4 -#define CSR_EXCHANGE_WITH_MEM_DMA_STATUS_HAS_RD_DATA_SIZE 1 -static inline uint32_t exchange_with_mem_dma_status_has_rd_data_extract(struct sbusfpga_exchange_with_mem_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 4) & mask ); -} -static inline uint32_t exchange_with_mem_dma_status_has_rd_data_read(struct sbusfpga_exchange_with_mem_softc *sc) { - uint32_t word = exchange_with_mem_dma_status_read(sc); - return exchange_with_mem_dma_status_has_rd_data_extract(sc, word); -} -#define CSR_EXCHANGE_WITH_MEM_WR_TOSDRAM_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0x2cL) -#define CSR_EXCHANGE_WITH_MEM_WR_TOSDRAM_SIZE 1 -static inline uint32_t exchange_with_mem_wr_tosdram_read(struct sbusfpga_exchange_with_mem_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_exchange_with_mem, 0x2cL); -} -#define CSR_EXCHANGE_WITH_MEM_CHECKSUM_ADDR (CSR_EXCHANGE_WITH_MEM_BASE + 0x30L) -#define CSR_EXCHANGE_WITH_MEM_CHECKSUM_SIZE 8 -#endif // CSR_EXCHANGE_WITH_MEM_BASE - -/* sbus_bus_stat */ -#ifndef CSR_SBUS_BUS_STAT_BASE -#define CSR_SBUS_BUS_STAT_BASE (CSR_BASE + 0x4000L) -#define CSR_SBUS_BUS_STAT_STAT_CTRL_ADDR (CSR_SBUS_BUS_STAT_BASE + 0x0L) -#define CSR_SBUS_BUS_STAT_STAT_CTRL_SIZE 1 -static inline uint32_t sbus_bus_stat_stat_ctrl_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0x0L); -} -static inline void sbus_bus_stat_stat_ctrl_write(struct sbusfpga_sbus_bus_stat_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0x0L, v); -} -#define CSR_SBUS_BUS_STAT_STAT_CTRL_UPDATE_OFFSET 0 -#define CSR_SBUS_BUS_STAT_STAT_CTRL_UPDATE_SIZE 1 -static inline uint32_t sbus_bus_stat_stat_ctrl_update_extract(struct sbusfpga_sbus_bus_stat_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t sbus_bus_stat_stat_ctrl_update_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - uint32_t word = sbus_bus_stat_stat_ctrl_read(sc); - return sbus_bus_stat_stat_ctrl_update_extract(sc, word); -} -static inline uint32_t sbus_bus_stat_stat_ctrl_update_replace(struct sbusfpga_sbus_bus_stat_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ; -} -static inline void sbus_bus_stat_stat_ctrl_update_write(struct sbusfpga_sbus_bus_stat_softc *sc, uint32_t plain_value) { - uint32_t oldword = sbus_bus_stat_stat_ctrl_read(sc); - uint32_t newword = sbus_bus_stat_stat_ctrl_update_replace(sc, oldword, plain_value); - sbus_bus_stat_stat_ctrl_write(sc, newword); -} -#define CSR_SBUS_BUS_STAT_LIVE_STAT_CYCLE_COUNTER_ADDR (CSR_SBUS_BUS_STAT_BASE + 0x4L) -#define CSR_SBUS_BUS_STAT_LIVE_STAT_CYCLE_COUNTER_SIZE 1 -static inline uint32_t sbus_bus_stat_live_stat_cycle_counter_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0x4L); -} -#define CSR_SBUS_BUS_STAT_STAT_CYCLE_COUNTER_ADDR (CSR_SBUS_BUS_STAT_BASE + 0x8L) -#define CSR_SBUS_BUS_STAT_STAT_CYCLE_COUNTER_SIZE 1 -static inline uint32_t sbus_bus_stat_stat_cycle_counter_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0x8L); -} -#define CSR_SBUS_BUS_STAT_STAT_SLAVE_START_COUNTER_ADDR (CSR_SBUS_BUS_STAT_BASE + 0xcL) -#define CSR_SBUS_BUS_STAT_STAT_SLAVE_START_COUNTER_SIZE 1 -static inline uint32_t sbus_bus_stat_stat_slave_start_counter_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0xcL); -} -#define CSR_SBUS_BUS_STAT_STAT_SLAVE_DONE_COUNTER_ADDR (CSR_SBUS_BUS_STAT_BASE + 0x10L) -#define CSR_SBUS_BUS_STAT_STAT_SLAVE_DONE_COUNTER_SIZE 1 -static inline uint32_t sbus_bus_stat_stat_slave_done_counter_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0x10L); -} -#define CSR_SBUS_BUS_STAT_STAT_SLAVE_RERUN_COUNTER_ADDR (CSR_SBUS_BUS_STAT_BASE + 0x14L) -#define CSR_SBUS_BUS_STAT_STAT_SLAVE_RERUN_COUNTER_SIZE 1 -static inline uint32_t sbus_bus_stat_stat_slave_rerun_counter_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0x14L); -} -#define CSR_SBUS_BUS_STAT_STAT_SLAVE_EARLY_ERROR_COUNTER_ADDR (CSR_SBUS_BUS_STAT_BASE + 0x18L) -#define CSR_SBUS_BUS_STAT_STAT_SLAVE_EARLY_ERROR_COUNTER_SIZE 1 -static inline uint32_t sbus_bus_stat_stat_slave_early_error_counter_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0x18L); -} -#define CSR_SBUS_BUS_STAT_STAT_MASTER_START_COUNTER_ADDR (CSR_SBUS_BUS_STAT_BASE + 0x1cL) -#define CSR_SBUS_BUS_STAT_STAT_MASTER_START_COUNTER_SIZE 1 -static inline uint32_t sbus_bus_stat_stat_master_start_counter_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0x1cL); -} -#define CSR_SBUS_BUS_STAT_STAT_MASTER_DONE_COUNTER_ADDR (CSR_SBUS_BUS_STAT_BASE + 0x20L) -#define CSR_SBUS_BUS_STAT_STAT_MASTER_DONE_COUNTER_SIZE 1 -static inline uint32_t sbus_bus_stat_stat_master_done_counter_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0x20L); -} -#define CSR_SBUS_BUS_STAT_STAT_MASTER_ERROR_COUNTER_ADDR (CSR_SBUS_BUS_STAT_BASE + 0x24L) -#define CSR_SBUS_BUS_STAT_STAT_MASTER_ERROR_COUNTER_SIZE 1 -static inline uint32_t sbus_bus_stat_stat_master_error_counter_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0x24L); -} -#define CSR_SBUS_BUS_STAT_STAT_MASTER_RERUN_COUNTER_ADDR (CSR_SBUS_BUS_STAT_BASE + 0x28L) -#define CSR_SBUS_BUS_STAT_STAT_MASTER_RERUN_COUNTER_SIZE 1 -static inline uint32_t sbus_bus_stat_stat_master_rerun_counter_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0x28L); -} -#define CSR_SBUS_BUS_STAT_SBUS_MASTER_ERROR_VIRTUAL_ADDR (CSR_SBUS_BUS_STAT_BASE + 0x2cL) -#define CSR_SBUS_BUS_STAT_SBUS_MASTER_ERROR_VIRTUAL_SIZE 1 -static inline uint32_t sbus_bus_stat_sbus_master_error_virtual_read(struct sbusfpga_sbus_bus_stat_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sbus_bus_stat, 0x2cL); -} -#endif // CSR_SBUS_BUS_STAT_BASE - -/* sdram */ -#ifndef CSR_SDRAM_BASE -#define CSR_SDRAM_BASE (CSR_BASE + 0x5000L) -#define CSR_SDRAM_DFII_CONTROL_ADDR (CSR_SDRAM_BASE + 0x0L) -#define CSR_SDRAM_DFII_CONTROL_SIZE 1 -static inline uint32_t sdram_dfii_control_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x0L); -} -static inline void sdram_dfii_control_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x0L, v); -} -#define CSR_SDRAM_DFII_CONTROL_SEL_OFFSET 0 -#define CSR_SDRAM_DFII_CONTROL_SEL_SIZE 1 -static inline uint32_t sdram_dfii_control_sel_extract(struct sbusfpga_sdram_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 0) & mask ); -} -static inline uint32_t sdram_dfii_control_sel_read(struct sbusfpga_sdram_softc *sc) { - uint32_t word = sdram_dfii_control_read(sc); - return sdram_dfii_control_sel_extract(sc, word); -} -static inline uint32_t sdram_dfii_control_sel_replace(struct sbusfpga_sdram_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 0))) | (mask & plain_value)<< 0 ; -} -static inline void sdram_dfii_control_sel_write(struct sbusfpga_sdram_softc *sc, uint32_t plain_value) { - uint32_t oldword = sdram_dfii_control_read(sc); - uint32_t newword = sdram_dfii_control_sel_replace(sc, oldword, plain_value); - sdram_dfii_control_write(sc, newword); -} -#define CSR_SDRAM_DFII_CONTROL_CKE_OFFSET 1 -#define CSR_SDRAM_DFII_CONTROL_CKE_SIZE 1 -static inline uint32_t sdram_dfii_control_cke_extract(struct sbusfpga_sdram_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 1) & mask ); -} -static inline uint32_t sdram_dfii_control_cke_read(struct sbusfpga_sdram_softc *sc) { - uint32_t word = sdram_dfii_control_read(sc); - return sdram_dfii_control_cke_extract(sc, word); -} -static inline uint32_t sdram_dfii_control_cke_replace(struct sbusfpga_sdram_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 1))) | (mask & plain_value)<< 1 ; -} -static inline void sdram_dfii_control_cke_write(struct sbusfpga_sdram_softc *sc, uint32_t plain_value) { - uint32_t oldword = sdram_dfii_control_read(sc); - uint32_t newword = sdram_dfii_control_cke_replace(sc, oldword, plain_value); - sdram_dfii_control_write(sc, newword); -} -#define CSR_SDRAM_DFII_CONTROL_ODT_OFFSET 2 -#define CSR_SDRAM_DFII_CONTROL_ODT_SIZE 1 -static inline uint32_t sdram_dfii_control_odt_extract(struct sbusfpga_sdram_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 2) & mask ); -} -static inline uint32_t sdram_dfii_control_odt_read(struct sbusfpga_sdram_softc *sc) { - uint32_t word = sdram_dfii_control_read(sc); - return sdram_dfii_control_odt_extract(sc, word); -} -static inline uint32_t sdram_dfii_control_odt_replace(struct sbusfpga_sdram_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 2))) | (mask & plain_value)<< 2 ; -} -static inline void sdram_dfii_control_odt_write(struct sbusfpga_sdram_softc *sc, uint32_t plain_value) { - uint32_t oldword = sdram_dfii_control_read(sc); - uint32_t newword = sdram_dfii_control_odt_replace(sc, oldword, plain_value); - sdram_dfii_control_write(sc, newword); -} -#define CSR_SDRAM_DFII_CONTROL_RESET_N_OFFSET 3 -#define CSR_SDRAM_DFII_CONTROL_RESET_N_SIZE 1 -static inline uint32_t sdram_dfii_control_reset_n_extract(struct sbusfpga_sdram_softc *sc, uint32_t oldword) { - uint32_t mask = ((1 << 1)-1); - return ( (oldword >> 3) & mask ); -} -static inline uint32_t sdram_dfii_control_reset_n_read(struct sbusfpga_sdram_softc *sc) { - uint32_t word = sdram_dfii_control_read(sc); - return sdram_dfii_control_reset_n_extract(sc, word); -} -static inline uint32_t sdram_dfii_control_reset_n_replace(struct sbusfpga_sdram_softc *sc, uint32_t oldword, uint32_t plain_value) { - uint32_t mask = ((1 << 1)-1); - return (oldword & (~(mask << 3))) | (mask & plain_value)<< 3 ; -} -static inline void sdram_dfii_control_reset_n_write(struct sbusfpga_sdram_softc *sc, uint32_t plain_value) { - uint32_t oldword = sdram_dfii_control_read(sc); - uint32_t newword = sdram_dfii_control_reset_n_replace(sc, oldword, plain_value); - sdram_dfii_control_write(sc, newword); -} -#define CSR_SDRAM_DFII_PI0_COMMAND_ADDR (CSR_SDRAM_BASE + 0x4L) -#define CSR_SDRAM_DFII_PI0_COMMAND_SIZE 1 -static inline uint32_t sdram_dfii_pi0_command_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x4L); -} -static inline void sdram_dfii_pi0_command_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x4L, v); -} -#define CSR_SDRAM_DFII_PI0_COMMAND_ISSUE_ADDR (CSR_SDRAM_BASE + 0x8L) -#define CSR_SDRAM_DFII_PI0_COMMAND_ISSUE_SIZE 1 -static inline uint32_t sdram_dfii_pi0_command_issue_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x8L); -} -static inline void sdram_dfii_pi0_command_issue_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x8L, v); -} -#define CSR_SDRAM_DFII_PI0_ADDRESS_ADDR (CSR_SDRAM_BASE + 0xcL) -#define CSR_SDRAM_DFII_PI0_ADDRESS_SIZE 1 -static inline uint32_t sdram_dfii_pi0_address_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0xcL); -} -static inline void sdram_dfii_pi0_address_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0xcL, v); -} -#define CSR_SDRAM_DFII_PI0_BADDRESS_ADDR (CSR_SDRAM_BASE + 0x10L) -#define CSR_SDRAM_DFII_PI0_BADDRESS_SIZE 1 -static inline uint32_t sdram_dfii_pi0_baddress_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x10L); -} -static inline void sdram_dfii_pi0_baddress_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x10L, v); -} -#define CSR_SDRAM_DFII_PI0_WRDATA_ADDR (CSR_SDRAM_BASE + 0x14L) -#define CSR_SDRAM_DFII_PI0_WRDATA_SIZE 1 -static inline uint32_t sdram_dfii_pi0_wrdata_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x14L); -} -static inline void sdram_dfii_pi0_wrdata_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x14L, v); -} -#define CSR_SDRAM_DFII_PI0_RDDATA_ADDR (CSR_SDRAM_BASE + 0x18L) -#define CSR_SDRAM_DFII_PI0_RDDATA_SIZE 1 -static inline uint32_t sdram_dfii_pi0_rddata_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x18L); -} -#define CSR_SDRAM_DFII_PI1_COMMAND_ADDR (CSR_SDRAM_BASE + 0x1cL) -#define CSR_SDRAM_DFII_PI1_COMMAND_SIZE 1 -static inline uint32_t sdram_dfii_pi1_command_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x1cL); -} -static inline void sdram_dfii_pi1_command_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x1cL, v); -} -#define CSR_SDRAM_DFII_PI1_COMMAND_ISSUE_ADDR (CSR_SDRAM_BASE + 0x20L) -#define CSR_SDRAM_DFII_PI1_COMMAND_ISSUE_SIZE 1 -static inline uint32_t sdram_dfii_pi1_command_issue_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x20L); -} -static inline void sdram_dfii_pi1_command_issue_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x20L, v); -} -#define CSR_SDRAM_DFII_PI1_ADDRESS_ADDR (CSR_SDRAM_BASE + 0x24L) -#define CSR_SDRAM_DFII_PI1_ADDRESS_SIZE 1 -static inline uint32_t sdram_dfii_pi1_address_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x24L); -} -static inline void sdram_dfii_pi1_address_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x24L, v); -} -#define CSR_SDRAM_DFII_PI1_BADDRESS_ADDR (CSR_SDRAM_BASE + 0x28L) -#define CSR_SDRAM_DFII_PI1_BADDRESS_SIZE 1 -static inline uint32_t sdram_dfii_pi1_baddress_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x28L); -} -static inline void sdram_dfii_pi1_baddress_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x28L, v); -} -#define CSR_SDRAM_DFII_PI1_WRDATA_ADDR (CSR_SDRAM_BASE + 0x2cL) -#define CSR_SDRAM_DFII_PI1_WRDATA_SIZE 1 -static inline uint32_t sdram_dfii_pi1_wrdata_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x2cL); -} -static inline void sdram_dfii_pi1_wrdata_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x2cL, v); -} -#define CSR_SDRAM_DFII_PI1_RDDATA_ADDR (CSR_SDRAM_BASE + 0x30L) -#define CSR_SDRAM_DFII_PI1_RDDATA_SIZE 1 -static inline uint32_t sdram_dfii_pi1_rddata_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x30L); -} -#define CSR_SDRAM_DFII_PI2_COMMAND_ADDR (CSR_SDRAM_BASE + 0x34L) -#define CSR_SDRAM_DFII_PI2_COMMAND_SIZE 1 -static inline uint32_t sdram_dfii_pi2_command_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x34L); -} -static inline void sdram_dfii_pi2_command_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x34L, v); -} -#define CSR_SDRAM_DFII_PI2_COMMAND_ISSUE_ADDR (CSR_SDRAM_BASE + 0x38L) -#define CSR_SDRAM_DFII_PI2_COMMAND_ISSUE_SIZE 1 -static inline uint32_t sdram_dfii_pi2_command_issue_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x38L); -} -static inline void sdram_dfii_pi2_command_issue_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x38L, v); -} -#define CSR_SDRAM_DFII_PI2_ADDRESS_ADDR (CSR_SDRAM_BASE + 0x3cL) -#define CSR_SDRAM_DFII_PI2_ADDRESS_SIZE 1 -static inline uint32_t sdram_dfii_pi2_address_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x3cL); -} -static inline void sdram_dfii_pi2_address_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x3cL, v); -} -#define CSR_SDRAM_DFII_PI2_BADDRESS_ADDR (CSR_SDRAM_BASE + 0x40L) -#define CSR_SDRAM_DFII_PI2_BADDRESS_SIZE 1 -static inline uint32_t sdram_dfii_pi2_baddress_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x40L); -} -static inline void sdram_dfii_pi2_baddress_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x40L, v); -} -#define CSR_SDRAM_DFII_PI2_WRDATA_ADDR (CSR_SDRAM_BASE + 0x44L) -#define CSR_SDRAM_DFII_PI2_WRDATA_SIZE 1 -static inline uint32_t sdram_dfii_pi2_wrdata_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x44L); -} -static inline void sdram_dfii_pi2_wrdata_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x44L, v); -} -#define CSR_SDRAM_DFII_PI2_RDDATA_ADDR (CSR_SDRAM_BASE + 0x48L) -#define CSR_SDRAM_DFII_PI2_RDDATA_SIZE 1 -static inline uint32_t sdram_dfii_pi2_rddata_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x48L); -} -#define CSR_SDRAM_DFII_PI3_COMMAND_ADDR (CSR_SDRAM_BASE + 0x4cL) -#define CSR_SDRAM_DFII_PI3_COMMAND_SIZE 1 -static inline uint32_t sdram_dfii_pi3_command_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x4cL); -} -static inline void sdram_dfii_pi3_command_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x4cL, v); -} -#define CSR_SDRAM_DFII_PI3_COMMAND_ISSUE_ADDR (CSR_SDRAM_BASE + 0x50L) -#define CSR_SDRAM_DFII_PI3_COMMAND_ISSUE_SIZE 1 -static inline uint32_t sdram_dfii_pi3_command_issue_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x50L); -} -static inline void sdram_dfii_pi3_command_issue_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x50L, v); -} -#define CSR_SDRAM_DFII_PI3_ADDRESS_ADDR (CSR_SDRAM_BASE + 0x54L) -#define CSR_SDRAM_DFII_PI3_ADDRESS_SIZE 1 -static inline uint32_t sdram_dfii_pi3_address_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x54L); -} -static inline void sdram_dfii_pi3_address_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x54L, v); -} -#define CSR_SDRAM_DFII_PI3_BADDRESS_ADDR (CSR_SDRAM_BASE + 0x58L) -#define CSR_SDRAM_DFII_PI3_BADDRESS_SIZE 1 -static inline uint32_t sdram_dfii_pi3_baddress_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x58L); -} -static inline void sdram_dfii_pi3_baddress_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x58L, v); -} -#define CSR_SDRAM_DFII_PI3_WRDATA_ADDR (CSR_SDRAM_BASE + 0x5cL) -#define CSR_SDRAM_DFII_PI3_WRDATA_SIZE 1 -static inline uint32_t sdram_dfii_pi3_wrdata_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x5cL); -} -static inline void sdram_dfii_pi3_wrdata_write(struct sbusfpga_sdram_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x5cL, v); -} -#define CSR_SDRAM_DFII_PI3_RDDATA_ADDR (CSR_SDRAM_BASE + 0x60L) -#define CSR_SDRAM_DFII_PI3_RDDATA_SIZE 1 -static inline uint32_t sdram_dfii_pi3_rddata_read(struct sbusfpga_sdram_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_sdram, 0x60L); -} -#endif // CSR_SDRAM_BASE - -/* trng */ -#ifndef CSR_TRNG_BASE -#define CSR_TRNG_BASE (CSR_BASE + 0x6000L) -#define CSR_TRNG_CTRL_ADDR (CSR_TRNG_BASE + 0x0L) -#define CSR_TRNG_CTRL_SIZE 1 -static inline uint32_t trng_ctrl_read(struct sbusfpga_trng_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_trng, 0x0L); -} -static inline void trng_ctrl_write(struct sbusfpga_trng_softc *sc, uint32_t v) { - bus_space_write_4(sc->sc_bustag, sc->sc_bhregs_trng, 0x0L, v); -} -#define CSR_TRNG_DATA_ADDR (CSR_TRNG_BASE + 0x4L) -#define CSR_TRNG_DATA_SIZE 1 -static inline uint32_t trng_data_read(struct sbusfpga_trng_softc *sc) { - return bus_space_read_4(sc->sc_bustag, sc->sc_bhregs_trng, 0x4L); -} -#endif // CSR_TRNG_BASE - -#endif diff --git a/sbus-to-ztex-gateware-migen/sbus_to_fpga_export.py b/sbus-to-ztex-gateware-migen/sbus_to_fpga_export.py index e6a2f1a..48ac655 100644 --- a/sbus-to-ztex-gateware-migen/sbus_to_fpga_export.py +++ b/sbus-to-ztex-gateware-migen/sbus_to_fpga_export.py @@ -131,3 +131,58 @@ def get_csr_forth_header(csr_regions, mem_regions, constants, csr_base=None): for name, region in mem_regions.items(): r += "h# " + hex(region.origin).replace("0x", "") + " constant " + "sbusfpga_regionaddr_{}".format(name) + "\n" return r + + +def get_csr_header_split(regions, constants, csr_base=None, with_access_functions=True): + alignment = constants.get("CONFIG_CSR_ALIGNMENT", 32) + ar = dict() + for name, region in regions.items(): + r = generated_banner("//") + + r += "#ifndef __GENERATED_{}_CSR_H\n#define __GENERATED_{}_CSR_H\n".format(name.upper(), name.upper()) + csr_base = csr_base if csr_base is not None else regions[next(iter(regions))].origin + + origin = region.origin - csr_base + r += "\n/* "+name+" */\n" + r += "#ifndef CSR_BASE\n" + r += "#define CSR_BASE {}L\n".format(hex(csr_base)) + r += "#endif\n" + r += "#ifndef CSR_"+name.upper()+"_BASE\n" + r += "#define CSR_"+name.upper()+"_BASE (CSR_BASE + "+hex(origin)+"L)\n" + if not isinstance(region.obj, Memory): + for csr in region.obj: + nr = (csr.size + region.busword - 1)//region.busword + r += _get_rw_functions_c(name, csr.name, origin, region.origin - csr_base, nr, region.busword, alignment, + getattr(csr, "read_only", False), with_access_functions) + origin += alignment//8*nr + if hasattr(csr, "fields"): + for field in csr.fields.fields: + offset = str(field.offset) + size = str(field.size) + r += "#define CSR_"+name.upper()+"_"+csr.name.upper()+"_"+field.name.upper()+"_OFFSET "+offset+"\n" + r += "#define CSR_"+name.upper()+"_"+csr.name.upper()+"_"+field.name.upper()+"_SIZE "+size+"\n" + if with_access_functions and csr.size <= 32: # FIXME: Implement extract/read functions for csr.size > 32-bit. + reg_name = name + "_" + csr.name.lower() + field_name = reg_name + "_" + field.name.lower() + r += "static inline uint32_t " + field_name + "_extract(struct sbusfpga_" + name + "_softc *sc, uint32_t oldword) {\n" + r += "\tuint32_t mask = ((1 << " + size + ")-1);\n" + r += "\treturn ( (oldword >> " + offset + ") & mask );\n}\n" + r += "static inline uint32_t " + field_name + "_read(struct sbusfpga_" + name + "_softc *sc) {\n" + r += "\tuint32_t word = " + reg_name + "_read(sc);\n" + r += "\treturn " + field_name + "_extract(sc, word);\n" + r += "}\n" + if not getattr(csr, "read_only", False): + r += "static inline uint32_t " + field_name + "_replace(struct sbusfpga_" + name + "_softc *sc, uint32_t oldword, uint32_t plain_value) {\n" + r += "\tuint32_t mask = ((1 << " + size + ")-1);\n" + r += "\treturn (oldword & (~(mask << " + offset + "))) | (mask & plain_value)<< " + offset + " ;\n}\n" + r += "static inline void " + field_name + "_write(struct sbusfpga_" + name + "_softc *sc, uint32_t plain_value) {\n" + r += "\tuint32_t oldword = " + reg_name + "_read(sc);\n" + r += "\tuint32_t newword = " + field_name + "_replace(sc, oldword, plain_value);\n" + r += "\t" + reg_name + "_write(sc, newword);\n" + r += "}\n" + + r += "#endif // CSR_"+name.upper()+"_BASE\n" + r += "\n#endif\n" + ar[name] = r + + return ar diff --git a/sbus-to-ztex-gateware-migen/sbus_to_fpga_soc.py b/sbus-to-ztex-gateware-migen/sbus_to_fpga_soc.py index 2c88ff0..841d141 100644 --- a/sbus-to-ztex-gateware-migen/sbus_to_fpga_soc.py +++ b/sbus-to-ztex-gateware-migen/sbus_to_fpga_soc.py @@ -349,6 +349,14 @@ def main(): csr_base = soc.mem_regions['csr'].origin) write_to_file(os.path.join("netbsd_csr.h"), csr_contents) + csr_contents_dict = sbus_to_fpga_export.get_csr_header_split( + regions = soc.csr_regions, + constants = soc.constants, + csr_base = soc.mem_regions['csr'].origin) + for name in csr_contents_dict.keys(): + write_to_file(os.path.join("sbusfpga_csr_{}.h".format(name)), csr_contents_dict[name]) + + # tells the prom where to find what # just one, as that is board-specific # BEWARE! then need to run 'forth_to_migen_rom.sh' *and* regenerate the bitstream with the proper PROM built-in!