github.com/rdolbeau.SBusFPGA
1
0
Fork 0
mirror of synced 2026-01-25 19:36:34 +00:00
Code Issues Projects Releases Wiki Activity

pipeline AES DMAs

Browse Source
This commit is contained in:
Romain Dolbeau
2021-01-09 08:17:46 -05:00
parent 140fb92032
commit 8e27ed97e6
4 changed files with 69 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
NetBSD/9.0/usr/src/sys/dev/sbus/rdfpga.c
View File

@@ -1084,11 +1084,11 @@ rdfpga_encdec_aes128cbc(struct rdfpga_softc *sw, const u_int8_t thesid, struct c
memcpy(kvap, idat, tocopy);
bus_dmamap_sync(sw->sc_dmatag, sw->sc_dmamap, 0, tocopy, BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
/* prepare write w/o start */
ctrl = ((uint64_t)(RDFPGA_MASK_DMA_CTRL_AES | ((tocopy/16)-1))) | ((uint64_t)(uint32_t)(sw->sc_dmamap->dm_segs[0].ds_addr)) << 32;
/* start write */
ctrl = ((uint64_t)(RDFPGA_MASK_DMA_CTRL_START | RDFPGA_MASK_DMA_CTRL_AES | ((tocopy/16)-1))) | ((uint64_t)(uint32_t)(sw->sc_dmamap->dm_segs[0].ds_addr)) << 32;
bus_space_write_8(sw->sc_bustag, sw->sc_bhregs, (RDFPGA_REG_DMAW_ADDR), ctrl);
/* start read */
ctrl = ((uint64_t)(RDFPGA_MASK_DMA_CTRL_START | RDFPGA_MASK_DMA_CTRL_AES | ((tocopy/16)-1))) | ((uint64_t)(uint32_t)(sw->sc_dmamap->dm_segs[0].ds_addr)) << 32;
ctrl = ((uint64_t)(RDFPGA_MASK_DMA_CTRL_START | RDFPGA_MASK_DMA_CTRL_AES | RDFPGA_MASK_DMA_CTRL_CBC | ((tocopy/16)-1))) | ((uint64_t)(uint32_t)(sw->sc_dmamap->dm_segs[0].ds_addr)) << 32;
bus_space_write_8(sw->sc_bustag, sw->sc_bhregs, (RDFPGA_REG_DMA_ADDR), ctrl);
rdfpga_wait_dma_ready(sw, 50000);
bus_dmamap_sync(sw->sc_dmatag, sw->sc_dmamap, 0, tocopy, BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);

1
NetBSD/9.0/usr/src/sys/dev/sbus/rdfpga.h
View File

@@ -79,6 +79,7 @@ struct rdfpga_softc {
#define RDFPGA_MASK_DMA_CTRL_WRITE 0x10000000 /* for AES only */
#define RDFPGA_MASK_DMA_CTRL_GCM 0x08000000
#define RDFPGA_MASK_DMA_CTRL_AES 0x04000000
#define RDFPGA_MASK_DMA_CTRL_CBC 0x02000000
#define RDFPGA_MASK_DMA_CTRL_BLKCNT 0x00000FFF
#define RDFPGA_VAL_DMA_MAX_BLKCNT 4096
#define RDFPGA_VAL_DMA_MAX_SZ (RDFPGA_VAL_DMA_MAX_BLKCNT*16)