diff --git a/sbus-to-ztex-gateware/sbus-to-ztex-timings-V1_2.xdc b/sbus-to-ztex-gateware/sbus-to-ztex-timings-V1_2.xdc
index 904f9e7..b2a9844 100644
--- a/sbus-to-ztex-gateware/sbus-to-ztex-timings-V1_2.xdc
+++ b/sbus-to-ztex-gateware/sbus-to-ztex-timings-V1_2.xdc
@@ -164,10 +164,10 @@ set_input_delay -clock SBUS_3V3_CLK -min 0.658 [get_ports {SBUS_3V3_PA[3]}]
 set_input_delay -clock SBUS_3V3_CLK -max 25.127 [get_ports {SBUS_3V3_PA[3]}]
 set_input_delay -clock SBUS_3V3_CLK -min 0.656 [get_ports {SBUS_3V3_PA[2]}]
 set_input_delay -clock SBUS_3V3_CLK -max 25.125 [get_ports {SBUS_3V3_PA[2]}]
-set_input_delay -clock SBUS_3V3_CLK -min 0.688 [get_ports {SBUS_3V3_EERs}]
-set_input_delay -clock SBUS_3V3_CLK -max 25.167 [get_ports {SBUS_3V3_EERs}]
-set_output_delay -clock SBUS_3V3_CLK -min -1.888 [get_ports {SBUS_3V3_EERs}]
-set_output_delay -clock SBUS_3V3_CLK -max 21.316 [get_ports {SBUS_3V3_EERs}]
+set_input_delay -clock SBUS_3V3_CLK -min 0.688 [get_ports {SBUS_3V3_ERRs}]
+set_input_delay -clock SBUS_3V3_CLK -max 25.167 [get_ports {SBUS_3V3_ERRs}]
+set_output_delay -clock SBUS_3V3_CLK -min -1.888 [get_ports {SBUS_3V3_ERRs}]
+set_output_delay -clock SBUS_3V3_CLK -max 21.316 [get_ports {SBUS_3V3_ERRs}]
 
 set_input_delay -clock SBUS_3V3_CLK -min 0.679 [get_ports {SBUS_3V3_PA[4]}]
 set_input_delay -clock SBUS_3V3_CLK -max 25.155 [get_ports {SBUS_3V3_PA[4]}]