diff --git a/.gitmodules b/.gitmodules index 1c209b9..1533b0b 100644 --- a/.gitmodules +++ b/.gitmodules @@ -4,3 +4,6 @@ [submodule "sbus-to-ztex-gateware-migen/deps/gateware"] path = sbus-to-ztex-gateware-migen/deps/gateware url = https://github.com/betrusted-io/gateware +[submodule "sbus-to-ztex-gateware-migen/openfirmware"] + path = sbus-to-ztex-gateware-migen/openfirmware + url = https://github.com/openbios/openfirmware diff --git a/sbus-to-ztex-gateware-migen/blit_cg6.sh b/sbus-to-ztex-gateware-migen/blit_cg6.sh index 50f42f3..736d8ec 100755 --- a/sbus-to-ztex-gateware-migen/blit_cg6.sh +++ b/sbus-to-ztex-gateware-migen/blit_cg6.sh @@ -4,7 +4,7 @@ HRES=${1:-1280} VRES=${2:-1024} BASE_FB=${3:-0x8FE00000} -GCCDIR=~/LITEX/riscv64-unknown-elf-gcc-10.1.0-2020.08.2-x86_64-linux-ubuntu14 +GCCDIR=~dolbeau/LITEX/riscv64-unknown-elf-gcc-10.1.0-2020.08.2-x86_64-linux-ubuntu14 GCCPFX=riscv64-unknown-elf- GCCLINK=${GCCDIR}/bin/${GCCPFX}gcc diff --git a/sbus-to-ztex-gateware-migen/do_V1.2 b/sbus-to-ztex-gateware-migen/do_V1.2 new file mode 100644 index 0000000..018a300 --- /dev/null +++ b/sbus-to-ztex-gateware-migen/do_V1.2 @@ -0,0 +1,24 @@ +( +source /opt/Xilinx/Vivado/2020.1/settings64.sh +export LD_LIBRARY_PATH=/opt/Xilinx/Vivado/2020.1/lib/lnx64.o/SuSE +export PYTHONPATH=deps/gateware:$PYTHONPATH + +python3 sbus_to_fpga_soc.py --build --csr-csv csr.csv --csr-json csr.json --variant=ztex2.13a --version=V1.2 --sys-clk-freq 100e6 --trng --usb --sdram --sdcard --i2c --flash ## --stat + +##python3 sbus_to_fpga_soc.py --build --csr-csv csr.csv --csr-json csr.json --variant=ztex2.13a --version=V1.2 --sys-clk-freq 100e6 --sdram --jareth + +#python3 sbus_to_fpga_soc.py --build --csr-csv csr.csv --csr-json csr.json --variant=ztex2.13a --version=V1.2 --sys-clk-freq 100e6 --sdram --goblin --cg3-res 1920x1080@60Hz --jareth --sdcard ## --usb + +##python3 sbus_to_fpga_soc.py --build --csr-csv csr.csv --csr-json csr.json --variant=ztex2.13a --version=V1.2 --sys-clk-freq 100e6 --sdram --sdcard --cg3 --cg3-res 1280x1024@60Hz --jareth + +##python3 sbus_to_fpga_soc.py --build --csr-csv csr.csv --csr-json csr.json --variant=ztex2.13a --version=V1.2 --sys-clk-freq 100e6 --usb --sdram --cg6 --cg3-res 1280x1024@60Hz ## --sdcard + +) 2>&1 | tee build_V1_2.log +# --trng +# --sdram +# --sdcard +# --usb +# --cg3 --cg3-res 1152x900@76Hz +# --cg6 --cg3-res 1280x1024@60Hz + +grep -A10 'Design Timing Summary' build/ztex213_sbus_V1_2/gateware/ztex213_sbus_V1_2_timing.rpt diff --git a/sbus-to-ztex-gateware-migen/do_V1.3 b/sbus-to-ztex-gateware-migen/do_V1.3 new file mode 100644 index 0000000..f5873e0 --- /dev/null +++ b/sbus-to-ztex-gateware-migen/do_V1.3 @@ -0,0 +1,16 @@ +( +source /opt/Xilinx/Vivado/2020.1/settings64.sh +export LD_LIBRARY_PATH=/opt/Xilinx/Vivado/2020.1/lib/lnx64.o/SuSE +export PYTHONPATH=deps/gateware:$PYTHONPATH + +python3 sbus_to_fpga_soc.py --build --csr-csv csr.csv --csr-json csr.json --variant=ztex2.13a --version=V1.3 --sys-clk-freq 100e6 --trng --usb --sdram --i2c --goblin --cg3-res 1920x1080@60Hz + +) 2>&1 | tee build_V1_3.log +# --trng +# --sdram +# --sdcard +# --usb +# --cg3 --cg3-res 1152x900@76Hz +# --cg6 --cg3-res 1280x1024@60Hz + +grep -A10 'Design Timing Summary' build/ztex213_sbus_V1_3/gateware/ztex213_sbus_V1_3_timing.rpt diff --git a/sbus-to-ztex-gateware-migen/forth_to_migen_rom.sh b/sbus-to-ztex-gateware-migen/forth_to_migen_rom.sh index 53e5142..8525b99 100755 --- a/sbus-to-ztex-gateware-migen/forth_to_migen_rom.sh +++ b/sbus-to-ztex-gateware-migen/forth_to_migen_rom.sh @@ -1,6 +1,6 @@ #!/bin/bash -for V in "V1_2"; do +V="V1_3" PFX=prom_${V} @@ -27,5 +27,3 @@ for V in "V1_2"; do hexdump -v -e '1/4 "%08x"' -e '"\n"' ${PFX}.fc | xxd -r -p > ${PFX}_flash_little.fc fi - -done diff --git a/sbus-to-ztex-gateware-migen/openfirmware b/sbus-to-ztex-gateware-migen/openfirmware new file mode 160000 index 0000000..d5cc657 --- /dev/null +++ b/sbus-to-ztex-gateware-migen/openfirmware @@ -0,0 +1 @@ +Subproject commit d5cc657ce81c0f7d1857b4687766b64d75a4145d diff --git a/sbus-to-ztex-gateware-migen/prom_V1_3.bth b/sbus-to-ztex-gateware-migen/prom_V1_3.bth new file mode 100644 index 0000000..775b43e --- /dev/null +++ b/sbus-to-ztex-gateware-migen/prom_V1_3.bth @@ -0,0 +1,13 @@ +purpose: Load file for SBusFPGA + +command: &builder &this + +build-now + +\ silent on + +begin-tokenizing prom_V1_3.fc + +fload prom_V1_3.fth + +end-tokenizing diff --git a/sbus-to-ztex-gateware-migen/prom_V1_3.fth b/sbus-to-ztex-gateware-migen/prom_V1_3.fth new file mode 100644 index 0000000..3d92d6f --- /dev/null +++ b/sbus-to-ztex-gateware-migen/prom_V1_3.fth @@ -0,0 +1,275 @@ +fcode-version2 +fload prom_csr_V1_3.fth +" RDOL,neorv32trng" device-name +my-address sfca_trng + my-space h# 8 reg +h# 7f encode-int " slave-burst-sizes" property +h# 7f encode-int " burst-sizes" property +headers +-1 instance value trng-virt +my-address constant my-sbus-address +my-space constant my-sbus-space +: map-in ( adr space size -- virt ) " map-in" $call-parent ; +: map-out ( virt size -- ) " map-out" $call-parent ; +: map-in-trng ( -- ) my-sbus-address sfca_trng + my-sbus-space h# 8 map-in to trng-virt ; +: map-out-trng ( -- ) trng-virt h# 8 map-out ; +: disabletrng! ( -- ) + map-in-trng + 1 trng-virt l! ( pattern virt -- ) + map-out-trng +; +disabletrng! +finish-device +new-device +" generic-ohci" device-name +sbusfpga_irq_usb_host encode-int " interrupts" property +my-address sfra_usb_host_ctrl + my-space h# 1000 reg +h# 7f encode-int " slave-burst-sizes" property +h# 7f encode-int " burst-sizes" property +headers +-1 instance value usb_host_ctrl-virt +my-address constant my-sbus-address +my-space constant my-sbus-space +: map-in ( adr space size -- virt ) " map-in" $call-parent ; +: map-out ( virt size -- ) " map-out" $call-parent ; +: map-in-usb_host_ctrl ( -- ) my-sbus-address sfra_usb_host_ctrl + my-sbus-space h# 1000 map-in to usb_host_ctrl-virt ; +: map-out-usb_host_ctrl ( -- ) usb_host_ctrl-virt h# 1000 map-out ; +: my-reset! ( -- ) + map-in-usb_host_ctrl + 00000001 usb_host_ctrl-virt h# 4 + l! ( -- ) ( reset the HC ) + 00000000 usb_host_ctrl-virt h# 18 + l! ( -- ) ( reset HCCA & friends ) + 00000000 usb_host_ctrl-virt h# 1c + l! ( -- ) + 00000000 usb_host_ctrl-virt h# 20 + l! ( -- ) + 00000000 usb_host_ctrl-virt h# 24 + l! ( -- ) + 00000000 usb_host_ctrl-virt h# 28 + l! ( -- ) + 00000000 usb_host_ctrl-virt h# 2c + l! ( -- ) + 00000000 usb_host_ctrl-virt h# 30 + l! ( -- ) + map-out-usb_host_ctrl +; +my-reset! +finish-device +new-device +" RDOL,sdram" device-name +my-address sfca_ddrphy + my-space encode-phys h# 1000 encode-int encode+ +my-address sfca_sdram + my-space encode-phys encode+ h# 1000 encode-int encode+ +my-address sfca_exchange_with_mem + my-space encode-phys encode+ h# 1000 encode-int encode+ +" reg" property +h# 7f encode-int " slave-burst-sizes" property +h# 7f encode-int " burst-sizes" property +headers +-1 instance value ddrphy-virt +-1 instance value sdram-virt +-1 instance value exchange_with_mem-virt +my-address constant my-sbus-address +my-space constant my-sbus-space +: map-in ( adr space size -- virt ) " map-in" $call-parent ; +: map-out ( virt size -- ) " map-out" $call-parent ; +: map-in-mregs ( -- ) +my-sbus-address sfca_ddrphy + my-sbus-space h# 1000 map-in to ddrphy-virt +my-sbus-address sfca_sdram + my-sbus-space h# 1000 map-in to sdram-virt +my-sbus-address sfca_exchange_with_mem + my-sbus-space h# 1000 map-in to exchange_with_mem-virt +; +: map-out-mregs ( -- ) +ddrphy-virt h# 1000 map-out +sdram-virt h# 1000 map-out +exchange_with_mem-virt h# 1000 map-out +; +sbusfpga_irq_sdram encode-int " interrupts" property +h# 19 constant m0_delay +h# 19 constant m1_delay +h# 1 constant m0_bitslip +h# 1 constant m1_bitslip +fload sdram_init.fth +init! +finish-device +new-device +" oc,i2c" device-name +my-address sfca_i2c + my-space h# 40 reg +h# 7f encode-int " slave-burst-sizes" property +h# 7f encode-int " burst-sizes" property +headers +-1 instance value i2c-virt +my-address constant my-sbus-address +my-space constant my-sbus-space +: map-in ( adr space size -- virt ) " map-in" $call-parent ; +: map-out ( virt size -- ) " map-out" $call-parent ; +: map-in-i2c ( -- ) my-sbus-address sfca_i2c + my-sbus-space h# 40 map-in to i2c-virt ; +: map-out-i2c ( -- ) i2c-virt h# 40 map-out ; +h# 5f5e100 encode-int " clock-speed" property +h# 61a80 encode-int " bus-speed" property + new-device + " AT30TS74-UFM10" encode-string " name" property + " lm75" encode-string " compatible" property + h# 48 encode-int " addr" property + finish-device +finish-device +new-device +h# -1 constant sfra_jareth-regs +h# 0 constant goblin-has-jareth +: openbios-video-width + h# 780 +; + +: openbios-video-height + h# 438 +; + +: depth-bits + h# 8 +; + +: line-bytes + h# 780 +; + +sfra_goblin_bt constant goblin-off-dac +h# 200 constant /goblin-off-dac + +h# 1000000 constant goblin-off-fb +h# 1000000 constant /goblin-off-fb +\ only map the first two MiB +h# 200000 constant /goblin-mapped-fb +h# 8f000000 constant goblin-internal-fb + +: goblin-reg + my-address sfra_goblin_bt + my-space encode-phys /goblin-off-dac encode-int encode+ + my-address goblin-off-fb + my-space encode-phys encode+ /goblin-off-fb encode-int encode+ + h# 1 goblin-has-jareth = if + my-address sfra_goblin_accel + my-space encode-phys encode+ h# 1000 encode-int encode+ + then + " reg" property +; + +: do-map-in ( offset size -- virt ) + >r my-space r> " map-in" $call-parent +; + +: do-map-out ( virt size ) + " map-out" $call-parent +; + +\ +\ DAC +\ + +-1 value goblin-dac +-1 value fb-addr + +: dac! ( data reg# -- ) + goblin-dac + l! +; + +external + +: color! ( r g b c# -- ) + h# 14 dac! ( r g b ) + swap rot ( b g r ) + h# 18 dac! ( b g ) + h# 18 dac! ( b ) + h# 18 dac! ( ) +; + +headerless + +\ +\ Mapping +\ + +: dac-map + goblin-off-dac /goblin-off-dac do-map-in to goblin-dac +; + +: dac-unmap + goblin-dac /goblin-off-dac do-map-out + -1 to goblin-dac +; + +: fb-map + goblin-off-fb /goblin-mapped-fb do-map-in to fb-addr +; + +: fb-unmap + goblin-off-fb /goblin-mapped-fb do-map-out + -1 to fb-addr +; + +: map-regs + dac-map +; + +: unmap-regs + dac-unmap +; + +\ +\ Installation +\ + +" goblin" device-name +" display" device-type +" RDOL,sbusfpga" model + +: goblin-driver-install ( -- ) + goblin-dac -1 = if + map-regs + + fb-map + + \ Initial palette taken from Sun's "Writing FCode Programs" + h# ff h# ff h# ff h# 0 color! \ Background white + h# 0 h# 0 h# 0 h# ff color! \ Foreground black + \ h# 64 h# 41 h# b4 h# 1 color! \ SUN-blue logo + h# b4 h# 41 h# 64 h# 1 color! \ SUN-blue logo + + fb-addr to frame-buffer-adr + default-font set-font + + frame-buffer-adr encode-int " address" property \ CHECKME + + h# 1 h# 8 dac! \ enable + + openbios-video-width openbios-video-height over char-width / over char-height / + fb8-install + then +; + +: goblin-driver-remove ( -- ) + goblin-dac -1 <> if + unmap-regs + fb-unmap + -1 to frame-buffer-adr + " address" delete-property + then +; + +: goblin-driver-init + + goblin-reg + + openbios-video-height encode-int " height" property + openbios-video-width encode-int " width" property + depth-bits encode-int " depth" property + line-bytes encode-int " linebytes" property + + h# 39 encode-int 0 encode-int encode+ " intr" property + + " RDOL" encode-string " manufacturer" property + " ISO8859-1" encode-string " character-set" property + h# c encode-int " cursorshift" property + /goblin-mapped-fb h# 14 >> encode-int " vmmapped" property + /goblin-off-fb h# 14 >> encode-int " vmsize" property + goblin-internal-fb encode-int " goblin-internal-fb" property + goblin-has-jareth encode-int " goblin-has-jareth" property + + map-regs + h# 0 h# 4 dac! \ disable irq + h# 0 h# 8 dac! \ turn off videoctrl + unmap-regs + + ['] goblin-driver-install is-install + ['] goblin-driver-remove is-remove +; + +goblin-driver-init + + +end0 diff --git a/sbus-to-ztex-gateware-migen/sbus_to_fpga_soc.py b/sbus-to-ztex-gateware-migen/sbus_to_fpga_soc.py index fd46c29..2fc5346 100644 --- a/sbus-to-ztex-gateware-migen/sbus_to_fpga_soc.py +++ b/sbus-to-ztex-gateware-migen/sbus_to_fpga_soc.py @@ -72,7 +72,11 @@ class _CRG(Module): self.clock_domains.cd_clk200 = ClockDomain() # 200 MHz (gated) for curve25519engine -> rf_clk self.clock_domains.cd_clk100_gated = ClockDomain() # 100 MHz (gated) for curve25519engine -> mul_clk # aways created, along sysclk if (framebuffer): - self.clock_domains.cd_vga = ClockDomain(reset_less=True) + if (version == "V1.2"): + self.clock_domains.cd_vga = ClockDomain(reset_less=True) + elif (version == "V1.3"): + self.clock_domains.cd_hdmi = ClockDomain() + self.clock_domains.cd_hdmi5x = ClockDomain() # # # clk48 = platform.request("clk48") @@ -422,7 +426,7 @@ class SBusFPGA(SoCCore): self.add_spi_flash(mode="4x", clk_freq = sys_clk_freq/4, # Fixme; PHY freq ? module=W25Q128JV(Codes.READ_1_1_4), - region_size = 0x00040000, + region_size = 0x00040000, # 256 KiB with_mmap=True, with_master=False) # DDR3 @@ -699,9 +703,9 @@ def main(): if (fbcount > 1): print(" ***** ERROR ***** : can't have more than one of BW2, CG3, CG6 and Goblin\n") assert(False) - if ((fbcount > 0) and args.i2c and version == "V1.2"): + if ((fbcount > 0) and args.i2c and args.version == "V1.2"): print(" ***** ERROR ***** : Framebuffers and I2C are incompatible in V1.2\n") - if ((fbcount > 0) and args.flash and version == "V1.2"): + if ((fbcount > 0) and args.flash and args.version == "V1.2"): print(" ***** ERROR ***** : Framebuffers and Flash are incompatible in V1.2\n") soc = SBusFPGA(**soc_core_argdict(args), diff --git a/sbus-to-ztex-gateware-migen/ztex213_sbus.py b/sbus-to-ztex-gateware-migen/ztex213_sbus.py index 8dfa79d..a65c41a 100644 --- a/sbus-to-ztex-gateware-migen/ztex213_sbus.py +++ b/sbus-to-ztex-gateware-migen/ztex213_sbus.py @@ -202,9 +202,9 @@ _sbus_sbus_v1_2 = [ _sbus_sbus_v1_3 = [ ("SBUS_3V3_CLK", 0, Pins("H16"), IOStandard("lvttl")), ("SBUS_3V3_ASs", 0, Pins("J15"), IOStandard("lvttl")), - ("SBUS_3V3_BGs", 0, Pins("K15"), IOStandard("lvttl")), # moved + ("SBUS_3V3_BGs", 0, Pins("K15"), IOStandard("lvttl")), ("SBUS_3V3_BRs", 0, Pins("K16"), IOStandard("lvttl")), - ("SBUS_3V3_ERRs", 0, Pins("C15"), IOStandard("lvttl")), # moved + ("SBUS_3V3_ERRs", 0, Pins("C15"), IOStandard("lvttl")), ("SBUS_3V3_RSTs", 0, Pins("L1"), IOStandard("lvttl")), ("SBUS_3V3_SELs", 0, Pins("H15"), IOStandard("lvttl")), #("SBUS_3V3_INT1s", 0, Pins(""), IOStandard("lvttl")), # removed @@ -217,10 +217,10 @@ _sbus_sbus_v1_3 = [ ("SBUS_3V3_PPRD", 0, Pins("E15"), IOStandard("lvttl")), ("SBUS_OE", 0, Pins("K13"), IOStandard("lvttl")), ("SBUS_3V3_ACKs", 0, Pins("D14 L4 A14 "), IOStandard("lvttl")), - ("SBUS_3V3_SIZ", 0, Pins("E16 M6 L6 "), IOStandard("lvttl")), # 0 moved + ("SBUS_3V3_SIZ", 0, Pins("E16 M6 L6 "), IOStandard("lvttl")), ("SBUS_3V3_D", 0, Pins("J13 R8 J14 H14 R7 H17 G14 T6 " "G17 G16 R6 G18 R5 V1 F18 F16 " - "V2 E18 F15 U1 D18 E17 U2 G16 " + "V2 E18 F15 U1 D18 E17 U2 G13 " "D17 T3 K6 R3 N6 P5 F13 F14 "), IOStandard("lvttl")), ("SBUS_3V3_PA", 0, Pins("C16 C17 A18 L5 N4 B18 M4 D15 " "B16 B17 C14 M3 D13 M2 K5 D12 " @@ -244,7 +244,7 @@ _connectors_v1_2 = [ ("P1", "T8 P3 T1 R1 U6 P4 U4 T3"), # swapped line? & columns? # PMOD- 11 9 7 5 12 10 8 6 ] -_connectors_v1_2 = [ +_connectors_v1_3 = [ ("P1", "P3 T1 R2 N1 P4 R1 P2 N2"), # swapped line? & columns? # PMOD- 11 9 7 5 12 10 8 6 ]