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mirror of synced 2026-01-11 23:42:59 +00:00

Merge branch 'V1_3' of github.com:rdolbeau/SBusFPGA into V1_3

This commit is contained in:
Romain Dolbeau 2023-10-07 12:45:33 +02:00
commit f4c5c0e5b7

View File

@ -575,8 +575,6 @@ F 3 "" H 3800 5400 50 0001 C CNN
$EndComp
Text GLabel 9900 3050 2 50 Input Italic 0
CLK_54_000
Wire Wire Line
1600 1250 550 1250
Wire Wire Line
1600 1250 4100 1250
Text GLabel 1600 1550 0 60 Input ~ 0
@ -639,4 +637,6 @@ Text GLabel 9900 3650 2 50 Input ~ 0
PMOD-78+
Text GLabel 9900 3450 2 50 Input ~ 0
PMOD-910+
Wire Wire Line
500 1250 1600 1250
$EndSCHEMATC