Merge branch 'V1_3' of github.com:rdolbeau/SBusFPGA into V1_3
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commit
f4c5c0e5b7
@ -575,8 +575,6 @@ F 3 "" H 3800 5400 50 0001 C CNN
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$EndComp
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Text GLabel 9900 3050 2 50 Input Italic 0
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CLK_54_000
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Wire Wire Line
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1600 1250 550 1250
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Wire Wire Line
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1600 1250 4100 1250
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Text GLabel 1600 1550 0 60 Input ~ 0
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@ -639,4 +637,6 @@ Text GLabel 9900 3650 2 50 Input ~ 0
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PMOD-78+
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Text GLabel 9900 3450 2 50 Input ~ 0
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PMOD-910+
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Wire Wire Line
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500 1250 1600 1250
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$EndSCHEMATC
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