diff --git a/DeclROM/NuBusFPGADrvr_Ctrl.c b/DeclROM/NuBusFPGADrvr_Ctrl.c
index 1d0a75b..8f1e4ae 100644
--- a/DeclROM/NuBusFPGADrvr_Ctrl.c
+++ b/DeclROM/NuBusFPGADrvr_Ctrl.c
@@ -135,7 +135,7 @@ OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
 				  /* dStore->shadowClut[idx*3+1] = (*vdentry)->csTable[i].rgb.green; */
 				  /* dStore->shadowClut[idx*3+2] = (*vdentry)->csTable[i].rgb.blue; */
 				  
-				  write_reg(dce, GOBOFB_LUT_ADDR, idx);
+				  write_reg(dce, GOBOFB_LUT_ADDR, (idx & 0xFF));
 				  write_reg(dce, GOBOFB_LUT, dStore->gamma.gFormulaData[0][(*vdentry)->csTable[i].rgb.red>>8 & 0xFF]);
 				  write_reg(dce, GOBOFB_LUT, dStore->gamma.gFormulaData[1][(*vdentry)->csTable[i].rgb.green>>8 & 0xFF]);
 				  write_reg(dce, GOBOFB_LUT, dStore->gamma.gFormulaData[2][(*vdentry)->csTable[i].rgb.blue>>8 & 0xFF]);
@@ -373,6 +373,9 @@ OSErr cNuBusFPGACtl(CntrlParamPtr pb, /* DCtlPtr */ AuxDCEPtr dce)
 #elif defined(IISIFPGA)
 #include "../../iisifpga_csr_goblin.h"
 #include "../../iisifpga_csr_crg.h"
+#elif defined(LC32FPGA)
+#include "../../lc32fpga_csr_goblin.h"
+#include "../../lc32fpga_csr_crg.h"
 #elif defined(QUADRAFPGA)
 #include "../../quadrafpga_csr_crg.h"
 #include "../../quadrafpga_csr_goblin.h"
diff --git a/DeclROM/NuBusFPGAPrimaryInit_RamInit.c b/DeclROM/NuBusFPGAPrimaryInit_RamInit.c
index 265483c..ca8dbe9 100644
--- a/DeclROM/NuBusFPGAPrimaryInit_RamInit.c
+++ b/DeclROM/NuBusFPGAPrimaryInit_RamInit.c
@@ -8,6 +8,9 @@
 #elif defined(IISIFPGA)
 #include "../../iisifpga_csr_ddrphy.h"
 #include "../../iisifpga_csr_sdram.h"
+#elif defined(LC32FPGA)
+#include "../../lc32fpga_csr_ddrphy.h"
+#include "../../lc32fpga_csr_sdram.h"
 #elif defined(QUADRAFPGA)
 #include "../../quadrafpga_csr_ddrphy.h"
 #include "../../quadrafpga_csr_sdram.h"
diff --git a/DeclROM/NuBusFPGASDCardDrvr.h b/DeclROM/NuBusFPGASDCardDrvr.h
index 20d22cb..4805417 100644
--- a/DeclROM/NuBusFPGASDCardDrvr.h
+++ b/DeclROM/NuBusFPGASDCardDrvr.h
@@ -39,6 +39,13 @@ struct SDCardContext {
 #include "../../iisifpga_csr_sdmem2block.h"
 #include "../../iisifpga_csr_sdphy.h"
 //#include "../../iisifpga_csr_exchange_with_sd.h"
+#elif defined(LC32FPGA)
+#include "../../lc32fpga_csr_sdblock2mem.h"
+#include "../../lc32fpga_csr_sdcore.h"
+//#include "../../lc32fpga_csr_sdirq.h"
+#include "../../lc32fpga_csr_sdmem2block.h"
+#include "../../lc32fpga_csr_sdphy.h"
+//#include "../../lc32fpga_csr_exchange_with_sd.h"
 #elif defined(QUADRAFPGA)
 #include "../../quadrafpga_csr_sdblock2mem.h"
 #include "../../quadrafpga_csr_sdcore.h"
diff --git a/DeclROM/vid_decl_rom.s b/DeclROM/vid_decl_rom.s
index 2c4ec6e..3206945 100644
--- a/DeclROM/vid_decl_rom.s
+++ b/DeclROM/vid_decl_rom.s
@@ -42,7 +42,6 @@ _BoardName:
 	ALIGN 2
 
 /*  _VidICON ; optional icon, not needed */
-/*  _sVidNameDir ; optional name(s), not needed */
 
 	.section .text.primary_init
 /* _sPInitRec: */
@@ -80,8 +79,8 @@ _VendorId:
             .string        "Romain Dolbeau\0"        /*  vendor ID */
 _SerialNum:	
             .string        "0000000001\0"        /*  serial number */
-_RevLevel:	
-            .string        "NuBusFPGA V1.0\0"        /*  revision level */
+_RevLevel:
+	.include "../../board.inc"
 _PartNum:	
             .string        "Part Number\0"           /*  part number */
 _Date: