diff --git a/pymlac/Makefile b/pymlac/Makefile index b7cdf67..6004cbb 100644 --- a/pymlac/Makefile +++ b/pymlac/Makefile @@ -18,4 +18,4 @@ lst: $(TESTS) ../iasm/iasm -l $*.lst $< clean: - rm -Rf *.pyc *~ *.out test_*.ptp *.lst test_*.trace _#ASM#_.* + rm -Rf *.pyc *~ *.out test_*.ptp *.lst test_*.trace _#*#_.* CPU.test.trace.* diff --git a/pymlac/Memory.py b/pymlac/Memory.py index de19061..a2c53d0 100644 --- a/pymlac/Memory.py +++ b/pymlac/Memory.py @@ -90,15 +90,17 @@ class Memory(object): memory = [] using_rom = True boot_rom = None + rom_protected = False - def __init__(self, boot_rom=ROM_PTR, core=None): + def __init__(self, boot_rom=None, core=None): """ """ self.corefile = core self.boot_rom = boot_rom - self.memory = [] + self.memory = [0]*MEMORY_SIZE self.using_rom = boot_rom in [ROM_PTR, ROM_TTY] + self.rom_protected = self.using_rom if self.corefile: try: @@ -116,9 +118,9 @@ class Memory(object): If using ROM, that is unchanged. """ - for i in range(MEMORY_SIZE): - self.memory.append(0) - self.set_ROM(self.boot_rom) + for address in range(MEMORY_SIZE): + if not self.rom_protected or not (self.ROM_START <= address <= self.ROM_END): + self.memory[address] = 0 def loadcore(self, filename=None): """Load core from a file. Read 16 bit values as big-endian.""" @@ -136,10 +138,6 @@ class Memory(object): low = fd.read(1) val = (ord(high) << 8) + ord(low) -# high = struct.unpack('B', high)[0] -# low = struct.unpack('B', fd.read(1))[0] -# val = (high << 8) + low - self.memory.append(val) except struct.error: raise RuntimeError('Core file %s is corrupt!' % filename) @@ -155,21 +153,19 @@ class Memory(object): high = val >> 8 low = val & 0xff -# data = struct.pack('B', high) -# fd.write(data) -# data = struct.pack('B', low) -# fd.write(data) - fd.write(chr(high)) fd.write(chr(low)) def set_PTR_ROM(self): """Set addresses 040 to 077 as PTR ROM.""" + save_flag = self.rom_protected + self.rom_protected = False i = self.ROM_START for ptr_value in self.PTR_ROM_IMAGE: self.memory[i] = ptr_value i += 1 + self.rom_protected = save_flag def set_TTY_ROM(self): """Set addresses 040 to 077 as TTY ROM.""" @@ -182,24 +178,16 @@ class Memory(object): def set_ROM(self, romtype=None): """Set ROM to either PTR or TTY, or disable ROM.""" + save_flag = self.rom_protected + self.rom_protected = False if romtype == 'ptr': - self.using_rom = True - i = self.ROM_START - for ptr_value in self.PTR_ROM_IMAGE: - self.memory[i] = ptr_value - i += 1 + self.set_PTR_ROM() + self.rom_protected = True elif romtype == 'tty': - self.using_rom = True - i = self.ROM_START - for ptr_value in self.TTY_ROM_IMAGE: - self.memory[i] = ptr_value - i += 1 + self.set_TTY_ROM() + self.rom_protected = True else: - self.using_rom = False - i = self.ROM_START - for _ in self.PTR_ROM_IMAGE: - self.memory[i] = 0 - i += 1 + self.rom_protected = save_flag def fetch(self, address, indirect): """Get a value from a memory address. @@ -261,7 +249,8 @@ class Memory(object): if indirect: address = self.memory[address] & ADDRMASK - if self.using_rom and self.ROM_START <= address <= self.ROM_END: + if self.rom_protected and self.ROM_START <= address <= self.ROM_END: + print('Attempt to write to ROM address %07o' % address) Trace.comment('Attempt to write to ROM address %07o' % address) return diff --git a/pymlac/Trace.py b/pymlac/Trace.py index dbdbd7a..d2351c2 100644 --- a/pymlac/Trace.py +++ b/pymlac/Trace.py @@ -21,7 +21,7 @@ def init(filename, maincpu, displaycpu): global tracing, tracefile, cpu, dcpu tracing = True - tracefile = open(filename, 'w') + tracefile = open(filename, 'wa') trace('%s trace\n%s\n' % (PYMLAC_VERSION, '-'*60)) tracing = False comment = None @@ -30,7 +30,7 @@ def init(filename, maincpu, displaycpu): dcpu = displaycpu def close(): - import tracing, tracefile + global tracing, tracefile tracefile.close() tracing = False diff --git a/pymlac/test_CPU.py b/pymlac/test_CPU.py index c435268..f31d042 100644 --- a/pymlac/test_CPU.py +++ b/pymlac/test_CPU.py @@ -147,7 +147,7 @@ class TestCPU(object): self.memory.put(value, addr, False) log.debug('setmem: After, Memory at %07o is %07o' % (addr, self.memory.fetch(addr, False))) - def allmem(self, value): + def allmem(self, value, ignore=None): """Set all of memory to a value. Remember value to check later. @@ -183,6 +183,8 @@ class TestCPU(object): % (mem, value, self.mem_values[mem])) else: if value != self.mem_all_value: + print('mem: %s, value: %s, self.mem_all_value: %s' + % (str(type(mem)), str(type(value)), str(type(self.mem_all_value)))) result.append('Memory at %07o changed, is %07o, should be %07o' % (mem, value, self.mem_all_value)) @@ -317,8 +319,10 @@ class TestCPU(object): # set globals self.reg_values = {} self.mem_values = {} - self.reg_all_value = {} - self.mem_all_value = {} + #self.reg_all_value = {} + #self.mem_all_value = {} + self.reg_all_value = 0 + self.mem_all_value = 0 result = [] @@ -327,10 +331,10 @@ class TestCPU(object): self.cpu.running = True self.display_state = False - Trace.init(filename+'.trace', self.cpu, None) + trace_filename = filename + '.trace' + Trace.init(trace_filename, self.cpu, None) - # clear memory and registers to 0 first - self.allmem(0) + # clear registers to 0 first self.allreg(0) # interpret the test instructions