diff --git a/pymlac/DisplayCPU.py b/pymlac/DisplayCPU.py index 773f3fd..7182de6 100644 --- a/pymlac/DisplayCPU.py +++ b/pymlac/DisplayCPU.py @@ -76,14 +76,14 @@ class DisplayCPU(object): self.display.draw(prevDX, prevDY, self.DX, self.DY) else: # micro instructions if byte & 0x40: - self.Mode = self.self.MODE_NORMAL + self.Mode = self.MODE_NORMAL if byte & 0x20: # DRJM if self.DRSindex <= 0: Trace.comment('\nDRS stack underflow at display address %6.6o' % (self.DPC - 1)) self.illegal() self.DRSindex -= 1 - self.DPC = DRS[DRSindex] + self.DPC = self.DRS[self.DRSindex] if byte & 0x10: self.DX += 0x08 if byte & 0x08: @@ -98,7 +98,8 @@ class DisplayCPU(object): Trace.dtrace('') return 0 - instruction = self.memory.get(self.DPC, 0) +# instruction = self.memory.get(self.DPC, 0) + instruction = self.memory.fetch(self.DPC, False) self.DPC = MASK_MEM(self.DPC + 1) if self.Mode == self.MODE_DEIM: diff --git a/pymlac/Memory.py b/pymlac/Memory.py index 46afa32..5e9a0df 100644 --- a/pymlac/Memory.py +++ b/pymlac/Memory.py @@ -122,37 +122,45 @@ class Memory(object): def loadcore(self, filename=None): """Load core from a file. Read 16 bit values as big-endian.""" - if filename is None: + if not filename: filename = self.corefile - if filename: - self.memory = [] - try: - with open(filename, 'rb') as fd: - while True: - data = fd.read(1) - if data == '': - break - high = struct.unpack('B', data)[0] - low = struct.unpack('B', fd.read(1))[0] - val = (high << 8) + low - self.memory.append(val) - except struct.error: - raise RuntimeError('Core file %s is corrupt!' % filename) + + self.memory = [] + try: + with open(filename, 'rb') as fd: + while True: + high = fd.read(1) + if high == '': + break + low = fd.read(1) + val = (ord(high) << 8) + ord(low) + +# high = struct.unpack('B', high)[0] +# low = struct.unpack('B', fd.read(1))[0] +# val = (high << 8) + low + + self.memory.append(val) + except struct.error: + raise RuntimeError('Core file %s is corrupt!' % filename) def savecore(self, filename=None): - """Save core in a file. Write 16 bit values as big-endian.""" + """Save core in a file. Write 16 bit values big-endian.""" - if filename is None: + if not filename: filename = self.corefile - if filename: - with open(filename, 'wb') as fd: - for val in self.memory: - high = val >> 8 - low = val & 0xff - data = struct.pack('B', high) - fd.write(data) - data = struct.pack('B', low) - fd.write(data) + + with open(filename, 'wb') as fd: + for val in self.memory: + high = val >> 8 + low = val & 0xff + +# data = struct.pack('B', high) +# fd.write(data) +# data = struct.pack('B', low) +# fd.write(data) + + fd.write(chr(high)) + fd.write(chr(low)) def set_PTR_ROM(self): """Set addresses 040 to 077 as PTR ROM.""" diff --git a/pymlac/pymlac b/pymlac/pymlac index 9d37935..0c0f7cc 100755 --- a/pymlac/pymlac +++ b/pymlac/pymlac @@ -534,7 +534,10 @@ class PymlacFrame(wx.Frame): instruction_cycles += self.cpu.execute_one_instruction() - Trace.itraceend(self.display_cpu.ison()) + if instruction_cycles > 0: + Trace.itraceend(self.display_cpu.ison()) + else: + self.__tick_all(instruction_cycles)