mirror of
https://github.com/rzzzwilson/pymlac.git
synced 2025-06-10 09:32:41 +00:00
677 lines
20 KiB
Python
677 lines
20 KiB
Python
#!/usr/bin/env python
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# -*- coding: utf-8 -*-
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"""
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Test pymlac CPU opcodes DIRECTLY.
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Usage: test_CPU.py [<options>] <filename>
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where <filename> is a file of test instructions and
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<options> is one or more of
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-h prints this help and stops
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"""
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import time
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# We implement a small interpreter to test the CPU.
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# The DSL is documented here: [github.com/rzzzwilson/pymlac].
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import sys
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import os
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from Globals import *
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import MainCPU
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import Memory
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import PtrPtp
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import Trace
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import log
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log = log.Log('test_CPU.log', log.Log.DEBUG)
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class TestCPU(object):
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# temporary assembler file and listfile prefix
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AsmFilename = '_#ASM#_'
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ProgressChar = '|\\-/'
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ProgressCount = 0
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def __init__(self):
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"""Initialize the test."""
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pass
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def show_progress(self):
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"""Show progress to stdout. A spinning line."""
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print '%s\r' % self.ProgressChar[self.ProgressCount],
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self.ProgressCount += 1
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if self.ProgressCount >= len(self.ProgressChar):
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self.ProgressCount = 0
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sys.stdout.flush()
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def list2int(self, values):
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"""Convert a string of multiple values to a list of ints.
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values a string like: '123;4;-2'
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(could be just '5')
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Returns a list of integers, for example: [123, 4, -2]
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"""
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values = values.split(';')
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result = []
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for value in values:
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result.append(self.str2int(value))
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return result
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def str2int(self, string):
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"""Convert string to numeric value.
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string numeric string (decimal or octal)
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Returns the numeric value.
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"""
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try:
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if string[0] == '0':
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value = int(string, base=8)
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else:
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value = int(string)
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except:
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return None
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return value
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def assemble(self, addr, opcodes):
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"""Assemble a set of instructions, return opcode values.
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addr address to assemble at
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opcodes list of ASM lines to assemble
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Returns a list of integer opcodes.
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"""
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# split possible multiple instructions
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opcodes = opcodes.split('|')
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# create ASM file with instruction
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with open(self.AsmFilename+'.asm', 'wb') as fd:
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fd.write('\torg\t%07o\n' % addr)
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for line in opcodes:
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fd.write('\t%s\n' % line)
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fd.write('\tend\n')
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# now assemble file
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cmd = ('../iasm/iasm -l %s.lst %s.asm'
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% (self.AsmFilename, self.AsmFilename))
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res = os.system(cmd)
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# read the listing file to get assembled opcode (second line)
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with open(self.AsmFilename+'.lst', 'rb') as fd:
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lines = fd.readlines()
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result = []
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for line in lines[1:-1]:
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(opcode, _) = line.split(None, 1)
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result.append(int(opcode, base=8))
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return result
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# Here we implement the DSL primitives. They all take two parameters which are
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# the DSL field1 and field2 values (lowercase strings). If one or both are
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# missing the parameter is None.
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#
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# setreg <name> <value>
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# setmem <address> <value>
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# allreg <value>
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# allmem <value>
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# bootrom <type>
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# romwrite <bool>
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# run [<number>]
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# rununtil <address>
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# checkcycles <number>
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# checkreg <name> <value>
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# checkmem <addr> <value>
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# checkcpu <state>
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# checkdcpu <state>
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# mount <device> <filename>
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# dismount <device>
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# checkfile <file1> <file2>
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def setreg(self, name, value):
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"""Set register to a value.
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Remember value to check later.
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"""
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value = self.str2int(value)
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self.reg_values[name] = value
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if name == 'ac':
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self.cpu.AC = value
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elif name == 'l':
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self.cpu.L = value & 1
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elif name == 'pc':
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self.cpu.PC = value
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elif name == 'ds':
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self.cpu.DS = value
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else:
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raise Exception('setreg: bad register name: %s' % name)
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def setmem(self, addr, values):
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"""Set memory location to a value.
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addr address of memory location to set
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values value to store at 'addr'
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"""
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addr = self.str2int(addr)
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# check if we must assemble values
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if values[0] == '[':
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# assemble one or more instructions
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values = self.assemble(addr, values[1:-1])
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else:
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values = self.list2int(values)
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for v in values:
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self.mem_values[addr] = v
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self.memory.put(v, addr, False)
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addr += 1
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def allreg(self, value, ignore):
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"""Set all registers to a value."""
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new_value = self.str2int(value)
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if new_value is None:
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return 'allreg: bad value: %s' % str(value)
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self.reg_all_value = new_value
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self.cpu.AC = new_value
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self.cpu.L = new_value & 1
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self.cpu.PC = new_value
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self.cpu.DS = new_value
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def allmem(self, value, ignore):
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"""Set all of memory to a value.
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Remember value to check later.
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"""
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new_value = self.str2int(value)
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if new_value is None:
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return 'allmem: bad value: %s' % str(value)
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self.mem_all_value = new_value
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for mem in range(MEMORY_SIZE):
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self.memory.put(new_value, mem, False)
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def bootrom(loader_type, ignore):
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"""Set bootloader memory range to appropriate bootloader code.
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loader_type either 'ptr' or 'tty'
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"""
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if loader_type not in ['ptr', 'tty']:
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return 'bootrom: invalid bootloader type: %s' % loader_type
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self.memory.set_ROM(loader_type)
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def romwrite(writable, ignore):
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"""Set ROM to be writable or not."""
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self.memory.rom_protected = writable
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def run(self, num_instructions, ignore):
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"""Execute one or more instructions.
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num_instructions number of instructions to execute
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"""
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if num_instructions is None:
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# assume number of instructions is 1
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number = 1
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else:
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number = self.str2int(num_instructions)
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if number is None:
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return 'Invalid number of instructions: %s' % num_instructions
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self.used_cycles= 0
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for _ in range(number):
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cycles = self.cpu.execute_one_instruction()
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self.ptrptp.ptr_tick(cycles)
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self.ptrptp.ptp_tick(cycles)
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self.used_cycles += cycles
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def rununtil(self, address, ignore):
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"""Execute instructions until PC == address.
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address address at which to stop
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We allow PC to be stop address first instruction.
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We stop after that if PC == address.
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"""
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new_address = self.str2int(address)
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if new_address is None:
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return 'rununtil: invalid stop address: %s' % address
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self.used_cycles= 0
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while True:
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cycles = self.cpu.execute_one_instruction()
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self.ptrptp.ptr_tick(cycles)
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self.ptrptp.ptp_tick(cycles)
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self.used_cycles += cycles
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if self.cpu.PC == new_address:
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break
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def checkcycles(self, cycles, ignore):
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"""Check that opcode cycles used is correct.
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cycles expected number of cycles used
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"""
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num_cycles = self.str2int(cycles)
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if num_cycles is None:
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return 'checkcycles: invalid number of cycles: %s' % cycles
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if num_cycles != self.used_cycles:
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return ('Run used %d cycles, expected %d'
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% (self.used_cycles, num_cycles))
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def checkreg(self, reg, value):
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"""Check register is as it should be."""
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new_value = self.str2int(value)
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if new_value is None:
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return 'checkreg: bad value: %s' % str(value)
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if reg == 'ac':
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self.reg_values[reg] = self.cpu.AC
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if self.cpu.AC != new_value:
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return ('AC wrong, is %07o, should be %07o'
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% (self.cpu.AC, new_value))
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elif reg == 'l':
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self.reg_values[reg] = self.cpu.L
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if self.cpu.L != new_value:
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return ('L wrong, is %02o, should be %02o'
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% (self.cpu.L, new_value))
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elif reg == 'pc':
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self.reg_values[reg] = self.cpu.PC
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if self.cpu.PC != new_value:
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return ('PC wrong, is %07o, should be %07o'
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% (self.cpu.PC, new_value))
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elif reg == 'ds':
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self.reg_values[reg] = self.cpu.DS
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if self.cpu.DS != new_value:
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return ('DS wrong, is %07o, should be %07o'
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% (self.cpu.DS, new_value))
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else:
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return 'checkreg: bad register name: %s' % str(name)
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def checkmem(self, addr, value):
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"""Check a memory location is as it should be."""
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new_addr = self.str2int(addr)
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if new_addr is None:
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return 'checkmem: bad address: %s' % str(addr)
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new_value = self.str2int(value)
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if new_value is None:
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return 'checkmem: bad value: %s' % str(value)
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self.mem_values[new_addr] = new_value
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memvalue = self.memory.fetch(new_addr, False)
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if memvalue != new_value:
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return ('Memory wrong at address %07o, is %07o, should be %07o'
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% (new_addr, memvalue, new_value))
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def checkcpu(self, state, ignore):
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"""Check main CPU run state is as desired."""
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if state not in ('on', 'off'):
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return 'checkcpu: bad state: %s' % str(state)
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cpu_state = str(self.cpu.running).lower()
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if ((state == "on" and cpu_state != "true") or
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(state == "off" and cpu_state != "false")):
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return ('Main CPU run state is %s, should be %s'
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% (str(self.cpu.running), str(state)))
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def checkdcpu(self, state, ignore):
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"""Check display CPU run state is as desired."""
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if state not in ('on', 'off'):
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return 'checkdcpu: bad state: %s' % str(state)
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dcpu_state = str(self.display.running).lower()
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if ((state == "on" and dcpu_state != "true") or
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(state == "off" and dcpu_state != "false")):
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return ('Display CPU run state is %s, should be %s'
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% (str(self.cpu.running), str(state)))
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def mount(self, device, filename):
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"""Mount a file on a device.
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device name of device
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filename path to file to mount
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If the device is an input device, the file must exist.
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"""
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if device == 'ptr':
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if not os.path.exists(filename) or not os.path.isfile(filename):
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return "mount: '%s' doesn't exist or isn't a file" % filename
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self.ptrptp.ptr_mount(filename)
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elif device == 'ptp':
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self.ptrptp.ptp_mount(filename)
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else:
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return 'mount: bad device: %s' % device
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def dismount(self, device):
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"""Dismount a file from a device.
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device name of device
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"""
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if device == 'ptr':
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self.ptrptp.ptr_dismount()
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elif device == 'ptp':
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self.ptrptp.ptp_dismount()
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else:
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return 'dismount: bad device: %s' % device
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def checkfile(self, file1, file2):
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"""Compare two files, error if different."""
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cmd = 'cmp -s %s %s' % (file1, file2)
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res = os.system(cmd) & 0xff
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if res:
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return 'Files %s and %s are different' % (file1, file2)
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# end of DSL primitives
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def check_all_mem(self):
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"""Check memory for unwanted changes."""
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result = []
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for mem in range(MEMORY_SIZE):
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value = self.memory.fetch(mem, False)
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if mem in self.mem_values:
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if value != self.mem_values[mem]:
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result.append('Memory at %07o changed, is %07o, should be %07o'
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% (mem, value, self.mem_values[mem]))
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else:
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if value != self.mem_all_value:
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result.append('Memory at %07o changed, is %07o, should be %07o'
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% (mem, value, self.mem_all_value))
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def check_all_regs(self):
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"""Check registers for unwanted changes."""
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result = []
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if 'ac' in self.reg_values:
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if self.cpu.AC != self.reg_values['ac']:
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result.append('AC changed, is %07o, should be %07o'
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% (self.cpu.AC, self.reg_values['ac']))
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else:
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if self.cpu.AC != self.reg_all_value:
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result.append('AC changed, is %07o, should be %07o'
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% (self.cpu.AC, self.reg_all_value))
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if 'l' in self.reg_values:
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if self.cpu.L != self.reg_values['l']:
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result.append('L changed, is %02o, should be %02o'
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% (self.cpu.L, self.reg_values['l']))
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else:
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if self.cpu.L != self.reg_all_value & 1:
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result.append('L changed, is %02o, should be %02o'
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% (self.cpu.L, self.reg_all_value & 1))
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if 'pc' in self.reg_values:
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if self.cpu.PC != self.reg_values['pc']:
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result.append('PC changed, is %07o, should be %07o'
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% (self.cpu.PC, self.reg_values['pc']))
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else:
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if self.cpu.PC != self.reg_all_value:
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result.append('PC changed, is %07o, should be %07o'
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% (self.cpu.PC, self.reg_all_value))
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if 'ds' in self.reg_values:
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if self.cpu.DS != self.reg_values['ds']:
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result.append('DS changed, is %07o, should be %07o'
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% (self.cpu.DS, self.reg_values['ds']))
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else:
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if self.cpu.DS != self.reg_all_value:
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result.append('DS changed, is %07o, should be %07o'
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% (self.cpu.DS, self.reg_all_value))
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return result
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def setd(self, state, var2):
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"""Set display state."""
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if state == 'on':
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self.display_state = True
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elif state == 'off':
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self.display_state = False
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else:
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raise Exception('setd: bad state: %s' % str(state))
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def debug_operation(self, op, var1, var2):
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"""Write operation to log file."""
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if var1:
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if var2:
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log.debug('Operation: %s %s %s' % (op, var1, var2))
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else:
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log.debug('Operation: %s %s' % (op, var1))
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else:
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log.debug('Operation: %s' % op)
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def execute(self, test, filename):
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"""Execute test string in 'test'."""
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# set globals
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self.reg_values = {}
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self.mem_values = {}
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self.reg_all_value = 0
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self.mem_all_value = 0
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result = []
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self.memory = Memory.Memory()
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self.ptrptp = PtrPtp.PtrPtp()
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self.cpu = MainCPU.MainCPU(self.memory, None, None,
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None, None, None, self.ptrptp)
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self.cpu.running = True
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self.display_state = False
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trace_filename = filename + '.trace'
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Trace.init(trace_filename, self.cpu, None)
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# clear registers and memory to 0 first
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self.allreg(self.reg_all_value, None)
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self.allmem(self.mem_all_value, None)
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# interpret the test instructions
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suite = test.split(';')
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for instruction in suite:
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fields = instruction.split(None, 2)
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if not fields:
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continue;
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opcode = fields[0].strip().lower()
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if len(fields) == 1:
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fld1 = fld2 = None
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elif len(fields) == 2:
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fld1 = fields[1].strip().lower()
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fld2 = None
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elif len(fields) == 3:
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fld1 = fields[1].strip().lower()
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fld2 = fields[2].strip().lower()
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self.debug_operation(opcode, fld1, fld2)
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# cll the correct DSL primitive
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if opcode == 'setreg':
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r = self.setreg(fld1, fld2)
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elif opcode == 'setmem':
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r = self.setmem(fld1, fld2)
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elif opcode == 'run':
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r = self.run(fld1, fld2)
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elif opcode == 'rununtil':
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r = self.rununtil(fld1, fld2)
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elif opcode == 'checkcycles':
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r = self.checkcycles(fld1, fld2)
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elif opcode == 'checkreg':
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r = self.checkreg(fld1, fld2)
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elif opcode == 'checkmem':
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r = self.checkmem(fld1, fld2)
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elif opcode == 'allreg':
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r = self.allreg(fld1, fld2)
|
|
elif opcode == 'allmem':
|
|
r = self.allmem(fld1, fld2)
|
|
elif opcode == 'checkcpu':
|
|
r = self.checkcpu(fld1, fld2)
|
|
elif opcode == 'checkdcpu':
|
|
r = self.checkdcpu(fld1, fld2)
|
|
elif opcode == 'setd':
|
|
r = self.setd(fld1, fld2)
|
|
elif opcode == 'bootrom':
|
|
r = self.bootrom(fld1, fld2)
|
|
elif opcode == 'romwrite':
|
|
r = self.romwrite(fld1, fld2)
|
|
elif opcode == 'mount':
|
|
r = self.mount(fld1, fld2)
|
|
elif opcode == 'dismount':
|
|
r = self.dismount(fld1, fld2)
|
|
elif opcode == 'checkfile':
|
|
r = self.checkfile(fld1, fld2)
|
|
else:
|
|
raise Exception("Unrecognized opcode '%s' in: %s" % (opcode, test))
|
|
|
|
if r is not None:
|
|
result.append(r)
|
|
|
|
# now check all memory and regs for changes
|
|
r = self.check_all_mem()
|
|
if r:
|
|
result.append(r)
|
|
|
|
r = self.check_all_regs()
|
|
if r:
|
|
result.extend(r)
|
|
|
|
if result:
|
|
print(test)
|
|
print('\t' + '\n\t'.join(result))
|
|
|
|
self.memdump('core.txt', 0, 0200)
|
|
|
|
def memdump(self, filename, start, number):
|
|
"""Dump memory from 'start' into 'filename', 'number' words dumped."""
|
|
|
|
with open(filename, 'wb') as fd:
|
|
for addr in range(start, start+number, 8):
|
|
a = addr
|
|
llen = min(8, start+number - addr)
|
|
line = '%04o ' % addr
|
|
for _ in range(llen):
|
|
line += '%06o ' % self.memory.fetch(a, False)
|
|
a += 1
|
|
fd.write('%s\n' % line)
|
|
|
|
def main(self, filename):
|
|
"""Execute CPU tests from 'filename'."""
|
|
|
|
log.debug("Running test file '%s'" % filename)
|
|
|
|
# get all tests from file
|
|
with open(filename, 'rb') as fd:
|
|
lines = fd.readlines()
|
|
|
|
# read lines, join continued, get complete tests
|
|
tests = []
|
|
test = ''
|
|
for line in lines:
|
|
self.show_progress()
|
|
|
|
line = line[:-1] # strip newline
|
|
|
|
if not line:
|
|
continue # skip blank lines
|
|
|
|
if line[0] == '#': # a comment
|
|
continue
|
|
|
|
if line[0] in ('\t', ' '): # continuation
|
|
if test:
|
|
test += '; '
|
|
test += line[1:]
|
|
else: # beginning of new test
|
|
if test:
|
|
tests.append(test)
|
|
test = line
|
|
|
|
# flush last test
|
|
if test:
|
|
tests.append(test)
|
|
|
|
# now do each test
|
|
for test in tests:
|
|
self.show_progress()
|
|
log.debug('Executing test: %s' % test)
|
|
self.execute(test, filename)
|
|
|
|
################################################################################
|
|
|
|
if __name__ == '__main__':
|
|
import sys
|
|
import getopt
|
|
|
|
def usage(msg=None):
|
|
if msg:
|
|
print('*'*60)
|
|
print(msg)
|
|
print('*'*60)
|
|
print(__doc__)
|
|
|
|
try:
|
|
(opts, args) = getopt.gnu_getopt(sys.argv, "h", ["help"])
|
|
except getopt.GetoptError:
|
|
usage()
|
|
sys.exit(10)
|
|
|
|
for opt, arg in opts:
|
|
if opt in ("-h", "--help"):
|
|
usage()
|
|
sys.exit(0)
|
|
|
|
if len(args) != 2:
|
|
usage()
|
|
sys.exit(10)
|
|
|
|
filename = args[1]
|
|
try:
|
|
f = open(filename)
|
|
except IOError:
|
|
print("Sorry, can't find file '%s'" % filename)
|
|
sys.exit(10)
|
|
f.close()
|
|
|
|
test = TestCPU()
|
|
test.main(filename)
|