mirror of
https://github.com/simh/simh.git
synced 2026-01-25 19:56:25 +00:00
Notes For V3.1-0
RESTRICTION: The FP15 and XVM features of the PDP-15 are only partially debugged. Do NOT enable these features for normal operations. 1. New Features in 3.1-0 1.1 SCP and libraries - Added simulated Ethernet support for VMS, FreeBSD, Mac OS/X. - Added status return to tmxr_putc_ln. - Added sim_putchar_s to handle possible output stalls. 1.2 All DECtapes - Added "DECtape off reel" error stop. 1.3 All Asynchronous Consoles - Added support for output congestion stall if using a Telnet connection. 1.4 PDP-1 - Added Type 23 parallel drum support. 1.5 PDP-8 - Added instruction history. - Added TSC8-75 option support for ETOS. - Added TD8E DECtape support. 1.6 PDP-18b - Added instruction history. - Changed PDP-9, PDP-15 API default to enabled. 1.7 PDP-11 - Added support for 18b only Qbus devices. - Formalized bus and addressing definitions. - Added control to enable/disable autoconfiguration. - Added stub support for second Unibus Ethernet controller. 1.7 Interdata 32b - Added instruction history. 1.8 Eclipse - Added floating point support. - Added programmable interval timer support. 1.9 H316 - Added DMA/DMC support. - Added fixed head disk support. - Added moving head disk support. - Added magtape support. 1.10 IBM 1130 (Brian Knittel) - Added support for physical card reader, using the Cardread interface (www.ibm1130.org/sim/downloads). - Added support for physical printer (flushes output buffer after each line). 2. Bugs Fixed in 3.1-0 2.1 SCP and libraries - Fixed numerous bugs in Ethernet library. 2.2 All DECtapes - Fixed reverse checksum value in 'read all' mode. - Simplified (and sped up) timing. 2.3 PDP-8 - Fixed bug in RX28 read status (found by Charles Dickman). - Fixed RX28 double density write. 2.4 PDP-18b - Fixed autoincrement bug in PDP-4, PDP-7, PDP-9. 2.5 PDP-11/VAX - Revised RQ MB->LBN conversion for greater accuracy. - Fixed bug in IO configuration (found by David Hittner). - Fixed bug with multiple RQ RAUSER drives. - Fixed bug in second Qbus Ethernet controller interrupts. 2.6 Nova/Eclipse - Fixed bugs in DKP flag clear, map setup, map usage (Charles Owen). - Fixed bug in MT, reset completes despite I/O reset (Charles Owen). - Fixed bug in MT, space operations return word count (Charles Owen). 2.7 IBM 1130 (Brian Knittel) - Fixed bug in setting carry bit in subtract and subtract double. - Fixed timing problem in console printer simulation. 2.8 1620 - Fixed bug in branch digit (found by Dave Babcock). 3. New Features in 3.0 vs prior releases 3.1 SCP and Libraries - Added ASSIGN/DEASSIGN (logical name) commands. - Changed RESTORE to unconditionally detach files. - Added E11 and TPC format support to magtape library. - Fixed bug in SHOW CONNECTIONS. - Added USE_ADDR64 support. 3.2 All magtapes - Magtapes support SIMH format, E11 format, and TPC format (read only). - SET <tape_unit> FORMAT=format sets the specified tape unit's format. - SHOW <tape_unit> FORMAT displays the specified tape unit's format. - Tape format can also be set as part of the ATTACH command, using the -F switch. 3.3 VAX - VAX can be compiled without USE_INT64. - If compiled with USE_INT64 and USE_ADDR64, RQ and TQ controllers support files > 2GB. - VAX ROM has speed control (SET ROM DELAY/NODELAY). 3.4 PDP-1 - Added block loader format support to LOAD. - Changed BOOT PTR to allow loading of all of the first bank of memory. - The LOAD command takes an optional argument specifying the memory field to be loaded. - The PTR BOOT command takes its starting memory field from the TA (address switch) register. 3.5 PDP-18b Family - Added PDP-4 EAE support. - Added PDP-15 FP15 support. - Added PDP-15 XVM support. - Added PDP-15 "re-entrancy ECO". - Added PDP-7, PDP-9, PDP-15 hardware RIM loader support in BOOT PTR. 4. Bugs Fixed in 3.0 vs prior releases 4.1 SCP and Libraries - Fixed end of file problem in dep, idep. - Fixed handling of trailing spaces in dep, idep. 4.2 VAX - Fixed CVTfi bug: integer overflow not set if exponent out of range - Fixed EMODx bugs: o First and second operands reversed o Separated fraction received wrong exponent o Overflow calculation on separated integer incorrect o Fraction not set to zero if exponent out of range - Fixed interval timer and ROM access to pass power-up self-test even on very fast host processors (fixes from Mark Pizzolato). - Fixed bug in user disk size (found by Chaskiel M Grundman). 4.3 1401 - Fixed mnemonic, instruction lengths, and reverse scan length check bug for MCS. - Fixed MCE bug, BS off by 1 if zero suppress. - Fixed chaining bug, D lost if return to SCP. - Fixed H branch, branch occurs after continue. - Added check for invalid 8 character MCW, LCA. - Fixed magtape load-mode end of record response. - Revised fetch to model hardware more closely. - Fixed tape read end-of-record handling based on real 1401. - Added diagnostic read (space forward). 4.4 Nova - Fixed DSK variable size interaction with restore. - Fixed bug in DSK set size routine. 4.5 PDP-1 - Fixed DT variable size interaction with restore. - Updated CPU, line printer, standard devices to detect indefinite I/O wait. - Fixed incorrect logical, missing activate, break in drum simulator. - Fixed bugs in instruction decoding, overprinting for line printer. - Fixed system hang if continue after PTR error. - Fixed PTR to start/stop on successive rpa instructions. 4.6 PDP-11 - Fixed DT variable size interaction with restore. - Fixed bug in MMR1 update (found by Tim Stark). - Added XQ features and fixed bugs: o Corrected XQ interrupts on IE state transition (code by Tom Evans). o Added XQ interrupt clear on soft reset. o Removed XQ interrupt when setting XL or RL (multiple people). o Added SET/SHOW XQ STATS. o Added SHOW XQ FILTERS. o Added ability to split received packet into multiple buffers. o Added explicit runt and giant packet processing. - Fixed bug in user disk size (found by Chaskiel M Grundman). 4.7 PDP-18B - Fixed DT, RF variable size interaction with restore. - Fixed MT bug in MTTR. - Fixed bug in PDP-4 line printer overprinting. - Fixed bug in PDP-15 memory protect/skip interaction. - Fixed bug in RF set size routine. - Increased PTP TIME for PDP-15 operating systems. - Fixed priorities in PDP-15 API (differs from PDP-9). - Fixed sign handling in PDP-15 EAE unsigned mul/div (differs from PDP-9). - Fixed bug in CAF, clears API subsystem. 4.8 PDP-8 - Fixed DT, DF, RF, RX variable size interaction with restore. - Fixed MT bug in SKTR. - Fixed bug in DF, RF set size routine. 4.9 HP2100 - Fixed bug in DP (13210A controller only), DQ read status. - Fixed bug in DP, DQ seek complete. - Fixed DR drum sizes. - Fixed DR variable capacity interaction with SAVE/RESTORE. 4.10 GRI - Fixed bug in SC queue pointer management. 4.11 PDP-10 - Fixed bug in RP read header. 4.12 Ibm1130 - Fixed bugs found by APL 1130. 4.13 Altairz80 - Fixed bug in real-time clock on Windows host. 4.14 1620 - Fixed bug in immediate index add (found by Michael Short).
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
b2101ecdd4
commit
1da2d9452d
@@ -23,6 +23,8 @@
|
||||
be used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
|
||||
08-Dec-03 RMS Added support for parallel drum
|
||||
18-Oct-03 RMS Added DECtape off reel message
|
||||
22-Jul-03 RMS Updated for "hardware" RIM loader
|
||||
Revised to detect I/O wait hang
|
||||
05-Dec-02 RMS Added IOT skip support (required by drum)
|
||||
@@ -36,6 +38,7 @@
|
||||
|
||||
Automatic multiply/divide Type 10
|
||||
Memory extension control Type 15
|
||||
Parallel drum Type 23
|
||||
Serial drum Type 24
|
||||
Line printer control Type 62
|
||||
Microtape (DECtape) control Type 550
|
||||
@@ -51,6 +54,7 @@
|
||||
#define STOP_XCT 4 /* nested XCT's */
|
||||
#define STOP_IND 5 /* nested indirects */
|
||||
#define STOP_WAIT 6 /* IO wait hang */
|
||||
#define STOP_DTOFF 7 /* DECtape off reel */
|
||||
|
||||
/* Memory */
|
||||
|
||||
@@ -92,6 +96,7 @@
|
||||
#define IOS_V_SQB 11 /* sequence break */
|
||||
#define IOS_V_PNT 2 /* print done */
|
||||
#define IOS_V_SPC 1 /* space done */
|
||||
#define IOS_V_DRP 0 /* parallel drum busy */
|
||||
|
||||
#define IOS_LPN (1 << IOS_V_LPN)
|
||||
#define IOS_PTR (1 << IOS_V_PTR)
|
||||
@@ -102,6 +107,7 @@
|
||||
#define IOS_SQB (1 << IOS_V_SQB)
|
||||
#define IOS_PNT (1 << IOS_V_PNT)
|
||||
#define IOS_SPC (1 << IOS_V_SPC)
|
||||
#define IOS_DRP (1 << IOS_V_DRP)
|
||||
|
||||
/* Completion pulses */
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
To: Users
|
||||
From: Bob Supnik
|
||||
Subj: PDP-1 Simulator Usage
|
||||
Date: 15-Sep-2003
|
||||
Date: 15-Dec-2003
|
||||
|
||||
COPYRIGHT NOTICE
|
||||
|
||||
@@ -65,6 +65,7 @@ PTR,PTP integral paper tape reader/punch
|
||||
TTY console typewriter
|
||||
LPT Type 62 line printer
|
||||
DRM Type 24 serial drum
|
||||
DRP Type 23 parallel drum
|
||||
DT Type 550 Microtape (DECtape)
|
||||
|
||||
The PDP-1 simulator implements the following unique stop conditions:
|
||||
@@ -77,6 +78,7 @@ The PDP-1 simulator implements the following unique stop conditions:
|
||||
instruction execution
|
||||
- I/O wait, and no I/O operations outstanding (i.e, no I/O
|
||||
completion will ever occur)
|
||||
- a simulated DECtape runs off the end of its reel
|
||||
|
||||
The PDP-1 loader supports RIM format tapes and BLK format tapes. If
|
||||
the file to be loaded has an extension of .BIN, or switch -B is specified,
|
||||
@@ -302,7 +304,6 @@ The DECtape controller implements these registers:
|
||||
BEF 1 block end flag
|
||||
ERF 1 error flag
|
||||
LTIME 31 time between lines
|
||||
ACTIME 31 time to accelerate to full speed
|
||||
DCTIME 31 time to decelerate to a full stop
|
||||
SUBSTATE 2 read/write command substate
|
||||
POS[0:7] 32 position, in lines, units 0-7
|
||||
@@ -313,10 +314,19 @@ among the DECtape parameters, or the DECtape simulator will fail to
|
||||
operate correctly.
|
||||
|
||||
- LTIME must be at least 6
|
||||
- ACTIME must be less than DCTIME, and both need to be at
|
||||
least 100 times LTIME
|
||||
- DCTIME needs to be at least 100 times LTIME
|
||||
|
||||
2.4 Type 24 Serial Drum (DRM)
|
||||
Acceleration time is set to 75% of deceleration time.
|
||||
|
||||
2.4 Drums
|
||||
|
||||
The PDP-1 supported two drums: the Type 23 parallel drum (DRP) and
|
||||
the Type 24 serial drum (DRM). Both use device addresses 061-064;
|
||||
accordingly, only one can be enabled at a time. By default, the
|
||||
Type 24 serial drum is enabled, and the Type 23 parallel drum is
|
||||
disabled.
|
||||
|
||||
2.4.1 Type 24 Serial Drum (DRM)
|
||||
|
||||
The serial drum (DRM) implements these registers:
|
||||
|
||||
@@ -324,7 +334,6 @@ The serial drum (DRM) implements these registers:
|
||||
|
||||
DA 9 drum address (sector number)
|
||||
MA 16 current memory address
|
||||
INT 1 interrupt pending flag
|
||||
DONE 1 device done flag
|
||||
ERR 1 error flag
|
||||
WLK 32 write lock switches
|
||||
@@ -341,6 +350,35 @@ Error handling is as follows:
|
||||
Drum data files are buffered in memory; therefore, end of file and OS
|
||||
I/O errors cannot occur.
|
||||
|
||||
2.4.2 Type 23 Parallel Drum (DRP)
|
||||
|
||||
The parallel drum (DRP) implements these registers:
|
||||
|
||||
name size comments
|
||||
|
||||
TA 12 track address
|
||||
RDF 5 read field
|
||||
RDE 1 read enable flag
|
||||
WRF 5 write field
|
||||
WRF 1 write enable flag
|
||||
MA 16 current memory address
|
||||
WC 12 word count
|
||||
BUSY 1 device busy flag
|
||||
ERR 1 error flag
|
||||
TIME 24 rotational latency, per word
|
||||
STOP_IOE 1 stop on I/O error
|
||||
|
||||
|
||||
Error handling is as follows:
|
||||
|
||||
error STOP_IOE processed as
|
||||
|
||||
not attached 1 report error and stop
|
||||
0 disk not ready
|
||||
|
||||
Drum data files are buffered in memory; therefore, end of file and OS
|
||||
I/O errors cannot occur.
|
||||
|
||||
2.5 Symbolic Display and Input
|
||||
|
||||
The PDP-1 simulator implements symbolic display and input. Display is
|
||||
|
||||
241
PDP1/pdp1_drm.c
241
PDP1/pdp1_drm.c
@@ -23,8 +23,12 @@
|
||||
be used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
|
||||
drp Type 23 parallel drum
|
||||
drm Type 24 serial drum
|
||||
|
||||
08-Dec-03 RMS Added parallel drum support
|
||||
Fixed bug in DBL/DCN decoding
|
||||
26-Oct-03 RMS Cleaned up buffer copy code
|
||||
23-Jul-03 RMS Fixed incorrect logical, missing activate
|
||||
05-Dec-02 RMS Cloned from pdp18b_drm.c
|
||||
*/
|
||||
@@ -32,21 +36,36 @@
|
||||
#include "pdp1_defs.h"
|
||||
#include <math.h>
|
||||
|
||||
/* Constants */
|
||||
/* Serial drum constants */
|
||||
|
||||
#define DRM_NUMWDS 256 /* words/sector */
|
||||
#define DRM_NUMSC 2 /* sectors/track */
|
||||
#define DRM_NUMTR 256 /* tracks/drum */
|
||||
#define DRM_NUMDK 1 /* drum/controller */
|
||||
#define DRM_NUMWDT (DRM_NUMWDS * DRM_NUMSC) /* words/track */
|
||||
#define DRM_SIZE (DRM_NUMDK * DRM_NUMTR * DRM_NUMWDT) /* words/drum */
|
||||
#define DRM_SIZE (DRM_NUMTR * DRM_NUMWDT) /* words/drum */
|
||||
#define DRM_SMASK ((DRM_NUMTR * DRM_NUMSC) - 1) /* sector mask */
|
||||
|
||||
/* Parallel drum constants */
|
||||
|
||||
#define DRP_NUMWDT 4096 /* words/track */
|
||||
#define DRP_NUMTK 32 /* tracks/drum */
|
||||
#define DRP_SIZE (DRP_NUMWDT * DRP_NUMTK) /* words/drum */
|
||||
#define DRP_V_RWE 17 /* read/write enable */
|
||||
#define DRP_V_FLD 12 /* drum field */
|
||||
#define DRP_M_FLD 037
|
||||
#define DRP_TAMASK 07777 /* track address */
|
||||
#define DRP_WCMASK 07777 /* word count */
|
||||
#define DRP_MAINCM 07777 /* mem addr incr */
|
||||
#define DRP_GETRWE(x) (((x) >> DRP_V_RWE) & 1)
|
||||
#define DRP_GETRWF(x) (((x) >> DRP_V_FLD) & DRP_M_FLD)
|
||||
|
||||
/* Parameters in the unit descriptor */
|
||||
|
||||
#define FUNC u4 /* function */
|
||||
#define DRM_READ 000 /* read */
|
||||
#define DRM_WRITE 010 /* write */
|
||||
#define DRP_RW 000 /* read/write */
|
||||
#define DRP_BRK 001 /* break on address */
|
||||
|
||||
#define GET_POS(x) ((int) fmod (sim_gtime() / ((double) (x)), \
|
||||
((double) DRM_NUMWDT)))
|
||||
@@ -56,15 +75,34 @@ extern int32 iosta, sbs;
|
||||
extern int32 stop_inst;
|
||||
extern UNIT cpu_unit;
|
||||
|
||||
int32 drm_da = 0; /* track address */
|
||||
int32 drm_ma = 0; /* memory address */
|
||||
int32 drm_err = 0; /* error flag */
|
||||
int32 drm_wlk = 0; /* write lock */
|
||||
int32 drm_time = 10; /* inter-word time */
|
||||
/* Serial drum variables */
|
||||
|
||||
uint32 drm_da = 0; /* track address */
|
||||
uint32 drm_ma = 0; /* memory address */
|
||||
uint32 drm_err = 0; /* error flag */
|
||||
uint32 drm_wlk = 0; /* write lock */
|
||||
int32 drm_time = 4; /* inter-word time */
|
||||
int32 drm_stopioe = 1; /* stop on error */
|
||||
|
||||
/* Parallel drum variables */
|
||||
|
||||
uint32 drp_rde = 0; /* read enable */
|
||||
uint32 drp_wre = 0; /* write enable */
|
||||
uint32 drp_rdf = 0; /* read field */
|
||||
uint32 drp_wrf = 0; /* write field */
|
||||
uint32 drp_ta = 0; /* track address */
|
||||
uint32 drp_wc = 0; /* word count */
|
||||
uint32 drp_ma = 0; /* memory address */
|
||||
uint32 drp_err = 0; /* error */
|
||||
int32 drp_time = 2; /* inter-word time */
|
||||
int32 drp_stopioe = 1; /* stop on error */
|
||||
|
||||
/* Forward declarations */
|
||||
|
||||
t_stat drm_svc (UNIT *uptr);
|
||||
t_stat drm_reset (DEVICE *dptr);
|
||||
t_stat drp_svc (UNIT *uptr);
|
||||
t_stat drp_reset (DEVICE *dptr);
|
||||
|
||||
/* DRM data structures
|
||||
|
||||
@@ -93,6 +131,38 @@ DEVICE drm_dev = {
|
||||
NULL, NULL, &drm_reset,
|
||||
NULL, NULL, NULL,
|
||||
NULL, DEV_DISABLE };
|
||||
|
||||
/* DRP data structures
|
||||
|
||||
drp_dev DRP device descriptor
|
||||
drp_unit DRP unit descriptor
|
||||
drp_reg DRP register list
|
||||
*/
|
||||
|
||||
UNIT drp_unit =
|
||||
{ UDATA (&drp_svc, UNIT_FIX+UNIT_ATTABLE+UNIT_BUFABLE+UNIT_MUSTBUF,
|
||||
DRM_SIZE) };
|
||||
|
||||
REG drp_reg[] = {
|
||||
{ ORDATA (TA, drp_ta, 12) },
|
||||
{ ORDATA (RDF, drp_rdf, 5) },
|
||||
{ FLDATA (RDE, drp_rde, 0) },
|
||||
{ FLDATA (WRF, drp_wrf, 5) },
|
||||
{ FLDATA (WRE, drp_wre, 0) },
|
||||
{ ORDATA (MA, drp_ma, 16) },
|
||||
{ ORDATA (WC, drp_wc, 12) },
|
||||
{ FLDATA (BUSY, iosta, IOS_V_DRP) },
|
||||
{ FLDATA (ERR, drp_err, 0) },
|
||||
{ DRDATA (TIME, drp_time, 24), REG_NZ + PV_LEFT },
|
||||
{ FLDATA (STOP_IOE, drp_stopioe, 0) },
|
||||
{ NULL } };
|
||||
|
||||
DEVICE drp_dev = {
|
||||
"DRP", &drp_unit, drp_reg, NULL,
|
||||
1, 8, 20, 1, 8, 18,
|
||||
NULL, NULL, &drp_reset,
|
||||
NULL, NULL, NULL,
|
||||
NULL, DEV_DISABLE | DEV_DIS };
|
||||
|
||||
/* IOT routines */
|
||||
|
||||
@@ -101,39 +171,77 @@ int32 drm (int32 IR, int32 dev, int32 dat)
|
||||
int32 t;
|
||||
int32 pulse = (IR >> 6) & 037;
|
||||
|
||||
if (drm_dev.flags & DEV_DIS) /* disabled? */
|
||||
return (stop_inst << IOT_V_REASON) | dat; /* stop if requested */
|
||||
if ((pulse != 001) && (pulse != 011)) /* invalid pulse? */
|
||||
return (stop_inst << IOT_V_REASON) | dat; /* stop if requested */
|
||||
switch (dev) { /* switch on device */
|
||||
case 061: /* DWR, DRD */
|
||||
drm_ma = dat & 0177777; /* load mem addr */
|
||||
drm_unit.FUNC = pulse & DRM_WRITE; /* save function */
|
||||
break;
|
||||
case 062: /* DBL, DCN */
|
||||
if (pulse & 010) drm_da = dat & DRM_SMASK; /* load sector # */
|
||||
iosta = iosta & ~IOS_DRM; /* clear flags */
|
||||
drm_err = 0;
|
||||
t = ((drm_da % DRM_NUMSC) * DRM_NUMWDS) - GET_POS (drm_time);
|
||||
if (t <= 0) t = t + DRM_NUMWDT; /* wrap around? */
|
||||
sim_activate (&drm_unit, t); /* start operation */
|
||||
break;
|
||||
case 063: /* DTD */
|
||||
if (pulse == 011) return (stop_inst << IOT_V_REASON) | dat;
|
||||
if (iosta & IOS_DRM) return (dat | IOT_SKP); /* skip if done */
|
||||
break;
|
||||
case 064: /* DSE, DSP */
|
||||
if ((drm_err == 0) || (pulse & 010)) /* no error, par test? */
|
||||
return (dat | IOT_SKP);
|
||||
}
|
||||
return dat;
|
||||
if ((drm_dev.flags & DEV_DIS) == 0) { /* serial enabled? */
|
||||
if ((pulse != 001) && (pulse != 011)) /* invalid pulse? */
|
||||
return (stop_inst << IOT_V_REASON) | dat; /* stop if requested */
|
||||
switch (dev) { /* switch on device */
|
||||
case 061: /* DWR, DRD */
|
||||
drm_ma = dat & AMASK; /* load mem addr */
|
||||
drm_unit.FUNC = pulse & DRM_WRITE; /* save function */
|
||||
break;
|
||||
case 062: /* DBL, DCN */
|
||||
if ((pulse & 010) == 0) /* DBL? */
|
||||
drm_da = dat & DRM_SMASK; /* load sector # */
|
||||
iosta = iosta & ~IOS_DRM; /* clear flags */
|
||||
drm_err = 0;
|
||||
t = ((drm_da % DRM_NUMSC) * DRM_NUMWDS) - GET_POS (drm_time);
|
||||
if (t <= 0) t = t + DRM_NUMWDT; /* wrap around? */
|
||||
sim_activate (&drm_unit, t); /* start operation */
|
||||
break;
|
||||
case 063: /* DTD */
|
||||
if (pulse == 011) return (stop_inst << IOT_V_REASON) | dat;
|
||||
if (iosta & IOS_DRM) return (dat | IOT_SKP); /* skip if done */
|
||||
break;
|
||||
case 064: /* DSE, DSP */
|
||||
if ((drm_err == 0) || (pulse & 010)) /* no error, par test? */
|
||||
return (dat | IOT_SKP);
|
||||
} /* end case */
|
||||
return dat; } /* end if serial */
|
||||
|
||||
if ((drp_dev.flags & DEV_DIS) == 0) { /* parallel enabled? */
|
||||
switch (dev) { /* switch on device */
|
||||
case 061: /* DIA, DBA */
|
||||
drp_err = 0; /* clear error */
|
||||
iosta = iosta & ~IOS_DRP; /* not busy */
|
||||
drp_rde = DRP_GETRWE (dat); /* set read enable */
|
||||
drp_rdf = DRP_GETRWF (dat); /* set read field */
|
||||
drp_ta = dat & DRP_TAMASK; /* set track addr */
|
||||
if (IR & 02000) { /* DBA? */
|
||||
t = drp_ta - GET_POS (drp_time); /* delta words */
|
||||
if (t <= 0) t = t + DRP_NUMWDT; /* wrap around? */
|
||||
sim_activate (&drp_unit, t); /* start operation */
|
||||
drp_unit.FUNC = DRP_BRK; } /* mark as break */
|
||||
else drp_unit.FUNC = DRP_RW; /* no, read/write */
|
||||
break;
|
||||
case 062: /* DWC, DRA */
|
||||
if (IR & 02000) dat = GET_POS (drp_time) | /* DRA, get position */
|
||||
(drp_err? 0400000: 0);
|
||||
else { /* DWC */
|
||||
drp_wre = DRP_GETRWE (dat); /* set write enable */
|
||||
drp_wrf = DRP_GETRWF (dat); /* set write field */
|
||||
drp_wc = dat & DRP_WCMASK; } /* set word count */
|
||||
break;
|
||||
case 063: /* DCL */
|
||||
drp_ma = dat & AMASK; /* set mem address */
|
||||
t = drp_ta - GET_POS (drp_time); /* delta words */
|
||||
if (t <= 0) t = t + DRP_NUMWDT; /* wrap around? */
|
||||
sim_activate (&drp_unit, t); /* start operation */
|
||||
iosta = iosta | IOS_DRP; /* set busy */
|
||||
break;
|
||||
case 064: /* not assigned */
|
||||
return (stop_inst << IOT_V_REASON) | dat; /* stop if requested */
|
||||
} /* end case */
|
||||
return dat; } /* end if parallel */
|
||||
|
||||
return (stop_inst << IOT_V_REASON) | dat; /* stop if requested */
|
||||
}
|
||||
|
||||
/* Unit service - this code assumes the entire drum is buffered */
|
||||
/* Serial unit service - this code assumes the entire drum is buffered */
|
||||
|
||||
t_stat drm_svc (UNIT *uptr)
|
||||
{
|
||||
uint32 i, da;
|
||||
uint32 *fbuf = uptr->filebuf;
|
||||
|
||||
if ((uptr->flags & UNIT_BUF) == 0) { /* not buf? abort */
|
||||
drm_err = 1; /* set error */
|
||||
@@ -143,15 +251,15 @@ if ((uptr->flags & UNIT_BUF) == 0) { /* not buf? abort */
|
||||
|
||||
da = drm_da * DRM_NUMWDS; /* compute dev addr */
|
||||
for (i = 0; i < DRM_NUMWDS; i++, da++) { /* do transfer */
|
||||
if (uptr->FUNC == DRM_READ) {
|
||||
if (MEM_ADDR_OK (drm_ma)) /* read, check nxm */
|
||||
M[drm_ma] = *(((int32 *) uptr->filebuf) + da); }
|
||||
else {
|
||||
if (uptr->FUNC == DRM_READ) { /* read? */
|
||||
if (MEM_ADDR_OK (drm_ma)) /* if !nxm */
|
||||
M[drm_ma] = fbuf[da]; } /* read word */
|
||||
else { /* write */
|
||||
if ((drm_wlk >> (drm_da >> 4)) & 1) drm_err = 1;
|
||||
else {
|
||||
*(((int32 *) uptr->filebuf) + da) = M[drm_ma];
|
||||
else { /* not locked */
|
||||
fbuf[da] = M[drm_ma]; /* write word */
|
||||
if (da >= uptr->hwmark) uptr->hwmark = da + 1; } }
|
||||
drm_ma = (drm_ma + 1) & 0177777; } /* incr mem addr */
|
||||
drm_ma = (drm_ma + 1) & AMASK; } /* incr mem addr */
|
||||
drm_da = (drm_da + 1) & DRM_SMASK; /* incr dev addr */
|
||||
iosta = iosta | IOS_DRM; /* set done */
|
||||
sbs = sbs | SB_RQ; /* req intr */
|
||||
@@ -162,8 +270,57 @@ return SCPE_OK;
|
||||
|
||||
t_stat drm_reset (DEVICE *dptr)
|
||||
{
|
||||
if ((drm_dev.flags & DEV_DIS) == 0)
|
||||
drp_dev.flags = drp_dev.flags | DEV_DIS;
|
||||
drm_da = drm_ma = drm_err = 0;
|
||||
iosta = iosta & ~IOS_DRM;
|
||||
sim_cancel (&drm_unit);
|
||||
drm_unit.FUNC = 0;
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Parallel unit service - this code assumes the entire drum is buffered */
|
||||
|
||||
t_stat drp_svc (UNIT *uptr)
|
||||
{
|
||||
uint32 i, lim;
|
||||
uint32 *fbuf = uptr->filebuf;
|
||||
|
||||
if ((uptr->flags & UNIT_BUF) == 0) { /* not buf? abort */
|
||||
drp_err = 1; /* set error */
|
||||
iosta = iosta & ~IOS_DRP; /* clear busy */
|
||||
if (uptr->FUNC) sbs = sbs | SB_RQ; /* req intr */
|
||||
return IORETURN (drp_stopioe, SCPE_UNATT); }
|
||||
|
||||
if (uptr->FUNC == DRP_RW) { /* read/write? */
|
||||
lim = drp_wc? drp_wc: DRP_TAMASK + 1; /* eff word count */
|
||||
for (i = 0; i < lim; i++) { /* do transfer */
|
||||
if (drp_wre) /* write enabled? */
|
||||
fbuf[(drp_wrf << DRP_V_FLD) | drp_ta] = M[drp_ma];
|
||||
if (drp_rde && MEM_ADDR_OK (drp_ma)) /* read enabled? */
|
||||
M[drp_ma] = fbuf[(drp_rdf << DRP_V_FLD) | drp_ta];
|
||||
drp_ta = (drp_ta + 1) & DRP_TAMASK; /* incr track addr */
|
||||
drp_ma = ((drp_ma & ~DRP_MAINCM) | ((drp_ma + 1) & DRP_MAINCM));
|
||||
} /* end for */
|
||||
} /* end if */
|
||||
iosta = iosta & ~IOS_DRP; /* clear busy */
|
||||
if (uptr->FUNC) sbs = sbs | SB_RQ; /* req intr */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Reset routine */
|
||||
|
||||
t_stat drp_reset (DEVICE *dptr)
|
||||
{
|
||||
if ((drp_dev.flags & DEV_DIS) == 0)
|
||||
drm_dev.flags = drm_dev.flags | DEV_DIS;
|
||||
drp_ta = 0;
|
||||
drp_rde = drp_rdf = drp_wre = drp_wrf = 0;
|
||||
drp_err = 0;
|
||||
drp_ma = 0;
|
||||
drp_wc = 0;
|
||||
iosta = iosta & ~IOS_DRP;
|
||||
sim_cancel (&drp_unit);
|
||||
drp_unit.FUNC = 0;
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
@@ -25,6 +25,8 @@
|
||||
|
||||
dt Type 550/555 DECtape
|
||||
|
||||
26-Oct-03 RMS Cleaned up buffer copy code
|
||||
18-Oct-03 RMS Added DECtape off reel message, simplified timing
|
||||
25-Apr-03 RMS Revised for extended file support
|
||||
14-Mar-03 RMS Fixed variable size interaction with save/restore
|
||||
17-Oct-02 RMS Fixed bug in end of reel logic
|
||||
@@ -41,13 +43,16 @@
|
||||
When a 16b or 12b DECtape file is read in, it is converted to 18b/36b format.
|
||||
|
||||
DECtape motion is measured in 3b lines. Time between lines is 33.33us.
|
||||
Tape density is nominally 300 lines per inch. The format of a DECtape is
|
||||
Tape density is nominally 300 lines per inch. The format of a DECtape (as
|
||||
taken from the TD8E formatter) is:
|
||||
|
||||
reverse end zone 36000 lines ~ 10 feet
|
||||
reverse end zone 8192 reverse end zone codes ~ 10 feet
|
||||
reverse buffer 200 interblock codes
|
||||
block 0
|
||||
:
|
||||
block n
|
||||
forward end zone 36000 lines ~ 10 feet
|
||||
forward buffer 200 interblock codes
|
||||
forward end zone 8192 forward end zone codes ~ 10 feet
|
||||
|
||||
A block consists of five 18b header words, a tape-specific number of data
|
||||
words, and five 18b trailer words. All systems except the PDP-8 use a
|
||||
@@ -64,9 +69,9 @@
|
||||
header word 0 0
|
||||
header word 1 block number (for forward reads)
|
||||
header words 2,3 0
|
||||
header word 4 0
|
||||
header word 4 checksum (for reverse reads)
|
||||
:
|
||||
trailer word 4 checksum
|
||||
trailer word 4 checksum (for forward reads)
|
||||
trailer words 3,2 0
|
||||
trailer word 1 block number (for reverse reads)
|
||||
trailer word 0 0
|
||||
@@ -97,13 +102,15 @@
|
||||
|
||||
/* System independent DECtape constants */
|
||||
|
||||
#define DT_EZLIN 36000 /* end zone length */
|
||||
#define DT_HTLIN 30 /* header/trailer lines */
|
||||
#define DT_BLKLN 6 /* blk no line in h/t */
|
||||
#define DT_CSMLN 24 /* checksum line in h/t */
|
||||
#define DT_HTWRD (DT_HTLIN / DT_WSIZE) /* header/trailer words */
|
||||
#define DT_BLKWD (DT_BLKLN / DT_WSIZE) /* blk no word in h/t */
|
||||
#define DT_CSMWD (DT_CSMLN / DT_WSIZE) /* checksum word in h/t */
|
||||
#define DT_LPERMC 6 /* lines per mark track */
|
||||
#define DT_BLKWD 1 /* blk no word in h/t */
|
||||
#define DT_CSMWD 4 /* checksum word in h/t */
|
||||
#define DT_HTWRD 5 /* header/trailer words */
|
||||
#define DT_EZLIN (8192 * DT_LPERMC) /* end zone length */
|
||||
#define DT_BFLIN (200 * DT_LPERMC) /* buffer length */
|
||||
#define DT_BLKLN (DT_BLKWD * DT_LPERMC) /* blk no line in h/t */
|
||||
#define DT_CSMLN (DT_CSMWD * DT_LPERMC) /* csum line in h/t */
|
||||
#define DT_HTLIN (DT_HTWRD * DT_LPERMC) /* header/trailer lines */
|
||||
|
||||
/* 16b, 18b, 36b DECtape constants */
|
||||
|
||||
@@ -249,8 +256,7 @@ int32 dtsa = 0; /* status A */
|
||||
int32 dtsb = 0; /* status B */
|
||||
int32 dtdb = 0; /* data buffer */
|
||||
int32 dt_ltime = 12; /* interline time */
|
||||
int32 dt_actime = 54000; /* accel time */
|
||||
int32 dt_dctime = 72000; /* decel time */
|
||||
int32 dt_dctime = 40000; /* decel time */
|
||||
int32 dt_substate = 0;
|
||||
int32 dt_log = 0;
|
||||
int32 dt_logblk = 0;
|
||||
@@ -306,7 +312,6 @@ REG dt_reg[] = {
|
||||
{ FLDATA (BEF, dtsb, DTB_V_BEF) },
|
||||
{ FLDATA (ERF, dtsb, DTB_V_ERF) },
|
||||
{ DRDATA (LTIME, dt_ltime, 31), REG_NZ },
|
||||
{ DRDATA (ACTIME, dt_actime, 31), REG_NZ },
|
||||
{ DRDATA (DCTIME, dt_dctime, 31), REG_NZ },
|
||||
{ ORDATA (SUBSTATE, dt_substate, 2) },
|
||||
{ ORDATA (LOG, dt_log, 4), REG_HIDDEN },
|
||||
@@ -441,7 +446,7 @@ if ((prev_mving | new_mving) == 0) return; /* stop to stop */
|
||||
if (new_mving & ~prev_mving) { /* start? */
|
||||
if (dt_setpos (uptr)) return; /* update pos */
|
||||
sim_cancel (uptr); /* stop current */
|
||||
sim_activate (uptr, dt_actime); /* schedule accel */
|
||||
sim_activate (uptr, dt_dctime - (dt_dctime >> 2)); /* sched accel */
|
||||
DTS_SETSTA (DTS_ACCF | new_dir, 0); /* state = accel */
|
||||
DTS_SET2ND (DTS_ATSF | new_dir, new_fnc); /* next = fnc */
|
||||
return; }
|
||||
@@ -467,7 +472,7 @@ if (prev_dir ^ new_dir) { /* dir chg? */
|
||||
if (prev_mot < DTS_ACCF) { /* not accel/at speed? */
|
||||
if (dt_setpos (uptr)) return; /* update pos */
|
||||
sim_cancel (uptr); /* cancel cur */
|
||||
sim_activate (uptr, dt_actime); /* schedule accel */
|
||||
sim_activate (uptr, dt_dctime - (dt_dctime >> 2)); /* sched accel */
|
||||
DTS_SETSTA (DTS_ACCF | new_dir, 0); /* state = accel */
|
||||
DTS_SET2ND (DTS_ATSF | new_dir, new_fnc); /* next = fnc */
|
||||
return; }
|
||||
@@ -588,11 +593,13 @@ case DTS_STOP: /* stop */
|
||||
delta = 0;
|
||||
break;
|
||||
case DTS_DECF: /* slowing */
|
||||
ulin = ut / (uint32) dt_ltime; udelt = dt_dctime / dt_ltime;
|
||||
ulin = ut / (uint32) dt_ltime;
|
||||
udelt = dt_dctime / dt_ltime;
|
||||
delta = ((ulin * udelt * 2) - (ulin * ulin)) / (2 * udelt);
|
||||
break;
|
||||
case DTS_ACCF: /* accelerating */
|
||||
ulin = ut / (uint32) dt_ltime; udelt = dt_actime / dt_ltime;
|
||||
ulin = ut / (uint32) dt_ltime;
|
||||
udelt = (dt_dctime - (dt_dctime >> 2)) / dt_ltime;
|
||||
delta = (ulin * ulin) / (2 * udelt);
|
||||
break;
|
||||
case DTS_ATSF: /* at speed */
|
||||
@@ -621,7 +628,7 @@ t_stat dt_svc (UNIT *uptr)
|
||||
int32 mot = DTS_GETMOT (uptr->STATE);
|
||||
int32 dir = mot & DTS_DIR;
|
||||
int32 fnc = DTS_GETFNC (uptr->STATE);
|
||||
int32 *bptr = uptr->filebuf;
|
||||
int32 *fbuf = uptr->filebuf;
|
||||
int32 unum = uptr - dt_dev.units;
|
||||
int32 blk, wrd, ma, relpos;
|
||||
uint32 ba;
|
||||
@@ -635,10 +642,10 @@ uint32 ba;
|
||||
|
||||
switch (mot) {
|
||||
case DTS_DECF: case DTS_DECR: /* decelerating */
|
||||
if (dt_setpos (uptr)) return SCPE_OK; /* update pos */
|
||||
if (dt_setpos (uptr)) return STOP_DTOFF; /* update pos */
|
||||
uptr->STATE = DTS_NXTSTA (uptr->STATE); /* advance state */
|
||||
if (uptr->STATE) /* not stopped? */
|
||||
sim_activate (uptr, dt_actime); /* must be reversing */
|
||||
sim_activate (uptr, dt_dctime - (dt_dctime >> 2)); /* reversing */
|
||||
return SCPE_OK;
|
||||
case DTS_ACCF: case DTS_ACCR: /* accelerating */
|
||||
dt_newfnc (uptr, DTS_NXTSTA (uptr->STATE)); /* adv state, sched */
|
||||
@@ -656,7 +663,7 @@ default: /* other */
|
||||
Off reel - detach unit (it must be deselected)
|
||||
*/
|
||||
|
||||
if (dt_setpos (uptr)) return SCPE_OK; /* update pos */
|
||||
if (dt_setpos (uptr)) return STOP_DTOFF; /* update pos */
|
||||
if (DT_QEZ (uptr)) { /* in end zone? */
|
||||
dt_seterr (uptr, DTB_END); /* end zone error */
|
||||
return SCPE_OK; }
|
||||
@@ -693,7 +700,7 @@ case FNC_READ: case FNC_RALL:
|
||||
(relpos < (DTU_LPERB (uptr) - DT_HTLIN))) {
|
||||
wrd = DT_LIN2WD (uptr->pos, uptr);
|
||||
ba = (blk * DTU_BSIZE (uptr)) + wrd;
|
||||
dtdb = bptr[ba]; /* get tape word */
|
||||
dtdb = fbuf[ba]; /* get tape word */
|
||||
dtsb = dtsb | DTB_DTF; } /* set flag */
|
||||
else {
|
||||
ma = (2 * DT_HTWRD) + DTU_BSIZE (uptr) - DT_CSMWD - 1;
|
||||
@@ -722,8 +729,8 @@ case FNC_WRIT: case FNC_WALL:
|
||||
(relpos < (DTU_LPERB (uptr) - DT_HTLIN))) {
|
||||
wrd = DT_LIN2WD (uptr->pos, uptr);
|
||||
ba = (blk * DTU_BSIZE (uptr)) + wrd;
|
||||
if (dir) bptr[ba] = dt_comobv (dtdb); /* get data word */
|
||||
else bptr[ba] = dtdb;
|
||||
if (dir) fbuf[ba] = dt_comobv (dtdb); /* get data word */
|
||||
else fbuf[ba] = dtdb;
|
||||
if (ba >= uptr->hwmark) uptr->hwmark = ba + 1;
|
||||
if (wrd == (dir? 0: DTU_BSIZE (uptr) - 1))
|
||||
dtsb = dtsb | DTB_BEF; /* end block */
|
||||
@@ -791,13 +798,13 @@ return dat;
|
||||
|
||||
int32 dt_csum (UNIT *uptr, int32 blk)
|
||||
{
|
||||
int32 *bptr = uptr->filebuf;
|
||||
int32 *fbuf = uptr->filebuf;
|
||||
int32 ba = blk * DTU_BSIZE (uptr);
|
||||
int32 i, csum, wrd;
|
||||
|
||||
csum = 0777777;
|
||||
for (i = 0; i < DTU_BSIZE (uptr); i++) { /* loop thru buf */
|
||||
wrd = bptr[ba + i]; /* get word */
|
||||
wrd = fbuf[ba + i]; /* get word */
|
||||
csum = csum + wrd; /* 1's comp add */
|
||||
if (csum > 0777777) csum = (csum + 1) & 0777777; }
|
||||
return (csum ^ 0777777); /* 1's comp res */
|
||||
@@ -868,7 +875,7 @@ t_stat dt_attach (UNIT *uptr, char *cptr)
|
||||
{
|
||||
uint16 pdp8b[D8_NBSIZE];
|
||||
uint16 pdp11b[D18_BSIZE];
|
||||
uint32 ba, sz, k, *bptr;
|
||||
uint32 ba, sz, k, *fbuf;
|
||||
int32 u = uptr - dt_dev.units;
|
||||
t_stat r;
|
||||
|
||||
@@ -891,7 +898,7 @@ uptr->filebuf = calloc (uptr->capac, sizeof (int32));
|
||||
if (uptr->filebuf == NULL) { /* can't alloc? */
|
||||
detach_unit (uptr);
|
||||
return SCPE_MEM; }
|
||||
bptr = uptr->filebuf; /* file buffer */
|
||||
fbuf = uptr->filebuf; /* file buffer */
|
||||
printf ("%s%d: ", sim_dname (&dt_dev), u);
|
||||
if (uptr->flags & UNIT_8FMT) printf ("12b format");
|
||||
else if (uptr->flags & UNIT_11FMT) printf ("16b format");
|
||||
@@ -903,9 +910,9 @@ if (uptr->flags & UNIT_8FMT) { /* 12b? */
|
||||
if (k == 0) break;
|
||||
for ( ; k < D8_NBSIZE; k++) pdp8b[k] = 0;
|
||||
for (k = 0; k < D8_NBSIZE; k = k + 3) { /* loop thru blk */
|
||||
bptr[ba] = ((uint32) (pdp8b[k] & 07777) << 6) |
|
||||
fbuf[ba] = ((uint32) (pdp8b[k] & 07777) << 6) |
|
||||
((uint32) (pdp8b[k + 1] >> 6) & 077);
|
||||
bptr[ba + 1] = ((uint32) (pdp8b[k + 1] & 077) << 12) |
|
||||
fbuf[ba + 1] = ((uint32) (pdp8b[k + 1] & 077) << 12) |
|
||||
(pdp8b[k + 2] & 07777);
|
||||
ba = ba + 2; } /* end blk loop */
|
||||
} /* end file loop */
|
||||
@@ -916,7 +923,7 @@ else if (uptr->flags & UNIT_11FMT) { /* 16b? */
|
||||
if (k == 0) break;
|
||||
for ( ; k < D18_BSIZE; k++) pdp11b[k] = 0;
|
||||
for (k = 0; k < D18_BSIZE; k++)
|
||||
bptr[ba++] = pdp11b[k]; }
|
||||
fbuf[ba++] = pdp11b[k]; }
|
||||
uptr->hwmark = ba; } /* end elif */
|
||||
else uptr->hwmark = fxread (uptr->filebuf, sizeof (int32),
|
||||
uptr->capac, uptr->fileref);
|
||||
@@ -939,27 +946,27 @@ t_stat dt_detach (UNIT* uptr)
|
||||
{
|
||||
uint16 pdp8b[D8_NBSIZE];
|
||||
uint16 pdp11b[D18_BSIZE];
|
||||
uint32 ba, k, *bptr;
|
||||
uint32 ba, k, *fbuf;
|
||||
int32 u = uptr - dt_dev.units;
|
||||
|
||||
if (!(uptr->flags & UNIT_ATT)) return SCPE_OK;
|
||||
if (!(uptr->flags & UNIT_ATT)) return SCPE_OK; /* attached? */
|
||||
if (sim_is_active (uptr)) {
|
||||
sim_cancel (uptr);
|
||||
if ((u == DTA_GETUNIT (dtsa)) && (dtsa & DTA_STSTP)) {
|
||||
dtsb = dtsb | DTB_ERF | DTB_SEL | DTB_DTF;
|
||||
DT_UPDINT; }
|
||||
uptr->STATE = uptr->pos = 0; }
|
||||
bptr = uptr->filebuf; /* file buffer */
|
||||
fbuf = uptr->filebuf; /* file buffer */
|
||||
if (uptr->hwmark && ((uptr->flags & UNIT_RO) == 0)) { /* any data? */
|
||||
printf ("%s%d: writing buffer to file\n", sim_dname (&dt_dev), u);
|
||||
rewind (uptr->fileref); /* start of file */
|
||||
if (uptr->flags & UNIT_8FMT) { /* 12b? */
|
||||
for (ba = 0; ba < uptr->hwmark; ) { /* loop thru file */
|
||||
for (k = 0; k < D8_NBSIZE; k = k + 3) { /* loop blk */
|
||||
pdp8b[k] = (bptr[ba] >> 6) & 07777;
|
||||
pdp8b[k + 1] = ((bptr[ba] & 077) << 6) |
|
||||
((bptr[ba + 1] >> 12) & 077);
|
||||
pdp8b[k + 2] = bptr[ba + 1] & 07777;
|
||||
pdp8b[k] = (fbuf[ba] >> 6) & 07777;
|
||||
pdp8b[k + 1] = ((fbuf[ba] & 077) << 6) |
|
||||
((fbuf[ba + 1] >> 12) & 077);
|
||||
pdp8b[k + 2] = fbuf[ba + 1] & 07777;
|
||||
ba = ba + 2; } /* end loop blk */
|
||||
fxwrite (pdp8b, sizeof (int16), D8_NBSIZE, uptr->fileref);
|
||||
if (ferror (uptr->fileref)) break; } /* end loop file */
|
||||
@@ -967,7 +974,7 @@ if (uptr->hwmark && ((uptr->flags & UNIT_RO) == 0)) { /* any data? */
|
||||
else if (uptr->flags & UNIT_11FMT) { /* 16b? */
|
||||
for (ba = 0; ba < uptr->hwmark; ) { /* loop thru file */
|
||||
for (k = 0; k < D18_BSIZE; k++) /* loop blk */
|
||||
pdp11b[k] = bptr[ba++] & 0177777;
|
||||
pdp11b[k] = fbuf[ba++] & 0177777;
|
||||
fxwrite (pdp11b, sizeof (int16), D18_BSIZE, uptr->fileref);
|
||||
if (ferror (uptr->fileref)) break; } /* end loop file */
|
||||
} /* end if 16b */
|
||||
|
||||
@@ -143,27 +143,27 @@ if (cpls & CPLS_LPT) { /* completion pulse? */
|
||||
sbs = sbs | SB_RQ; /* req seq break */
|
||||
if (lpt_spc) { /* space? */
|
||||
iosta = iosta | IOS_SPC; /* set flag */
|
||||
if ((lpt_unit.flags & UNIT_ATT) == 0) /* attached? */
|
||||
if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
|
||||
return IORETURN (lpt_stopioe, SCPE_UNATT);
|
||||
fputs (lpt_cc[lpt_spc & 07], lpt_unit.fileref); /* print cctl */
|
||||
if (ferror (lpt_unit.fileref)) { /* error? */
|
||||
fputs (lpt_cc[lpt_spc & 07], uptr->fileref); /* print cctl */
|
||||
if (ferror (uptr->fileref)) { /* error? */
|
||||
perror ("LPT I/O error");
|
||||
clearerr (lpt_unit.fileref);
|
||||
clearerr (uptr->fileref);
|
||||
return SCPE_IOERR; }
|
||||
lpt_ovrpr = 0; } /* dont overprint */
|
||||
else { iosta = iosta | IOS_PNT; /* print */
|
||||
if ((lpt_unit.flags & UNIT_ATT) == 0) /* attached? */
|
||||
if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
|
||||
return IORETURN (lpt_stopioe, SCPE_UNATT);
|
||||
if (lpt_ovrpr) fputc ('\r', lpt_unit.fileref); /* overprint? */
|
||||
fputs (lpt_buf, lpt_unit.fileref); /* print buffer */
|
||||
if (ferror (lpt_unit.fileref)) { /* test error */
|
||||
if (lpt_ovrpr) fputc ('\r', uptr->fileref); /* overprint? */
|
||||
fputs (lpt_buf, uptr->fileref); /* print buffer */
|
||||
if (ferror (uptr->fileref)) { /* test error */
|
||||
perror ("LPT I/O error");
|
||||
clearerr (lpt_unit.fileref);
|
||||
clearerr (uptr->fileref);
|
||||
return SCPE_IOERR; }
|
||||
lpt_bptr = 0;
|
||||
for (i = 0; i <= LPT_BSIZE; i++) lpt_buf[i] = 0; /* clear buffer */
|
||||
lpt_ovrpr = 1; } /* set overprint */
|
||||
lpt_unit.pos = ftell (lpt_unit.fileref); /* update position */
|
||||
lpt_unit.pos = ftell (uptr->fileref); /* update position */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
|
||||
@@ -28,6 +28,7 @@
|
||||
tti keyboard
|
||||
tto teleprinter
|
||||
|
||||
29-Oct-03 RMS Added PTR FIODEC-to-ASCII translation (from Phil Budne)
|
||||
07-Sep-03 RMS Changed ioc to ios
|
||||
30-Aug-03 RMS Revised PTR to conform to Maintenance Manual;
|
||||
added deadlock prevention on errors
|
||||
@@ -42,10 +43,14 @@
|
||||
07-Sep-01 RMS Moved function prototypes
|
||||
10-Jun-01 RMS Fixed comment
|
||||
30-Oct-00 RMS Standardized device naming
|
||||
|
||||
Note: PTP timeout must be >10X faster that TTY output timeout for Macro
|
||||
to work correctly!
|
||||
*/
|
||||
|
||||
#include "pdp1_defs.h"
|
||||
|
||||
#define FIODEC_STOP 013 /* stop code */
|
||||
#define FIODEC_UC 074
|
||||
#define FIODEC_LC 072
|
||||
#define UC_V 6 /* upper case */
|
||||
@@ -55,10 +60,16 @@
|
||||
#define TT_WIDTH 077
|
||||
#define TTI 0
|
||||
#define TTO 1
|
||||
#define UNIT_V_ASCII (UNIT_V_UF + 0) /* ASCII/binary mode */
|
||||
#define UNIT_ASCII (1 << UNIT_V_ASCII)
|
||||
#define PTR_LEADER 20 /* ASCII leader chars */
|
||||
|
||||
int32 ptr_state = 0;
|
||||
int32 ptr_wait = 0;
|
||||
int32 ptr_stopioe = 0;
|
||||
int32 ptr_uc = 0; /* upper/lower case */
|
||||
int32 ptr_hold = 0; /* holding buffer */
|
||||
int32 ptr_leader = PTR_LEADER; /* leader count */
|
||||
int32 ptp_stopioe = 0;
|
||||
int32 tti_hold = 0; /* tti hold buf */
|
||||
int32 tty_buf = 0; /* tty buffer */
|
||||
@@ -68,6 +79,7 @@ extern int32 sbs, ios, ioh, cpls, iosta;
|
||||
extern int32 PF, IO, PC, TA;
|
||||
extern int32 M[];
|
||||
|
||||
int ptr_get_ascii (UNIT *uptr);
|
||||
t_stat ptr_svc (UNIT *uptr);
|
||||
t_stat ptp_svc (UNIT *uptr);
|
||||
t_stat tti_svc (UNIT *uptr);
|
||||
@@ -76,6 +88,7 @@ t_stat ptr_reset (DEVICE *dptr);
|
||||
t_stat ptp_reset (DEVICE *dptr);
|
||||
t_stat tty_reset (DEVICE *dptr);
|
||||
t_stat ptr_boot (int32 unitno, DEVICE *dptr);
|
||||
t_stat ptr_attach (UNIT *uptr, char *cptr);
|
||||
|
||||
/* Character translation tables */
|
||||
|
||||
@@ -128,20 +141,28 @@ UNIT ptr_unit = {
|
||||
|
||||
REG ptr_reg[] = {
|
||||
{ ORDATA (BUF, ptr_unit.buf, 18) },
|
||||
{ FLDATA (UC, ptr_uc, UC_V) },
|
||||
{ FLDATA (DONE, iosta, IOS_V_PTR) },
|
||||
{ FLDATA (RPLS, cpls, CPLS_V_PTR) },
|
||||
{ ORDATA (HOLD, ptr_hold, 9), REG_HRO },
|
||||
{ ORDATA (STATE, ptr_state, 5), REG_HRO },
|
||||
{ FLDATA (WAIT, ptr_wait, 0), REG_HRO },
|
||||
{ DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
|
||||
{ DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
|
||||
{ DRDATA (LEADER, ptr_leader, 6), REG_HRO },
|
||||
{ FLDATA (STOP_IOE, ptr_stopioe, 0) },
|
||||
{ NULL } };
|
||||
|
||||
MTAB ptr_mod[] = {
|
||||
{ UNIT_ASCII, UNIT_ASCII, "ASCII", "ASCII", NULL },
|
||||
{ UNIT_ASCII, 0, "FIODEC", "FIODEC", NULL },
|
||||
{ 0 } };
|
||||
|
||||
DEVICE ptr_dev = {
|
||||
"PTR", &ptr_unit, ptr_reg, NULL,
|
||||
"PTR", &ptr_unit, ptr_reg, ptr_mod,
|
||||
1, 10, 31, 1, 8, 8,
|
||||
NULL, NULL, &ptr_reset,
|
||||
&ptr_boot, NULL, NULL,
|
||||
&ptr_boot, &ptr_attach, NULL,
|
||||
NULL, 0 };
|
||||
|
||||
/* PTP data structures
|
||||
@@ -179,7 +200,7 @@ DEVICE ptp_dev = {
|
||||
|
||||
UNIT tty_unit[] = {
|
||||
{ UDATA (&tti_svc, 0, 0), KBD_POLL_WAIT },
|
||||
{ UDATA (&tto_svc, 0, 0), SERIAL_OUT_WAIT } };
|
||||
{ UDATA (&tto_svc, 0, 0), SERIAL_OUT_WAIT * 10 } };
|
||||
|
||||
REG tty_reg[] = {
|
||||
{ ORDATA (BUF, tty_buf, 6) },
|
||||
@@ -240,35 +261,74 @@ t_stat ptr_svc (UNIT *uptr)
|
||||
{
|
||||
int32 temp;
|
||||
|
||||
if ((ptr_unit.flags & UNIT_ATT) == 0) { /* attached? */
|
||||
if ((uptr->flags & UNIT_ATT) == 0) { /* attached? */
|
||||
if (ptr_wait) ptr_wait = ioh = 0; /* if wait, clr ioh */
|
||||
if ((cpls & CPLS_PTR) || ptr_stopioe) return SCPE_UNATT;
|
||||
return SCPE_OK; }
|
||||
if ((temp = getc (ptr_unit.fileref)) == EOF) { /* end of file? */
|
||||
if ((uptr->flags & UNIT_ASCII) && (ptr_state == 0)) /* ASCII mode, alpha read? */
|
||||
temp = ptr_get_ascii (uptr); /* get processed char */
|
||||
else if ((temp = getc (uptr->fileref)) != EOF) /* no, get raw char */
|
||||
uptr->pos = uptr->pos + 1; /* if not eof, count */
|
||||
if (temp == EOF) { /* end of file? */
|
||||
if (ptr_wait) ptr_wait = ioh = 0; /* if wait, clr ioh */
|
||||
if (feof (ptr_unit.fileref)) {
|
||||
if (feof (uptr->fileref)) {
|
||||
if ((cpls & CPLS_PTR) || ptr_stopioe) printf ("PTR end of file\n");
|
||||
else return SCPE_OK; }
|
||||
else perror ("PTR I/O error");
|
||||
clearerr (ptr_unit.fileref);
|
||||
clearerr (uptr->fileref);
|
||||
return SCPE_IOERR; }
|
||||
ptr_unit.pos = ptr_unit.pos + 1;
|
||||
if (ptr_state == 0) ptr_unit.buf = temp & 0377; /* alpha */
|
||||
if (ptr_state == 0) uptr->buf = temp & 0377; /* alpha */
|
||||
else if (temp & 0200) { /* binary */
|
||||
ptr_state = ptr_state - 6;
|
||||
ptr_unit.buf = ptr_unit.buf | ((temp & 077) << ptr_state); }
|
||||
uptr->buf = uptr->buf | ((temp & 077) << ptr_state); }
|
||||
if (ptr_state == 0) { /* done? */
|
||||
if (cpls & CPLS_PTR) { /* completion pulse? */
|
||||
iosta = iosta & ~IOS_PTR; /* clear flag */
|
||||
IO = ptr_unit.buf; /* fill IO */
|
||||
IO = uptr->buf; /* fill IO */
|
||||
ios = 1; /* restart */
|
||||
cpls = cpls & ~CPLS_PTR; }
|
||||
else { /* no, interrupt */
|
||||
iosta = iosta | IOS_PTR; /* set flag */
|
||||
sbs = sbs | SB_RQ; } } /* req seq break */
|
||||
else sim_activate (&ptr_unit, ptr_unit.wait); /* get next char */
|
||||
else sim_activate (uptr, uptr->wait); /* get next char */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Read next ASCII character */
|
||||
|
||||
int ptr_get_ascii (UNIT *uptr)
|
||||
{
|
||||
int c;
|
||||
int32 in;
|
||||
|
||||
if (ptr_leader > 0) { /* leader? */
|
||||
ptr_leader = ptr_leader - 1; /* count down */
|
||||
return 0; }
|
||||
if (ptr_hold & CW) { /* char waiting? */
|
||||
in = ptr_hold & TT_WIDTH; /* return char */
|
||||
ptr_hold = 0; } /* not waiting */
|
||||
else { for (;;) { /* until valid char */
|
||||
if ((c = getc (uptr->fileref)) == EOF) /* get next char, EOF? */
|
||||
return FIODEC_STOP; /* return STOP */
|
||||
uptr->pos = uptr->pos + 1; /* count char */
|
||||
c = c & 0177; /* cut to 7b */
|
||||
if (c == '\n') c = '\r'; /* NL -> CR */
|
||||
else if (c == '\r') continue; /* ignore CR */
|
||||
in = ascii_to_fiodec[c]; /* convert char */
|
||||
if ((in == 0) && (c != ' ')) continue; /* ignore unknowns */
|
||||
if ((in & BOTH) || ((in & UC) == ptr_uc)) /* case match? */
|
||||
in = in & TT_WIDTH; /* cut to 6b */
|
||||
else { /* no, case shift */
|
||||
ptr_hold = in | CW; /* set char waiting */
|
||||
ptr_uc = in & UC; /* set case */
|
||||
in = ptr_uc? FIODEC_UC: FIODEC_LC; } /* return case */
|
||||
break; }
|
||||
} /* end else */
|
||||
in = in * 010040201; /* even parity from */
|
||||
in = in | 027555555400; /* HACKMEM 167 */
|
||||
in = in % (9 << 7);
|
||||
return in & 0377;
|
||||
}
|
||||
|
||||
/* Reset routine */
|
||||
|
||||
@@ -276,6 +336,8 @@ t_stat ptr_reset (DEVICE *dptr)
|
||||
{
|
||||
ptr_state = 0; /* clear state */
|
||||
ptr_wait = 0;
|
||||
ptr_hold = 0;
|
||||
ptr_uc = 0;
|
||||
ptr_unit.buf = 0;
|
||||
cpls = cpls & ~CPLS_PTR;
|
||||
iosta = iosta & ~IOS_PTR; /* clear flag */
|
||||
@@ -283,6 +345,14 @@ sim_cancel (&ptr_unit); /* deactivate unit */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Attach routine */
|
||||
|
||||
t_stat ptr_attach (UNIT *uptr, char *cptr)
|
||||
{
|
||||
ptr_leader = PTR_LEADER; /* set up leader */
|
||||
return attach_unit (uptr, cptr);
|
||||
}
|
||||
|
||||
/* Bootstrap routine */
|
||||
|
||||
int32 ptr_getw (UNIT *uptr)
|
||||
@@ -341,13 +411,13 @@ if (cpls & CPLS_PTP) { /* completion pulse? */
|
||||
cpls = cpls & ~CPLS_PTP; }
|
||||
iosta = iosta | IOS_PTP; /* set flag */
|
||||
sbs = sbs | SB_RQ; /* req seq break */
|
||||
if ((ptp_unit.flags & UNIT_ATT) == 0) /* not attached? */
|
||||
if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */
|
||||
return IORETURN (ptp_stopioe, SCPE_UNATT);
|
||||
if (putc (ptp_unit.buf, ptp_unit.fileref) == EOF) { /* I/O error? */
|
||||
if (putc (uptr->buf, uptr->fileref) == EOF) { /* I/O error? */
|
||||
perror ("PTP I/O error");
|
||||
clearerr (ptp_unit.fileref);
|
||||
clearerr (uptr->fileref);
|
||||
return SCPE_IOERR; }
|
||||
ptp_unit.pos = ptp_unit.pos + 1;
|
||||
uptr->pos = uptr->pos + 1;
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
@@ -417,24 +487,22 @@ return SCPE_OK;
|
||||
|
||||
t_stat tto_svc (UNIT *uptr)
|
||||
{
|
||||
int32 out;
|
||||
int32 c;
|
||||
t_stat r;
|
||||
|
||||
if (tty_buf == FIODEC_UC) tty_uc = UC; /* upper case? */
|
||||
else if (tty_buf == FIODEC_LC) tty_uc = 0; /* lower case? */
|
||||
else { c = fiodec_to_ascii[tty_buf | tty_uc]; /* translate */
|
||||
if (c && ((r = sim_putchar_s (c)) != SCPE_OK)) {/* output; error? */
|
||||
sim_activate (uptr, uptr->wait); /* retry */
|
||||
return ((r == SCPE_STALL)? SCPE_OK: r); } }
|
||||
if (cpls & CPLS_TTO) { /* completion pulse? */
|
||||
ios = 1; /* restart */
|
||||
cpls = cpls & ~CPLS_TTO; }
|
||||
iosta = iosta | IOS_TTO; /* set flag */
|
||||
sbs = sbs | SB_RQ; /* req seq break */
|
||||
if (tty_buf == FIODEC_UC) { /* upper case? */
|
||||
tty_uc = UC;
|
||||
return SCPE_OK; }
|
||||
if (tty_buf == FIODEC_LC) { /* lower case? */
|
||||
tty_uc = 0;
|
||||
return SCPE_OK; }
|
||||
out = fiodec_to_ascii[tty_buf | tty_uc]; /* translate */
|
||||
if (out == 0) return SCPE_OK; /* no translation? */
|
||||
sim_putchar (out);
|
||||
uptr->pos = uptr->pos + 1;
|
||||
if (out == '\r') { /* cr? add lf */
|
||||
if (c == '\r') { /* cr? add lf */
|
||||
sim_putchar ('\n');
|
||||
uptr->pos = uptr->pos + 1; }
|
||||
return SCPE_OK;
|
||||
|
||||
@@ -23,6 +23,8 @@
|
||||
be used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from Robert M Supnik.
|
||||
|
||||
08-Dec-03 RMS Added parallel drum support, drum mnemonics
|
||||
18-Oct-03 RMS Added DECtape off reel message
|
||||
01-Sep-03 RMS Added support for loading in multiple fields
|
||||
22-Jul-03 RMS Updated for "hardware" RIM loader
|
||||
05-Dec-02 RMS Added drum support
|
||||
@@ -48,6 +50,7 @@ extern DEVICE tty_dev;
|
||||
extern DEVICE lpt_dev;
|
||||
extern DEVICE dt_dev;
|
||||
extern DEVICE drm_dev;
|
||||
extern DEVICE drp_dev;
|
||||
extern UNIT cpu_unit;
|
||||
extern REG cpu_reg[];
|
||||
extern int32 M[];
|
||||
@@ -80,6 +83,7 @@ DEVICE *sim_devices[] = {
|
||||
&lpt_dev,
|
||||
&dt_dev,
|
||||
&drm_dev,
|
||||
&drp_dev,
|
||||
NULL };
|
||||
|
||||
const char *sim_stop_messages[] = {
|
||||
@@ -89,11 +93,12 @@ const char *sim_stop_messages[] = {
|
||||
"Breakpoint",
|
||||
"Nested XCT's",
|
||||
"Nested indirect addresses",
|
||||
"Infinite I/O wait state" };
|
||||
"Infinite I/O wait state",
|
||||
"DECtape off reel" };
|
||||
|
||||
/* Binary loader - supports both RIM format and Macro block format */
|
||||
|
||||
int32 getw (FILE *inf)
|
||||
int32 pdp1_getw (FILE *inf)
|
||||
{
|
||||
int32 i, tmp, word;
|
||||
|
||||
@@ -111,11 +116,11 @@ t_stat rim_load (FILE *inf, int32 fld)
|
||||
int32 origin, val;
|
||||
|
||||
for (;;) {
|
||||
if ((val = getw (inf)) < 0) return SCPE_FMT;
|
||||
if ((val = pdp1_getw (inf)) < 0) return SCPE_FMT;
|
||||
if (((val & 0760000) == OP_DIO) || /* DIO? */
|
||||
((val & 0760000) == OP_DAC)) { /* hack - Macro1 err */
|
||||
origin = val & DAMASK;
|
||||
if ((val = getw (inf)) < 0) return SCPE_FMT;
|
||||
if ((val = pdp1_getw (inf)) < 0) return SCPE_FMT;
|
||||
M[fld | origin] = val; }
|
||||
else if ((val & 0760000) == OP_JMP) { /* JMP? */
|
||||
PC = fld | (val & DAMASK);
|
||||
@@ -130,23 +135,23 @@ t_stat blk_load (FILE *inf, int32 fld)
|
||||
int32 val, start, count, csum;
|
||||
|
||||
for (;;) {
|
||||
if ((val = getw (inf)) < 0) return SCPE_FMT; /* get word, EOF? */
|
||||
if ((val = pdp1_getw (inf)) < 0) return SCPE_FMT; /* get word, EOF? */
|
||||
if ((val & 0760000) == OP_DIO) { /* DIO? */
|
||||
csum = val; /* init checksum */
|
||||
start = val & DAMASK; /* starting addr */
|
||||
if ((val = getw (inf)) < 0) return SCPE_FMT;
|
||||
if ((val = pdp1_getw (inf)) < 0) return SCPE_FMT;
|
||||
if ((val & 0760000) != OP_DIO) return SCPE_FMT;
|
||||
csum = csum + val;
|
||||
if (csum > 0777777) csum = (csum + 1) & 0777777;
|
||||
count = (val & DAMASK) - start + 1; /* block count */
|
||||
if (count <= 0) return SCPE_FMT;
|
||||
while (count--) { /* loop on data */
|
||||
if ((val = getw (inf)) < 0) return SCPE_FMT;
|
||||
if ((val = pdp1_getw (inf)) < 0) return SCPE_FMT;
|
||||
csum = csum + val;
|
||||
if (csum > 0777777) csum = (csum + 1) & 0777777;
|
||||
M[fld | start] = val;
|
||||
start = (start + 1) & DAMASK; }
|
||||
if ((val = getw (inf)) < 0) return SCPE_FMT;
|
||||
if ((val = pdp1_getw (inf)) < 0) return SCPE_FMT;
|
||||
if (val != csum) return SCPE_CSUM; }
|
||||
else if ((val & 0760000) == OP_JMP) { /* JMP? */
|
||||
PC = fld | (val & DAMASK);
|
||||
@@ -213,6 +218,9 @@ static const char *opcode[] = {
|
||||
"LSM", "ESM", "CBS",
|
||||
"LEM", "EEM", "CKS",
|
||||
"MSE", "MLC", "MRD", "MWR", "MRS",
|
||||
"DIA", "DBA", "DWC", "DRA", "DCL",
|
||||
"DRD", "DWR", "DBL", "DCN",
|
||||
"DTD", "DSE", "DSP",
|
||||
|
||||
"SKP", "SKP I", "CLO",
|
||||
"SFT", "LAW", "OPR",
|
||||
@@ -265,6 +273,9 @@ static const int32 opc_val[] = {
|
||||
0720054+I_NPN, 0720055+I_NPN, 0720056+I_NPN,
|
||||
0720074+I_NPN, 0724074+I_NPN, 0720033+I_NPN,
|
||||
0720301+I_NPN, 0720401+I_NPN, 0720501+I_NPN, 0720601+I_NPN, 0720701+I_NPN,
|
||||
0720061+I_NPN, 0722061+I_NPN, 0720062+I_NPN, 0722062+I_NPN, 0720063+I_NPN,
|
||||
0720161+I_NPN, 0721161+I_NPN, 0720162+I_NPN, 0721162+I_NPN,
|
||||
0720163+I_NPN, 0720164+I_NPN, 0721164+I_NPN,
|
||||
|
||||
0640000+I_NPN, 0650000+I_NPN, 0651600+I_NPN,
|
||||
0660000+I_NPN, 0700000+I_LAW, 0760000+I_NPN,
|
||||
|
||||
Reference in New Issue
Block a user