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Mark Pizzolato 2012-04-10 06:17:00 -07:00
parent 518d268bea
commit 1e319afd68
31 changed files with 1158 additions and 943 deletions
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10
0readmeAsynchIO.txt
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@ -89,7 +89,7 @@ example there now exists the routines:
t_stat sim_tape_rdrecf_a (UNIT *uptr, uint8 *buf, t_mtrlnt *bc, t_mtrlnt max, TAPE_PCALLBACK callback);
The Purpose of the callback function is to record the I/O completion status
and then to schedule the activation of the unit.
and then to schedule the activation of the unit.
Considerations:
Avoiding multiple concurrent users of the unit structure. While asynch
@ -108,7 +108,13 @@ The callback routine must save the I/O completion status in a place
which the next invocation of the unit service routine will reference
and act on it. This allows device code to return error conditions
back to scp in a consistent way without regard to how the callback
routine (and the actual I/O) may have been executed.
routine (and the actual I/O) may have been executed. When the callback
routine is called, it will already be on the simulator event queue with
an event time which was specified when the unit was attached or via a
call to sim_disk_set_async. If no value has been specified then it
will have been scheduled with a delay time of 0. If a different event
firing time is desired, then the callback completion routine should
call sim_activate_abs to schedule the event at the appropriate time.
Required change in device coding.
Devices which wish to leverage the benefits of asynch I/O must rearrange

26
0readme_39.txt
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@ -2,7 +2,8 @@ Notes For V3.9
The makefile now works for all *nix platforms and with cygwin and MinGW32
on Windows.
on Windows. It will automatically detect the availability of libpcap
components and build network capable simulators if they are available.
1. New Features
@ -14,15 +15,32 @@ on Windows.
- added *nix READLINE support (Mark Pizzolato)
- added "SHOW SHOW" and "SHOW <dev> SHOW" commands (Mark Pizzolato)
- added support for BREAK key on Windows (Mark Pizzolato)
- added ethernet support (Mark Pizzolato)
windows host <-> simulator NIC sharing
native tap interfaces on BSD, Linux and OSX
vde (Virtual Distributed Ethernet) networking
Large Send Offload support
UDP and TCP Checksum offload support
dynamic libpcap loading on *nix platforms
1.1.2 PDP-8
- floating point processor is now enabled
1.1.3 IA64 VMS Ethernet Support
1.1.3 HP2100 (Dave Bryan)
- added support for 12821A HP-IB disk controller,
7906H/20H/25H disks
1.1.4 PDP11 and VAX (Mark Pizzolato)
- Added DELQA-Plus device.
1.1.5 IA64 VMS Ethernet Support
- Identified compiler version issues and added IA64 support (Matt Burke)
1.1.6 Visual Studio Projects (Mark Pizzolato)
2. Bugs Fixed

25
HP2100/hp2100_bugfixes.txt
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@ -1,6 +1,6 @@
HP 2100 SIMULATOR BUG FIX WRITEUPS
==================================
Last update: 2012-03-23
Last update: 2012-03-25
1. PROBLEM: Booting from magnetic tape reports "HALT instruction, P: 77756
@ -6257,3 +6257,26 @@
16-bit dimension count.
STATUS: Fixed in version 3.9-0.
246. PROBLEM: SHOW MTC SHOW lists the FORMAT modifier twice.
VERSION: 3.8-1
OBSERVATION: Entering the planned SHOW MTC SHOW command results in the
following display:
sim> SHOW MTC SHOW
sh{ow} MTC FORMAT, SC, DEVNO
sh{ow} MTCn FORMAT
FORMAT is listed both as a device and as a unit modifier.
CAUSE: The FORMAT entry in the modifier table contains both the MTAB_VDV
and the MTAB_VUN flags.
RESOLUTION: Remove the redundant MTAB_VUN flag from the "mtc_mod" array
(hp2100_mt.c).
STATUS: Fixed in version 3.9-0.

664
HP2100/hp2100_di.c
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50
HP2100/hp2100_di.h
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@ -1,4 +1,4 @@
/* hp2100_di.h: HP 12821A HP-IB Disc Interface simulator common definitions
/* hp2100_di.h: HP 12821A HP-IB Disc Interface simulator definitions
Copyright (c) 2010-2012, J. David Bryan
@ -41,8 +41,8 @@
only the DA device is implemented. However, as the 12821A diagnostic
requires two cards to test I/O fully, a dummy DC device is provided by
the DA simulator. It is enabled only when the DA card is configured for
diagnostic mode. This dummy device may be removed when either the DC or
MA device is implemented.
diagnostic mode. This dummy device should be removed when either the DC
or MA device is implemented.
*/
@ -51,19 +51,21 @@
#define FIFO_SIZE 16 /* FIFO depth */
typedef enum { da, dc, ma, /* card IDs */
first_card = da, /* first card ID */
last_card = ma, /* last card ID */
card_count } CARD_ID; /* count of card IDs */
typedef enum {
da, dc, ma, /* card IDs */
first_card = da, /* first card ID */
last_card = ma, /* last card ID */
card_count /* count of card IDs */
} CARD_ID;
/* Device flags and accessors (leaves space for disc/tape flags) */
/* Device flags and accessors (bits 7-0 are reserved for disc/tape flags) */
#define DEV_V_BUSADR (DEV_V_UF + 8) /* bits 10-8: HP-IB address */
#define DEV_V_BUSADR (DEV_V_UF + 8) /* bits 10-8: interface HP-IB address */
#define DEV_V_DIAG (DEV_V_UF + 11) /* bit 11: diagnostic mode */
#define DEV_V_W1 (DEV_V_UF + 12) /* bit 12: DCPC pacing jumper */
#define DEV_M_BUSADR 7 /* bus address mask */
#define DEV_M_BUSADR 07 /* bus address mask */
#define DEV_BUSADR (DEV_M_BUSADR << DEV_V_BUSADR)
#define DEV_DIAG (1 << DEV_V_DIAG)
@ -73,11 +75,11 @@ typedef enum { da, dc, ma, /* card IDs */
#define SET_DIADR(f) (((f) & DEV_M_BUSADR) << DEV_V_BUSADR)
/* Unit flags and accessors (leaves space for disc/tape flags) */
/* Unit flags and accessors (bits 7-0 are reserved for disc/tape flags) */
#define UNIT_V_BUSADR (UNIT_V_UF + 8) /* bits 10-8: HP-IB address */
#define UNIT_V_BUSADR (UNIT_V_UF + 8) /* bits 10-8: unit HP-IB address */
#define UNIT_M_BUSADR 7 /* bus address mask */
#define UNIT_M_BUSADR 07 /* bus address mask */
#define UNIT_BUSADR (UNIT_M_BUSADR << UNIT_V_BUSADR)
@ -95,10 +97,10 @@ typedef enum { da, dc, ma, /* card IDs */
#define DEB_SERV (1 << 5) /* unit service scheduling calls */
/* HP-IB control state bit flags.
/* HP-IB control line state bit flags.
NOTE that these flags align with the corresponding flags in the DI status
register, so don't change the order!
register, so don't change the numerical values!
*/
#define BUS_ATN 0001 /* attention */
@ -128,7 +130,7 @@ typedef enum { da, dc, ma, /* card IDs */
#define BUS_UCG 0020 /* universal command group */
#define BUS_ACG 0000 /* addressed command group */
#define BUS_UNADDRESS 0037 /* unlisten and untalk */
#define BUS_UNADDRESS 0037 /* unlisten and untalk addresses */
#define PPR(a) (uint8) (1 << (7 - (a))) /* parallel poll response */
@ -146,8 +148,10 @@ typedef enum { da, dc, ma, /* card IDs */
#define SET_LOWER(b) (b)
#define SET_BOTH(b) (SET_UPPER (b) | SET_LOWER (b))
typedef enum { upper, /* byte selector */
lower } SELECTOR;
typedef enum {
upper, /* upper byte selected */
lower /* lower byte selected */
} SELECTOR;
/* Per-card state variables */
@ -170,9 +174,9 @@ typedef struct {
uint32 fifo_count; /* FIFO occupancy counter */
REG *fifo_reg; /* FIFO register pointer */
uint32 acceptors; /* unit bitmap of bus acceptors */
uint32 listeners; /* unit bitmap of bus listeners */
uint32 talker; /* unit bitmap of bus talker */
uint32 acceptors; /* unit bitmap of the bus acceptors */
uint32 listeners; /* unit bitmap of the bus listeners */
uint32 talker; /* unit bitmap of the bus talker */
uint8 bus_cntl; /* HP-IB bus control state (ATN, EOI, etc.) */
uint8 poll_response; /* address bitmap of parallel poll responses */
@ -183,7 +187,7 @@ typedef struct {
/* Disc interface VM global register definitions.
Include these definitions before any device-specific registers.
These definitions should be included before any device-specific registers.
Implementation notes:
@ -222,7 +226,7 @@ typedef struct {
/* Disc interface VM global modifier definitions.
Include these definitions before any device-specific modifiers.
These definitions should be included before any device-specific modifiers.
*/
#define DI_MODS(dev) \

482
HP2100/hp2100_di_da.c
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213
HP2100/hp2100_diag.txt
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@ -1,6 +1,6 @@
SIMH/HP 21XX DIAGNOSTICS PERFORMANCE
====================================
Last update: 2012-02-20
Last update: 2012-03-30
The HP 24396 diagnostic suite has been run against the SIMH HP 21xx simulation.
@ -70,7 +70,7 @@ The results of the diagnostic runs are summarized below:
103116 12967 Synchronous Interface 1438 - No simulation
103017 12966 Asynchronous Data Set 1519 3.8-0 Passed
103121 12968 Asynchronous Comm. Interface 1602 - No simulation
103024 12821 ICD Disc Interface 1928 3.8-2 Passed
103024 12821 ICD Disc Interface 1928 3.9-0 Passed
104000 2600 Keyboard Display Terminal 1615 - No simulation
104003 Teleprinter 1509 3.2-3 Partial
@ -128,8 +128,9 @@ offline diagnostics:
Part Number Diagnostic Name Code Op. Sys. Code Vers. Result
----------- ------------------------------- ---- -------- ---- ----- ----------
12824-16002 Vector Instruction Set Firmware 2026 RTE-IVB 5010 3.8-0 Passed
91711-12032 ICD/MAC Disc Diagnostic 2201 RTE-IVB 5010 3.8-2 Partial
91711-12032 ICD/MAC Disc Diagnostic 2201 RTE-IVB 5010 3.9-0 Partial
92067-16013 Extended Memory Area Firmware 1805 RTE-IVB 5010 3.8-0 Passed
12829-16006 Vector Instruction Set Firmware 2226 RTE-6/VM 6200 3.8-0 Passed
92084-16423 Virtual Memory Area Firmware 2121 RTE-6/VM 6200 3.8-0 Passed
92835-16006 SIGNAL/1000 Firmware Diagnostic 2040 RTE-6/VM 6200 3.8-0 Passed
@ -3527,7 +3528,9 @@ BINARY FILE: 91711-12032 Rev. 2201
HOST SYSTEM: RTE-IVB Rev. 5010
CONFIGURATION: sim> set DS0 FORMAT
CONFIGURATION: sim> set DA1 7906H
sim> set DA1 FORMAT
sim> attach DA1 scratch.U1.7906H.disc
sim> go
TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
@ -3540,12 +3543,12 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : Start trace at what step ? 0
DIAG : Trace operations which are not part of the test steps ? NO
DIAG : Stop after first failure ? NO
DIAG : Disc LU ? 41
DIAG : Disc address ? 0
DIAG : Disc LU ? 14
DIAG : Disc address ? 1
DIAG : Drive model number ? 06
DIAG : Do you want to run the interactive part of the test ? YES
DIAG : LU 41 address 0 select code 25 7906 drive
DIAG : LU 14 address 1 select code 12 7906 drive
DIAG : CHECK THAT ALL SWITCHES ARE SET CORRECTLY.
DIAG : THE RUN/STOP SWITCH SHOULD BE IN THE RUN POSITION.
@ -3569,7 +3572,7 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : STEP 1 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : REQUEST STATUS drive type 0 0 0 50 0
DIAG : REQUEST STATUS drive type 0 0 0 40 0
DIAG : IDENTIFY result 3 0 0 40 0
DIAG : STEP 3 PASSED
@ -3580,19 +3583,19 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : cylinders: 0 - 410 heads: 0 - 3 sectors: 0 - 47
DIAG : First and last tracks on LU:
DIAG : cylinder 0 head 0 (track 0)
DIAG : cylinder 199 head 1 (track 399)
DIAG : cylinder 49 head 1 (track 99)
DIAG : First and last spares on LU:
DIAG : cylinder 200 head 0 (track 400)
DIAG : cylinder 202 head 1 (track 405)
DIAG : cylinder 50 head 0
DIAG : cylinder 49 head 1 (track 99)
DIAG : Heads on LU (first - last): 0 - 1
DIAG : Searching entire LU for file directory:
DIAG : NO DIRECTORY OR UNABLE TO READ DIRECTORY ON TEST LU
DIAG : First and last tracks available for testing:
DIAG : cylinder 0 head 0 (track 0)
DIAG : cylinder 199 head 1 (track 399)
DIAG : cylinder 49 head 1 (track 99)
DIAG : Default test tracks:
DIAG : cylinder 199 head 0 (track 398)
DIAG : cylinder 199 head 1 (track 399)
DIAG : cylinder 49 head 0 (track 98)
DIAG : cylinder 49 head 1 (track 99)
DIAG : Use default test tracks ? YES
DIAG : Checking test track preambles.
@ -3601,11 +3604,11 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : Beginning part 2 of diagnostic.
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : STEP 4 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : REQUEST DISC ADDR cy 199 hd 0 sec 0 0 0 40 0
DIAG : REQUEST DISC ADDR cy 49 hd 0 sec 0 0 0 40 0
DIAG : STEP 5 PASSED
DIAG : operation parameters/results spd cs ds DSJ
@ -3614,8 +3617,8 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : STEP 6 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : REQUEST SECTOR ADDR sec 2 0 0 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : REQUEST SECTOR ADDR sec 6 0 0 40 0
DIAG : STEP 7 PASSED
DIAG : operation parameters/results spd cs ds DSJ
@ -3626,153 +3629,153 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : STEP 8 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 138 0 0 40 0
DIAG : decode preamble cy 199 hd 0 sec 0 spd 0
DIAG : decode preamble cy 49 hd 0 sec 0 spd 0
DIAG : STEP 9 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : WRITE FULL SECTOR length 138 0 0 40 0
DIAG : STEP 10 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : VERIFY sector count 1 0 0 40 0
DIAG : STEP 11 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : READ length 128 0 0 40 0
DIAG : STEP 12 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : READ WITH OFFSET length 128 offset 55 0 0 40 0
DIAG : STEP 13 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : READ WITHOUT VERIFY length 128 0 0 40 0
DIAG : STEP 14 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SET FILE MASK mask 0 0 0 40 0
DIAG : SEEK cy 199 hd 0 sec 47 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 47 0 37 40 0
DIAG : READ FULL SECTOR length 140 0 14 40 1
DIAG : STEP 16 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SET FILE MASK mask 2 0 0 40 0
DIAG : SEEK cy 199 hd 0 sec 47 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 47 0 37 40 0
DIAG : READ FULL SECTOR length 140 0 0 40 0
DIAG : STEP 17 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SET FILE MASK mask 2 0 0 40 0
DIAG : SEEK cy 199 hd 3 sec 47 0 37 40 0
DIAG : SEEK cy 49 hd 3 sec 47 0 37 40 0
DIAG : READ FULL SECTOR length 140 0 14 40 1
DIAG : STEP 18 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SET FILE MASK mask 3 0 0 40 0
DIAG : SEEK cy 199 hd 3 sec 47 0 37 40 0
DIAG : SEEK cy 49 hd 3 sec 47 0 37 40 0
DIAG : READ FULL SECTOR length 140 0 0 40 0
DIAG : REQUEST DISC ADDR cy 200 hd 0 sec 1 0 0 40 0
DIAG : REQUEST DISC ADDR cy 50 hd 0 sec 1 0 0 40 0
DIAG : STEP 19 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SET FILE MASK mask 11 0 0 40 0
DIAG : SEEK cy 199 hd 0 sec 47 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 47 0 37 40 0
DIAG : READ FULL SECTOR length 140 0 0 40 0
DIAG : REQUEST DISC ADDR cy 198 hd 0 sec 1 0 0 40 0
DIAG : REQUEST DISC ADDR cy 48 hd 0 sec 1 0 0 40 0
DIAG : STEP 20 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 199 hd 1 sec 0 0 0 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 49 hd 1 sec 0 0 0 40 0
DIAG : INITIALIZE length 6144 spd 1 1 0 40 0
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 3 0 0 40 0
DIAG : decode preamble cy 199 hd 0 sec 0 spd 0
DIAG : decode preamble cy 49 hd 0 sec 0 spd 0
DIAG : STEP 21 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 199 hd 0 sec 0 0 0 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 49 hd 0 sec 0 0 0 40 0
DIAG : INITIALIZE length 6144 spd 4 4 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 3 0 0 40 0
DIAG : decode preamble cy 199 hd 1 sec 0 spd 0
DIAG : decode preamble cy 49 hd 1 sec 0 spd 0
DIAG : STEP 22 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 199 hd 1 sec 0 0 0 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 49 hd 1 sec 0 0 0 40 0
DIAG : INITIALIZE length 6144 spd 2 2 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 3 0 0 40 0
DIAG : decode preamble cy 199 hd 1 sec 0 spd 0
DIAG : decode preamble cy 49 hd 1 sec 0 spd 0
DIAG : STEP 25 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 199 hd 0 sec 0 0 0 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 49 hd 0 sec 0 0 0 40 0
DIAG : INITIALIZE length 6144 spd 6 6 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 3 0 0 40 0
DIAG : decode preamble cy 199 hd 1 sec 0 spd 0
DIAG : decode preamble cy 49 hd 1 sec 0 spd 0
DIAG : STEP 26 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 199 hd 1 sec 0 0 0 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 49 hd 1 sec 0 0 0 40 0
DIAG : INITIALIZE length 6144 spd 3 3 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 3 0 0 40 0
DIAG : decode preamble cy 199 hd 1 sec 0 spd 0
DIAG : decode preamble cy 49 hd 1 sec 0 spd 0
DIAG : STEP 28 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 199 hd 0 sec 0 0 0 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 49 hd 0 sec 0 0 0 40 0
DIAG : INITIALIZE length 6144 spd 4 4 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 3 0 0 40 0
DIAG : decode preamble cy 199 hd 1 sec 0 spd 0
DIAG : decode preamble cy 49 hd 1 sec 0 spd 0
DIAG : STEP 30 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 199 hd 0 sec 0 0 0 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 49 hd 0 sec 0 0 0 40 0
DIAG : INITIALIZE length 6144 spd 0 0 0 40 0
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 3 0 0 40 0
DIAG : decode preamble cy 199 hd 0 sec 0 spd 0
DIAG : decode preamble cy 49 hd 0 sec 0 spd 0
DIAG : SET FILE MASK mask 0 0 0 40 0
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : READ length 128 0 0 40 0
DIAG : STEP 31 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 199 hd 1 sec 0 0 0 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 49 hd 1 sec 0 0 0 40 0
DIAG : INITIALIZE length 6144 spd 0 0 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 3 0 0 40 0
DIAG : decode preamble cy 199 hd 1 sec 0 spd 0
DIAG : decode preamble cy 49 hd 1 sec 0 spd 0
DIAG : SET FILE MASK mask 0 0 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : READ length 128 0 0 40 0
DIAG : STEP 32 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : WRITE length 128 0 0 40 0
DIAG : STEP 35 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : READ length 128 0 0 40 0
DIAG : test data read test passed
DIAG : STEP 36 PASSED
@ -3801,19 +3804,19 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : STEP 40 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : VERIFY sector count 1 0 0 40 0
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : VERIFY sector count 2 0 0 40 0
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : VERIFY sector count 4 0 0 40 0
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : VERIFY sector count 8 0 0 40 0
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : VERIFY sector count 16 0 0 40 0
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : VERIFY sector count 32 0 0 40 0
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : VERIFY sector count 48 0 0 40 0
DIAG : STEP 45 PASSED
@ -3854,38 +3857,38 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : STEP 50 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 198 hd 1 sec 0 0 0 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 48 hd 1 sec 0 0 0 40 0
DIAG : INITIALIZE length 6144 spd 0 0 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 3 0 0 40 0
DIAG : decode preamble cy 199 hd 1 sec 0 spd 0
DIAG : decode preamble cy 49 hd 1 sec 0 spd 0
DIAG : STEP 52 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 199 hd 0 sec 0 0 0 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 49 hd 0 sec 0 0 0 40 0
DIAG : INITIALIZE length 6144 spd 0 0 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 3 0 0 40 0
DIAG : decode preamble cy 199 hd 1 sec 0 spd 0
DIAG : decode preamble cy 49 hd 1 sec 0 spd 0
DIAG : STEP 54 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 199 hd 1 sec 0 0 0 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 49 hd 1 sec 0 0 0 40 0
DIAG : INITIALIZE length 6144 spd 0 0 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 3 0 0 40 0
DIAG : decode preamble cy 199 hd 1 sec 0 spd 0
DIAG : decode preamble cy 49 hd 1 sec 0 spd 0
DIAG : SET FILE MASK mask 0 0 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : READ length 128 0 0 40 0
DIAG : SEEK cy 199 hd 1 sec 5 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 5 0 37 40 0
DIAG : READ FULL SECTOR length 138 0 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : WRITE FULL SECTOR length 138 0 0 40 0
DIAG : SEEK cy 199 hd 1 sec 1 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 1 0 37 40 0
DIAG : READ length 128 0 0 40 0
DIAG : STEP 55 FAILED
@ -3912,7 +3915,7 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : STEP 60 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 4 sec 0 0 23 44 1
DIAG : SEEK cy 49 hd 4 sec 0 0 23 44 1
DIAG : SEEK cy 0 hd 0 sec 0 0 37 40 0
DIAG : STEP 72 PASSED
@ -3922,7 +3925,7 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : STEP 73 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 49 0 23 44 1
DIAG : SEEK cy 49 hd 1 sec 49 0 23 44 1
DIAG : SEEK cy 0 hd 0 sec 0 0 37 40 0
DIAG : STEP 74 PASSED
@ -3948,12 +3951,12 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : STEP 81 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 199 hd 1 sec 0 0 0 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : ADDRESS RECORD cy 49 hd 1 sec 0 0 0 40 0
DIAG : INITIALIZE length 6144 spd 2 2 0 40 0
DIAG : SEEK cy 199 hd 1 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 40 0
DIAG : READ FULL SECTOR length 3 0 0 40 0
DIAG : decode preamble cy 199 hd 1 sec 0 spd 0
DIAG : decode preamble cy 49 hd 1 sec 0 spd 0
DIAG : STEP 82 FAILED
@ -3965,17 +3968,17 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : STEP 83 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 0 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 0 0
DIAG : WRITE length 1 0 0 0 0
DIAG : STEP 84 FAILED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 0 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 0 0
DIAG : WRITE FULL SECTOR length 1 0 23 0 1
DIAG : STEP 85 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 1 sec 0 0 37 0 0
DIAG : SEEK cy 49 hd 1 sec 0 0 37 0 0
DIAG : INITIALIZE length 1 spd 0 0 23 0 1
DIAG : STEP 86 PASSED
@ -3992,21 +3995,21 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : Type <space>,<return>
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 140 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 140 0
DIAG : STEP 89 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 140 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 140 0
DIAG : WRITE length 1 0 23 140 1
DIAG : STEP 90 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 140 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 140 0
DIAG : WRITE FULL SECTOR length 1 0 23 140 1
DIAG : STEP 91 PASSED
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 140 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 140 0
DIAG : INITIALIZE length 1 spd 0 0 23 140 1
DIAG : STEP 92 PASSED
@ -4015,7 +4018,7 @@ TEST REPORT: DIAG : HP-IB DISC DIAGNOSTIC
DIAG : Type <space>,<return>
DIAG : operation parameters/results spd cs ds DSJ
DIAG : SEEK cy 199 hd 0 sec 0 0 37 40 0
DIAG : SEEK cy 49 hd 0 sec 0 0 37 40 0
DIAG : STEP 97 PASSED
DIAG : Part 3 of diagnostic completed.

6
HP2100/hp2100_dp.c
View File

@ -859,7 +859,7 @@ t_stat dpc_svc (UNIT *uptr)
int32 da, drv, err;
err = 0; /* assume no err */
drv = uptr - dpc_dev.units; /* get drive no */
drv = uptr - dpc_unit; /* get drive no */
if (uptr->flags & UNIT_UNLOAD) { /* drive down? */
dpc.command = CLEAR; /* clr cch cmd */
@ -1052,7 +1052,7 @@ return detach_unit (uptr); /* detach unit */
t_stat dpc_load_unload (UNIT *uptr, int32 value, char *cptr, void *desc)
{
uint32 drv;
int32 drv;
if ((uptr->flags & UNIT_ATT) == 0) return SCPE_UNATT; /* must be attached to load */
@ -1060,7 +1060,7 @@ if (value == UNIT_UNLOAD) /* unload heads? */
uptr->flags = uptr->flags | UNIT_UNLOAD; /* indicate unload */
else { /* load heads */
uptr->flags = uptr->flags & ~UNIT_UNLOAD; /* indicate load */
drv = uptr - dpc_dev.units; /* get drive no */
drv = uptr - dpc_unit; /* get drive no */
dpc_sta[drv] = dpc_sta[drv] | STA_ATN | STA_1ST; /* update status */
if (dpc_poll) /* polling enabled? */
dpcio (&dpc_dib, ioENF, 0); /* set flag */

2
HP2100/hp2100_dq.c
View File

@ -678,7 +678,7 @@ t_stat dqc_svc (UNIT *uptr)
int32 da, drv, err;
err = 0; /* assume no err */
drv = uptr - dqc_dev.units; /* get drive no */
drv = uptr - dqc_unit; /* get drive no */
if (uptr->flags & UNIT_UNLOAD) { /* drive down? */
dqc.command = CLEAR; /* clr cch cmd */
dqcio (&dqc_dib, ioENF, 0); /* set cch flg */

175
HP2100/hp2100_ds.c
View File

@ -26,7 +26,7 @@
DS 13037D/13175D disc controller/interface
02-Mar-12 JDB Rewritten to use the MAC/ICD disc controller library
29-Mar-12 JDB Rewritten to use the MAC/ICD disc controller library
ioIOO now notifies controller service of parameter output
14-Feb-12 JDB Corrected SRQ generation and FIFO under/overrun detection
Corrected Clear command to conform to the hardware
@ -60,15 +60,14 @@
The 13037D multiple-access (MAC) disc controller supports from one to eight
HP 7905 (15 MB), 7906 (20MB), 7920 (50 MB), and 7925 (120 MB) disc drives
accessed by one to eight CPUs. The controller hardware consists of a 16-bit
microprogrammed processor constructed from 74S181 bit slices and operating at
5 MHz, a device controller providing the interconnections to the drives and
CPU interfaces, and error correction circuitry that enables the controller to
correct up to a 32-bit error burst. 1024 words of 24-bit firmware are stored
in ROM.
microprogrammed processor constructed from 74S181 bit slices operating at 5
MHz, a device controller providing the interconnections to the drives and CPU
interfaces, and an error correction controller that enables the correction of
up to 32-bit error bursts. 1024 words of 24-bit firmware are stored in ROM.
The 13175D disc interface is used to connect the CPU to the 13037 device
controller. In a multiple-CPU system, one interface is strapped to reset the
controller when the CPU's front panel PRESET button is pressed.
The 13175D disc interface is used to connect the HP 1000 CPU to the 13037
device controller. In a multiple-CPU system, one interface is strapped to
reset the controller when the CPU's front panel PRESET button is pressed.
This module simulates a 13037D connected to a single 13175D interface. From
one to eight drives may be connected, and drive types may be freely
@ -134,7 +133,7 @@
#define FIFO_STOP (ds.fifo_count >= 5) /* FIFO stop filling test */
#define FIFO_FULL (ds.fifo_count == FIFO_SIZE) /* FIFO full test */
#define PRESET_ENABLE TRUE /* Preset Jumper (W4) enabled */
#define PRESET_ENABLE TRUE /* Preset Jumper (W4) is enabled */
/* Debug flags */
@ -223,7 +222,7 @@ static t_stat activate_unit (UNIT *uptr);
1. The validation routine does not allow the model number or autosizing
option to be changed when the unit is attached. Therefore, specifying
UNIT_ATT in the mask field has no deleterious effect.
UNIT_ATT in the mask field has no adverse effect.
2. The modifier DEVNO is deprecated in favor of SC but is retained for
compatibility.
@ -237,14 +236,14 @@ static DIB ds_dib = { &ds_io, DS };
#define UNIT_FLAGS (UNIT_FIX | UNIT_ATTABLE | UNIT_ROABLE | UNIT_DISABLE | UNIT_UNLOAD)
static UNIT ds_unit [] = {
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* unit 0 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* unit 1 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* unit 2 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* unit 3 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* unit 4 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* unit 5 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* unit 6 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* unit 7 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* drive unit 0 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* drive unit 1 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* drive unit 2 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* drive unit 3 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* drive unit 4 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* drive unit 5 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* drive unit 6 */
{ UDATA (&ds_service_drive, UNIT_FLAGS | MODEL_7905, D7905_WORDS) }, /* drive unit 7 */
{ UDATA (&ds_service_controller, UNIT_DIS, 0) }, /* controller unit */
{ UDATA (&ds_service_timer, UNIT_DIS, 0) } /* timer unit */
};
@ -252,8 +251,8 @@ static UNIT ds_unit [] = {
static REG ds_reg [] = {
{ FLDATA (CMFOL, ds.cmfol, 0) },
{ FLDATA (CMRDY, ds.cmrdy, 0) },
{ BRDATA (FIFO, ds.fifo, 8, 16, FIFO_SIZE), REG_CIRC },
{ DRDATA (FCNT, ds.fifo_count, 5) },
{ BRDATA (FIFO, ds.fifo, 8, 16, FIFO_SIZE), REG_CIRC },
{ ORDATA (FREG, ds.fifo_reg, 32), REG_HRO },
{ ORDATA (CNTYPE, mac_cntlr.type, 2), REG_HRO },
@ -375,13 +374,13 @@ DEVICE ds_dev = {
The control path consists of the usual control, flag buffer, flag, and SRQ
flip-flops, although flag and SRQ are decoupled to allow the full DCPC
transfer rate through the FIFO (driving SRQ from the flag limits transfers to
only every other cycle). SRQ is based on the FIFO level: if data or room in
the FIFO is available, SRQ is set to transfer it. The flag is only used to
signal an interrupt at the end of a command.
every other cycle). SRQ is based on the FIFO level: if data or room in the
FIFO is available, SRQ is set to initiate a transfer. The flag is only used
to signal an interrupt at the end of a command.
One unusual aspect is that SFC and SFS test different things, rather than
complementary states of the same thing. SFC tests the busy flip-flop, and
SFS tests the flag flip-flop.
complementary states of the same thing. SFC tests the controller busy state,
and SFS tests the flag flip-flop.
In addition, the card contains end-of-data-transfer, command-follows, and
command-ready flip-flops. EDT is set when the DCPC EDT signal is asserted
@ -397,16 +396,16 @@ DEVICE ds_dev = {
1. In hardware, SRQ is enabled only when the controller is reading or
writing the disc (IFIN or IFOUT functions are asserted) and set when the
FIFO is not empty (read) or not full (write). In simulation, SRQ is set
by the unit service read/write data phase transfers and cleared below
when the FIFO is empty (read) or full (write).
by the unit service read/write data phase transfers and cleared in the
IOI and IOO signal handlers when the FIFO is empty (read) or full
(write).
2. The DCPC EDT signal cannot set the controller's end-of-data flag directly
because a write EOD must occur only after the FIFO has been drained.
3. Polling the interface or drives must be deferred to the end of the I/O
signal service. If they are performed in the IOO/STC handlers
themselves, an associated CLF might clear the flag that was set by the
poll.
3. Polling the interface or drives must be deferred to the end of I/O signal
handling. If they are performed in the IOO/STC handlers themselves, an
associated CLF might clear the flag that was set by the poll.
4. Executing a CLC sets the controller's end-of-data flag, which will abort
a read or write data transfer in progress. Parameter transfers are not
@ -417,7 +416,7 @@ DEVICE ds_dev = {
5. The hardware Interface Function and Flag Buses are not implemented
explicitly. Instead, interface functions and signals are inferred by the
interface by the current command operation and phase.
interface from the current command operation and phase.
*/
uint32 ds_io (DIB *dibptr, IOCYCLE signal_set, uint32 stat_data)
@ -512,7 +511,7 @@ while (working_set) {
if (ds.srq == SET && DEBUG_PRI (ds_dev, DEB_CMDS))
fprintf (sim_deb, ">>DS cmds: [OTx%s] SRQ cleared\n", hold_or_clear);
ds.srq = CLEAR; /* clear SRQ */
ds.srq = CLEAR; /* clear SRQ to stop filling */
}
}
break;
@ -622,7 +621,7 @@ return stat_data;
overrun error.
Write transfers set the initial SRQ to request words from the CPU. As each
arrives, it is unloaded from the FIFO into the sector buffer, and SRQ is
word arrives, it is unloaded from the FIFO into the sector buffer, and SRQ is
enabled. If the current sector transfer is complete, the controller is moved
to the end phase. If the FIFO underflows, the write terminates with a data
overrun error.
@ -639,12 +638,12 @@ return stat_data;
Implementation notes:
1. Every command except Seek, Recalibrate, and End set the flag when the
1. Every command except Seek, Recalibrate, and End sets the flag when the
command completes. A command completes when the controller is no longer
busy (it becomes idle for Seek, Recalibrate, and End, and becomes waiting
for all others). Seek and Recalibrate may generate errors (e.g., heads
unloaded), in which case the flag must be set. But in these cases, the
controller state is waiting, not idle.
busy (it becomes idle for Seek, Recalibrate, and End, or it becomes
waiting for all others). Seek and Recalibrate may generate errors (e.g.,
heads unloaded), in which case the flag must be set. But in these cases,
the controller state is waiting, not idle.
However, it is insufficient simply to check that the controller has moved
to the wait state, because a seek may complete while the controller is
@ -653,8 +652,9 @@ return stat_data;
completes, another command is issued that attempts to access unit 1,
which is not ready. The command fails with a Status-2 error, and the
controller moves to the wait state. When the seek completes, the
controller is waiting with error status. We must determine if the seek
completed successfully or not, as we must interrupt in the latter case.
controller is waiting with error status. We must determine whether the
seek completed successfully or not, as we must interrupt in the latter
case.
Therefore, we determine seek completion by checking if the Attention
status was set. Attention sets only if the seek completes successfully.
@ -663,31 +663,31 @@ return stat_data;
command terminated before the seek ever started. Also, a seek may
complete while the controller is busy, waiting, or idle.)
2. For debug printouts, we want to print the name of the command that has
completed when the controller returns to the idle or wait state.
Normally, we would use the controller's "opcode" field to identify the
command that completed. However, while waiting for Seek or Recalibrate
completion, "opcode" may be set to another command if that command does
not access this drive. For example, it might be set to a Read of
another unit, or a Request Status for this unit. So we can't rely on
"opcode" to report the correct positioning command completion.
2. For debug printouts, we want to print the name of the command that has
completed when the controller returns to the idle or wait state.
Normally, we would use the controller's "opcode" field to identify the
command that completed. However, while waiting for Seek or Recalibrate
completion, "opcode" may be set to another command if that command does
not access this drive. For example, it might be set to a Read of another
unit, or a Request Status for this unit. So we can't rely on "opcode" to
report the correct name of the completed positioning command.
However, we cannot rely on "uptr->OP" either, as it can be changed
during the course of a command. For example, Read Without Verify is
changed to Read after a track crossing.
However, we cannot rely on "uptr->OP" either, as that can be changed
during the course of a command. For example, Read Without Verify is
changed to Read after a track crossing.
Instead, we have to determine whether a seek is completing. If it is,
then we report "uptr->OP"; otherwise, we report "opcode".
Instead, we have to determine whether a seek is completing. If it is,
then we report "uptr->OP"; otherwise, we report "opcode".
3. The initial write SRQ must set only at the transition from the start
phase to the data phase. If a write command begins with an auto-seek,
the drive service will be entered twice in the start phase (the first
entry performs the seek, and the second begins the write). In hardware,
SRQ does not assert until the write begins.
3. The initial write SRQ must set only at the transition from the start
phase to the data phase. If a write command begins with an auto-seek,
the drive service will be entered twice in the start phase (the first
entry performs the seek, and the second begins the write). In hardware,
SRQ does not assert until the write begins.
4. The DCPC EDT signal cannot set the controller's end-of-data flag
directly because a write EOD must only occur after the FIFO has been
drained.
4. The DCPC EDT signal cannot set the controller's end-of-data flag
directly because a write EOD must only occur after the FIFO has been
drained.
*/
t_stat ds_service_drive (UNIT *uptr)
@ -695,9 +695,10 @@ t_stat ds_service_drive (UNIT *uptr)
static const char completion_message [] = ">>DS rwsc: Unit %d %s command completed\n";
t_stat result;
t_bool seek_completion;
FLIP_FLOP entry_srq = ds.srq; /* SRQ state on entry */
CNTLR_PHASE entry_phase = (CNTLR_PHASE) uptr->PHASE; /* operation phase on entry */
uint32 entry_status = uptr->STAT; /* drive status on entry */
int32 unit;
FLIP_FLOP entry_srq = ds.srq; /* get the SRQ state on entry */
CNTLR_PHASE entry_phase = (CNTLR_PHASE) uptr->PHASE; /* get the operation phase on entry */
uint32 entry_status = uptr->STAT; /* get the drive status on entry */
result = dl_service_drive (&mac_cntlr, uptr); /* service the drive */
@ -764,7 +765,7 @@ if ((CNTLR_PHASE) uptr->PHASE == data_phase) /* is the drive in the d
break;
default: /* entered with an invalid state */
default: /* we were entered with an invalid state */
result = SCPE_IERR; /* return an internal (programming) error */
break;
} /* end of data phase operation dispatch */
@ -774,13 +775,13 @@ if (DEBUG_PRI (ds_dev, DEB_CMDS) && entry_srq != ds.srq)
fprintf (sim_deb, ">>DS cmds: SRQ %s\n", ds.srq == SET ? "set" : "cleared");
if (uptr->wait) /* is service requested? */
if (uptr->wait) /* was service requested? */
activate_unit (uptr); /* schedule the next event */
seek_completion = ~entry_status & uptr->STAT & DL_S2ATN; /* seek is complete when Attention sets */
if (mac_cntlr.state != cntlr_busy) { /* is the command complete? */
if (mac_cntlr.state == cntlr_wait && !seek_completion) /* is it command and not seek completion? */
if (mac_cntlr.state == cntlr_wait && !seek_completion) /* is it command but not seek completion? */
ds_io (&ds_dib, ioENF, 0); /* set the data flag to interrupt the CPU */
poll_interface (); /* poll the interface for the next command */
@ -788,22 +789,22 @@ if (mac_cntlr.state != cntlr_busy) { /* is the command co
}
if (DEBUG_PRI (ds_dev, DEB_RWSC))
if (DEBUG_PRI (ds_dev, DEB_RWSC)) {
unit = uptr - ds_unit; /* get the unit number */
if (result == SCPE_IERR) /* did an internal error occur? */
fprintf (sim_deb, ">>DS rwsc: Unit %d %s command %s phase service not handled\n",
uptr - ds_dev.units,
dl_opcode_name (MAC, (CNTLR_OPCODE) uptr->OP),
unit, dl_opcode_name (MAC, (CNTLR_OPCODE) uptr->OP),
dl_phase_name ((CNTLR_PHASE) uptr->PHASE));
else if (seek_completion) /* if a seek has completed */
fprintf (sim_deb, completion_message, /* report the unit command */
uptr - ds_dev.units,
dl_opcode_name (MAC, (CNTLR_OPCODE) uptr->OP));
unit, dl_opcode_name (MAC, (CNTLR_OPCODE) uptr->OP));
else if (mac_cntlr.state == cntlr_wait) /* if the controller has stopped */
fprintf (sim_deb, completion_message, /* report the controller command */
uptr - ds_dev.units,
dl_opcode_name (MAC, mac_cntlr.opcode));
unit, dl_opcode_name (MAC, mac_cntlr.opcode));
}
return result; /* return the result of the service */
}
@ -862,11 +863,11 @@ switch ((CNTLR_PHASE) uptr->PHASE) { /* dispatch the current
case clear:
case set_file_mask:
case wakeup:
ds_io (&ds_dib, ioENF, 0); /* complete the operation with the flag set */
ds_io (&ds_dib, ioENF, 0); /* complete the operation and set the flag */
break;
default: /* entered with an invalid state */
default: /* we were entered with an invalid state */
result = SCPE_IERR; /* return an internal (programming) error */
break;
} /* end of operation dispatch */
@ -917,7 +918,7 @@ switch ((CNTLR_PHASE) uptr->PHASE) { /* dispatch the current
break;
default: /* entered with an invalid state */
default: /* we were entered with an invalid state */
result = SCPE_IERR; /* return an internal (programming) error */
break;
} /* end of operation dispatch */
@ -976,7 +977,7 @@ return result; /* return the result of
1. During a power-on reset, a pointer to the FIFO simulation register is
saved to allow access to the "qptr" field during FIFO loading and
unloading. This enables the SCP to view the FIFO as a circular queue, so
unloading. This enables SCP to view the FIFO as a circular queue, so
that the bottom word of the FIFO is always displayed as FIFO[0],
regardless of where it is in the actual FIFO array.
@ -992,7 +993,7 @@ if (sim_switches & SWMASK ('P')) { /* is this a power-on re
ds.fifo_reg = find_reg ("FIFO", NULL, dptr); /* find the FIFO register entry */
if (ds.fifo_reg == NULL) /* if it cannot be found, */
return SCPE_IERR; /* report a programming error! */
return SCPE_IERR; /* report a programming error */
else { /* found it */
ds.fifo_reg->qptr = 0; /* so reset the FIFO bottom index */
@ -1064,7 +1065,7 @@ return result;
/* Boot a MAC disc drive.
The MAC disc bootstrap program is loaded from the HP 12992B Boot Loader ROM
into memory, the I/O instructions are configured from the interface card
into memory, the I/O instructions are configured for the interface card's
select code, and the program is run to boot from the specified unit. The
loader supports booting from cylinder 0 of drive unit 0 only. Before
execution, the S register is automatically set as follows:
@ -1166,7 +1167,7 @@ if (unitno != 0) /* boot supported on
return SCPE_NOFNC; /* report "Command not allowed" if attempted */
if (ibl_copy (ds_rom, ds_dib.select_code)) /* copy the boot ROM to memory and configure */
return SCPE_IERR; /* return an internal error if failed */
return SCPE_IERR; /* return an internal error if the copy failed */
SR = SR & (IBL_OPT | IBL_DS_HEAD) /* set S to a reasonable value */
| IBL_DS | IBL_MAN | (ds_dib.select_code << IBL_V_DEV); /* before boot execution */
@ -1193,7 +1194,7 @@ return SCPE_OK;
t_stat ds_load_unload (UNIT *uptr, int32 value, char *cptr, void *desc)
{
const t_bool load = (value != UNIT_UNLOAD); /* true if heads are loading */
const t_bool load = (value != UNIT_UNLOAD); /* true if the heads are loading */
return dl_load_unload (&mac_cntlr, uptr, load); /* load or unload the heads */
}
@ -1265,7 +1266,7 @@ if (uptr) { /* did the command start
time = uptr->wait; /* save the activation time */
if (time) /* was the unit scheduled? */
activate_unit (uptr); /* activate it (clears "wait") */
activate_unit (uptr); /* activate it (and clear the "wait" field) */
if (DEBUG_PRI (ds_dev, DEB_RWSC)) {
unit = uptr - ds_unit; /* get the unit number */
@ -1337,8 +1338,8 @@ return;
void poll_drives (void)
{
if (mac_cntlr.state == cntlr_idle && ds.control == SET) /* controller is idle and OK to interrupt? */
if (dl_poll_drives (&mac_cntlr, ds_unit, DL_MAXDRIVE)) /* poll drives; was Attention seen? */
if (mac_cntlr.state == cntlr_idle && ds.control == SET) /* is the controller idle and interrupts are allowed? */
if (dl_poll_drives (&mac_cntlr, ds_unit, DL_MAXDRIVE)) /* poll the drives; was Attention seen? */
ds_io (&ds_dib, ioENF, 0); /* request an interrupt */
return;
}
@ -1455,7 +1456,7 @@ return;
static t_stat activate_unit (UNIT *uptr)
{
uint32 unit;
int32 unit;
t_stat result;
if (DEBUG_PRI (ds_dev, DEB_SERV)) {

2
HP2100/hp2100_mpx.c
View File

@ -1658,7 +1658,7 @@ return SCPE_OK;
t_stat mpx_line_svc (UNIT *uptr)
{
const uint32 port = uptr - mpx_unit; /* port number */
const int32 port = uptr - mpx_unit; /* port number */
const uint16 rt = mpx_rcvtype [port]; /* receive type for port */
const uint32 data_bits = 5 + GET_BPC (mpx_config [port]); /* number of data bits */
const uint32 data_mask = (1 << data_bits) - 1; /* mask for data bits */

4
HP2100/hp2100_ms.c
View File

@ -690,7 +690,7 @@ int32 unum;
t_mtrlnt tbc;
t_stat st, r = SCPE_OK;
unum = uptr - msc_dev.units; /* get unit number */
unum = uptr - msc_unit; /* get unit number */
if ((uptr->FNC != FNC_RWS) && (uptr->flags & UNIT_OFFLINE)) { /* offline? */
msc_sta = (msc_sta | STA_REJ) & ~STA_BUSY; /* reject */
@ -905,7 +905,7 @@ else
t_stat ms_map_err (UNIT *uptr, t_stat st)
{
int32 unum = uptr - msc_dev.units; /* get unit number */
int32 unum = uptr - msc_unit; /* get unit number */
if (DEBUG_PRI (msc_dev, DEB_RWS))
fprintf (sim_deb,

3
HP2100/hp2100_mt.c
View File

@ -25,6 +25,7 @@
MT 12559A 3030 nine track magnetic tape
25-Mar-12 JDB Removed redundant MTAB_VUN from "format" MTAB entry
10-Feb-12 JDB Deprecated DEVNO in favor of SC
28-Mar-11 JDB Tidied up signal handling
29-Oct-10 JDB Fixed command scanning error in mtcio ioIOO handler
@ -220,7 +221,7 @@ REG mtc_reg[] = {
MTAB mtc_mod[] = {
{ MTUF_WLK, 0, "write enabled", "WRITEENABLED", NULL },
{ MTUF_WLK, MTUF_WLK, "write locked", "LOCKED", NULL },
{ MTAB_XTD | MTAB_VDV | MTAB_VUN, 0, "FORMAT", "FORMAT",
{ MTAB_XTD | MTAB_VDV, 0, "FORMAT", "FORMAT",
&sim_tape_set_fmt, &sim_tape_show_fmt, NULL },
{ MTAB_XTD | MTAB_VDV, 1, "SC", "SC", &hp_setsc, &hp_showsc, &mtd_dev },
{ MTAB_XTD | MTAB_VDV | MTAB_NMO, 1, "DEVNO", "DEVNO", &hp_setdev, &hp_showdev, &mtd_dev },

4
HP2100/hp2100_stddev.c
View File

@ -985,7 +985,7 @@ return SCPE_OK;
t_stat tty_set_opt (UNIT *uptr, int32 val, char *cptr, void *desc)
{
int32 u = uptr - tty_dev.units;
int32 u = uptr - tty_unit;
if (u > TTO) return SCPE_NOFNC;
if ((u == TTI) && (val == TT_MODE_7P))
@ -997,7 +997,7 @@ return SCPE_OK;
t_stat tty_set_alf (UNIT *uptr, int32 val, char *cptr, void *desc)
{
int32 u = uptr - tty_dev.units;
int32 u = uptr - tty_unit;
if (u != TTI) return SCPE_NOFNC;
return SCPE_OK;

43
HP2100/hp_disclib.h
View File

@ -24,7 +24,7 @@
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from the authors.
19-Mar-12 JDB First release
30-Mar-12 JDB First release
09-Nov-11 JDB Created disc controller common library from DS simulator
@ -66,7 +66,7 @@
#define CYL u3 /* current drive cylinder */
#define STAT u4 /* current drive status (Status 2) */
#define OP u5 /* current drive operation in process */
#define PHASE u6 /* current command phase */
#define PHASE u6 /* current drive operation phase */
/* Unit flags and accessors */
@ -78,7 +78,7 @@
#define UNIT_V_AUTO (UNIT_V_UF + 5) /* bits 5-5: autosize */
#define DL_V_UF (UNIT_V_UF + 6) /* first free unit flag bit */
#define UNIT_M_MODEL 3 /* model ID mask */
#define UNIT_M_MODEL 03 /* model ID mask */
#define UNIT_MODEL (UNIT_M_MODEL << UNIT_V_MODEL)
#define UNIT_WLK (1 << UNIT_V_WLK)
@ -96,9 +96,9 @@
#define DL_V_S1SPD 13 /* bits 15-13: S/P/D flags */
#define DL_V_S1STAT 8 /* bits 12- 8: controller status */
#define DL_V_S1UNIT 0 /* bits 7- 0: last unit number */
#define DL_V_S1UNIT 0 /* bits 3- 0: last unit number */
#define DL_M_S1UNIT 15 /* unit mask */
#define DL_M_S1UNIT 017 /* unit number mask */
#define GET_S1UNIT(v) (((v) >> DL_V_S1UNIT) & DL_M_S1UNIT)
@ -107,7 +107,7 @@
#define SET_S1UNIT(v) ((v) << DL_V_S1UNIT)
/* Status-2 accessors (+ = kept in unit status, - = determined dynamically */
/* Status-2 accessors (+ = kept in unit status, - = determined dynamically) */
#define DL_V_S2ERR 15 /* bits 15-15: (-) any error flag */
#define DL_V_S2DTYP 9 /* bits 12- 9: (-) drive type */
@ -116,7 +116,7 @@
#define DL_V_S2FMT 5 /* bits 5- 5: (-) format enabled flag */
#define DL_V_S2FAULT 4 /* bits 4- 4: (+) drive fault flag */
#define DL_V_S2FS 3 /* bits 3- 3: (+) first status flag */
#define DL_V_S2SC 2 /* bits 2- 2: (+) seek error flag */
#define DL_V_S2SC 2 /* bits 2- 2: (+) seek check flag */
#define DL_V_S2NR 1 /* bits 1- 1: (-) not ready flag */
#define DL_V_S2BUSY 0 /* bits 0- 1: (-) drive busy flag */
@ -195,8 +195,9 @@
typedef enum {
MAC = 0,
ICD, last_type = ICD, /* last valid type */
TYPE_COUNT /* count of controller types */
ICD,
last_type = ICD, /* last valid type */
type_count /* count of controller types */
} CNTLR_TYPE;
@ -224,7 +225,8 @@ typedef enum {
load_tio_register = 023,
request_disc_address = 024,
end = 025,
wakeup = 026, last_opcode = wakeup /* last valid opcode */
wakeup = 026,
last_opcode = wakeup /* last valid opcode */
} CNTLR_OPCODE;
#define DL_OPCODE_MASK 037
@ -235,7 +237,8 @@ typedef enum {
typedef enum {
start_phase = 0,
data_phase,
end_phase, last_phase = end_phase /* last valid phase */
end_phase,
last_phase = end_phase /* last valid phase */
} CNTLR_PHASE;
@ -324,22 +327,22 @@ typedef struct {
uint32 verify_count; /* count of sectors to verify */
uint32 poll_unit; /* last unit polled for attention */
uint16 *buffer; /* data buffer pointer */
uint32 index; /* data buffer index */
uint32 length; /* data buffer length */
UNIT *aux; /* auxiliary units (controller and timer) */
int32 seek_time; /* seek delay time (per cylinder) */
uint32 index; /* data buffer current index */
uint32 length; /* data buffer valid length */
UNIT *aux; /* MAC auxiliary units (controller and timer) */
int32 seek_time; /* per-cylinder seek delay time */
int32 sector_time; /* intersector delay time */
int32 cmd_time; /* command start delay time */
int32 data_time; /* data transfer delay time */
int32 wait_time; /* command wait timeout */
int32 cmd_time; /* command response time */
int32 data_time; /* data transfer response time */
int32 wait_time; /* command wait time */
} CNTLR_VARS;
typedef CNTLR_VARS *CVPTR; /* pointer to controller state variables */
/* Controller state variables initialiation.
/* Controller state variables initialization.
Parameters are:
The parameters are:
ctype - type of the controller (CNTLR_TYPE)
bufptr - pointer to the data buffer

3
PDP11/pdp11_rp.c
View File

@ -782,7 +782,6 @@ void rp_io_complete (UNIT *uptr, t_stat status)
{
uptr->io_status = status;
uptr->io_complete = 1;
sim_activate (uptr, 0);
}
/* Service unit timeout
@ -1030,7 +1029,7 @@ t_stat r;
uptr->capac = drv_tab[GET_DTYPE (uptr->flags)].size;
r = sim_disk_attach (uptr, cptr, RP_NUMWD * sizeof (uint16),
sizeof (uint16), TRUE, 0,
drv_tab[GET_DTYPE (uptr->flags)].name, drv_tab[GET_DTYPE (uptr->flags)].sect);
drv_tab[GET_DTYPE (uptr->flags)].name, drv_tab[GET_DTYPE (uptr->flags)].sect, 0);
if (r != SCPE_OK) /* error? */
return r;
drv = (int32) (uptr - rp_dev.units); /* get drv number */

10
PDP11/pdp11_rq.c
View File

@ -1794,16 +1794,13 @@ return 0; /* success! */
void rq_io_complete (UNIT *uptr, t_stat status)
{
MSC *cp = rq_ctxmap[uptr->cnum];
int32 elapsed = sim_grtime()-uptr->iostarttime;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_io_complete(status=%d)\n", status);
uptr->io_status = status;
uptr->io_complete = 1;
if (elapsed > rq_xtime)
sim_activate (uptr, 0);
else
sim_activate (uptr, rq_xtime-elapsed);
/* Reschedule for the appropriate delay */
sim_activate_notbefore (uptr, uptr->iostarttime+rq_xtime);
}
/* Unit service for data transfer commands */
@ -2487,7 +2484,7 @@ t_stat rq_attach (UNIT *uptr, char *cptr)
MSC *cp = rq_ctxmap[uptr->cnum];
t_stat r;
r = sim_disk_attach (uptr, cptr, RQ_NUMBY, sizeof (uint16), (uptr->flags & UNIT_NOAUTO), DBG_DSK, drv_tab[GET_DTYPE (uptr->flags)].name, 0);
r = sim_disk_attach (uptr, cptr, RQ_NUMBY, sizeof (uint16), (uptr->flags & UNIT_NOAUTO), DBG_DSK, drv_tab[GET_DTYPE (uptr->flags)].name, 0, 0);
if (r != SCPE_OK)
return r;
@ -2564,6 +2561,7 @@ rq_clrint (cp); /* clr intr req */
for (i = 0; i < (RQ_NUMDR + 2); i++) { /* init units */
uptr = dptr->units + i;
sim_cancel (uptr); /* clr activity */
sim_disk_reset (uptr);
uptr->cnum = cidx; /* set ctrl index */
uptr->flags = uptr->flags & ~(UNIT_ONL | UNIT_ATP);
uptr->uf = 0; /* clr unit flags */

9
PDP11/pdp11_tq.c
View File

@ -1280,16 +1280,13 @@ return ST_SUC; /* success! */
void tq_io_complete (UNIT *uptr, t_stat status)
{
struct tq_req_results *res = (struct tq_req_results *)uptr->results;
int32 elapsed = sim_grtime()-uptr->iostarttime;
sim_debug(DBG_TRC, &tq_dev, "tq_io_complete(status=%d)\n", status);
res->io_status = status;
res->io_complete = 1;
if (elapsed > tq_xtime)
sim_activate (uptr, 0);
else
sim_activate (uptr, tq_xtime-elapsed);
/* Reschedule for the appropriate delay */
sim_activate_notbefore (uptr, uptr->iostarttime+tq_xtime);
}
@ -2025,7 +2022,7 @@ t_stat tq_attach (UNIT *uptr, char *cptr)
{
t_stat r;
r = sim_tape_attach_ex (uptr, cptr, DBG_TAP);
r = sim_tape_attach_ex (uptr, cptr, DBG_TAP, 0);
if (r != SCPE_OK)
return r;
if (tq_csta == CST_UP)

8
PDP11/pdp11_xq.c
View File

@ -435,10 +435,10 @@ REG xqb_reg[] = {
};
MTAB xq_mod[] = {
{ MTAB_XTD|MTAB_VDV, 004, "ADDRESS", NULL,
NULL, &show_addr, NULL },
{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
NULL, &show_vec, NULL },
{ MTAB_XTD|MTAB_VDV, 004, "ADDRESS", NULL,
NULL, &show_addr, NULL },
{ MTAB_XTD|MTAB_VDV, 0, "VECTOR", NULL,
NULL, &show_vec, NULL },
{ MTAB_XTD | MTAB_VDV, 0, "MAC", "MAC=xx:xx:xx:xx:xx:xx",
&xq_setmac, &xq_showmac, NULL },
{ MTAB_XTD | MTAB_VDV | MTAB_NMO, 0, "ETH", "ETH",

2
VAX/vax_cpu.c
View File

@ -626,7 +626,7 @@ for ( ;; ) {
}
fault_PC = PC;
recqptr = 0; /* clr recovery q */
AIO_CHECK_EVENT;
AIO_CHECK_EVENT; /* queue async events */
if (sim_interval <= 0) { /* chk clock queue */
temp = sim_process_event ();
if (temp)

35
descrip.mms
View File

@ -85,8 +85,8 @@
CC_DEBUG = /DEBUG
.IFDEF DEBUG
LINK_DEBUG = /DEBUG/TRACEBACK
CC_OPTIMIZE = /NOOPTIMIZE
NEST_DEBUG = ,DEBUG=1
.IFDEF MMSALPHA
ALPHA_OR_IA64 = 1
@ -94,27 +94,37 @@ CC_FLAGS = /PREF=ALL
.IFDEF NOASYNCH
ARCH = AXP-NOASYNCH-DBG
CC_DEFS = "_LARGEFILE"
LINK_DEBUG = /DEBUG/TRACEBACK
.ELSE
ARCH = AXP-DBG
CC_DEFS = "_LARGEFILE","SIM_ASYNCH_IO=1"
LINK_DEBUG = /DEBUG/TRACEBACK/THREADS_ENABLE
.ENDIF
.ENDIF
.IFDEF MMSIA64
ALPHA_OR_IA64 = 1
CC_FLAGS = /PREF=ALL
.IFDEF NOASYNCH
ARCH = I64-NOASYNCH-DBG
CC_DEFS = "_LARGEFILE"
LINK_DEBUG = /DEBUG/TRACEBACK
.ELSE
ARCH = I64-DBG
CC_DEFS = "_LARGEFILE","SIM_ASYNCH_IO=1"
LINK_DEBUG = /DEBUG/TRACEBACK/THREADS_ENABLE
.ENDIF
.ENDIF
.IFDEF MMSVAX
CC_FLAGS = $(CC_FLAGS)
ARCH = VAX-DBG
CC_DEFS = "__VAX"
LINK_DEBUG = /DEBUG/TRACEBACK
.ENDIF
.ELSE
LINK_DEBUG = /NODEBUG/NOTRACEBACK
# !DEBUG
.IFDEF MMSALPHA
ALPHA_OR_IA64 = 1
@ -123,9 +133,11 @@ CC_FLAGS = /PREF=ALL
.IFDEF NOASYNCH
ARCH = AXP-NOASYNCH
CC_DEFS = "_LARGEFILE"
LINK_DEBUG = /NODEBUG/NOTRACEBACK
.ELSE
ARCH = AXP
CC_DEFS = "_LARGEFILE","SIM_ASYNCH_IO=1"
LINK_DEBUG = /NODEBUG/NOTRACEBACK/THREADS_ENABLE
.ENDIF
LINK_SECTION_BINDING = /SECTION_BINDING
.ENDIF
@ -134,8 +146,15 @@ LINK_SECTION_BINDING = /SECTION_BINDING
ALPHA_OR_IA64 = 1
CC_OPTIMIZE = /OPT=(LEV=5)
CC_FLAGS = /PREF=ALL
.IFDEF NOASYNCH
ARCH = I64-NOASYNCH
CC_DEFS = "_LARGEFILE"
LINK_DEBUG = /NODEBUG/NOTRACEBACK
.ELSE
ARCH = I64
CC_DEFS = "_LARGEFILE","SIM_ASYNCH_IO=1"
LINK_DEBUG = /NODEBUG/NOTRACEBACK/THREADS_ENABLE
.ENDIF
.ENDIF
.IFDEF MMSVAX
@ -143,10 +162,12 @@ CC_OPTIMIZE = /OPTIMIZE
CC_FLAGS = $(CC_FLAGS)
ARCH = VAX
CC_DEFS = "__VAX"
LINK_DEBUG = /NODEBUG/NOTRACEBACK
.ENDIF
.ENDIF
# Define Our Compiler Flags & Define The Compile Command
OUR_CC_FLAGS = $(CC_FLAGS)$(CC_DEBUG)$(CC_OPTIMIZE) \
/NEST=PRIMARY/NAME=(AS_IS,SHORT)
@ -265,7 +286,7 @@ PCAP_SIMH_INC = /INCL=($(PCAP_DIR))
@ IF (F$SEARCH("SYS$DISK:[.BIN.VMS]LIB.DIR").EQS."") THEN CREATE/DIRECTORY $(LIB_DIR)
@ IF (F$SEARCH("SYS$DISK:[.BIN.VMS.LIB]BLD-$(ARCH).DIR").EQS."") THEN CREATE/DIRECTORY $(BLD_DIR)
@ IF (F$SEARCH("$(BLD_DIR)*.*").NES."") THEN DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.*;*
@ IF (("$(BUILDING_ROMS)".EQS."").AND.(F$SEARCH("$(BIN_DIR)BuildROMs-$(ARCH).EXE").EQS."")) THEN $(MMS) BUILDROMS/MACRO=(BUILDING_ROMS=1)
@ IF (("$(BUILDING_ROMS)".EQS."").AND.(F$SEARCH("$(BIN_DIR)BuildROMs-$(ARCH).EXE").EQS."")) THEN $(MMS) BUILDROMS/MACRO=(BUILDING_ROMS=1$(NEST_DEBUG))
# MITS Altair Simulator Definitions.
@ -608,7 +629,7 @@ VAX780_SOURCE2 = $(PDP11_DIR)PDP11_RL.C,$(PDP11_DIR)PDP11_RQ.C,\
$(PDP11_DIR)PDP11_XU.C,$(PDP11_DIR)PDP11_RY.C,\
$(PDP11_DIR)PDP11_CR.C,$(PDP11_DIR)PDP11_RP.C,\
$(PDP11_DIR)PDP11_TU.C,$(PDP11_DIR)PDP11_HK.C,\
$(PDP11_DIR)PDP11_IO_LIB.C
$(PDP11_DIR)PDP11_VH.C,$(PDP11_DIR)PDP11_IO_LIB.C
.IFDEF ALPHA_OR_IA64
VAX780_OPTIONS = /INCL=($(SIMH_DIR),$(VAX780_DIR),$(PDP11_DIR)$(PCAP_INC))\
/DEF=($(CC_DEFS),"VM_VAX=1","USE_ADDR64=1","USE_INT64=1"$(PCAP_DEFS),"VAX_780=1")
@ -676,7 +697,7 @@ $(BIN_DIR)BuildROMs-$(ARCH).EXE : sim_BuildROMs.c
$ LINK $(LINK_DEBUG)/EXE=$(BIN_DIR)BUILDROMS-$(ARCH).EXE -
$(BLD_DIR)SIM_BUILDROMS.OBJ
$ DELETE/NOLOG/NOCONFIRM $(BLD_DIR)*.OBJ;*
$ RUN $(BIN_DIR)BuildROMs-$(ARCH).EXE
$ RUN/NODEBUG $(BIN_DIR)BuildROMs-$(ARCH).EXE
#
# Build The Libraries.
@ -1030,7 +1051,7 @@ $(VAX_LIB1) : $(VAX_SOURCE1)
$!
$! Building The $(VAX_LIB1) Library.
$!
$ RUN $(BIN_DIR)BuildROMs-$(ARCH).EXE
$ RUN/NODEBUG $(BIN_DIR)BuildROMs-$(ARCH).EXE
$ $(CC)$(VAX_OPTIONS)/OBJ=$(VAX_DIR) -
/OBJ=$(BLD_DIR) $(MMS$CHANGED_LIST)
$ IF (F$SEARCH("$(MMS$TARGET)").EQS."") THEN -
@ -1053,7 +1074,7 @@ $(VAX780_LIB1) : $(VAX780_SOURCE1)
$!
$! Building The $(VAX780_LIB1) Library.
$!
$ RUN $(BIN_DIR)BuildROMs-$(ARCH).EXE
$ RUN/NODEBUG $(BIN_DIR)BuildROMs-$(ARCH).EXE
$ $(CC)$(VAX780_OPTIONS)/OBJ=$(VAX780_DIR) -
/OBJ=$(BLD_DIR) $(MMS$CHANGED_LIST)
$ IF (F$SEARCH("$(MMS$TARGET)").EQS."") THEN -

BIN
doc/hp2100_doc.doc
View File

Binary file not shown.

8
makefile
View File

@ -75,11 +75,11 @@ ifeq ($(WIN32),) #*nix Environments (&& cygwin)
INCPATH:=/usr/include
LIBPATH:=/usr/lib
OS_CCDEFS = -D_GNU_SOURCE
GCC_OPTIMIZERS_CMD = $(GCC) -v --help 2>&1
GCC_WARNINGS_CMD = $(GCC) -v --help 2>&1
ifeq (Darwin,$(OSTYPE))
OSNAME = OSX
LIBEXT = dylib
GCC_OPTIMIZERS_CMD = $(GCC) -v --help 2>&1
GCC_WARNINGS_CMD = $(GCC) -v --help 2>&1
else
ifeq (Linux,$(OSTYPE))
LIBPATH := $(sort $(foreach lib,$(shell /sbin/ldconfig -p | grep ' => /' | sed 's/^.* => //'),$(dir $(lib))))
@ -342,7 +342,7 @@ ifneq (3,$(GCC_MAJOR_VERSION))
CFLAGS_O += -Wno-unused-result
endif
endif
ifeq (clean,$(MAKECMDGOALS))
ifneq (clean,$(MAKECMDGOALS))
BUILD_FEATURES := $(BUILD_FEATURES). GCC Version: $(GCC_VERSION)
$(info ***)
$(info *** $(BUILD_SINGLE)Simulator$(BUILD_MULTIPLE) being built with:)
@ -446,7 +446,7 @@ VAX780 = ${VAXD}/vax_cpu.c ${VAXD}/vax_cpu1.c ${VAXD}/vax_fpa.c \
${PDP11D}/pdp11_dz.c ${PDP11D}/pdp11_lp.c ${PDP11D}/pdp11_tq.c \
${PDP11D}/pdp11_xu.c ${PDP11D}/pdp11_ry.c ${PDP11D}/pdp11_cr.c \
${PDP11D}/pdp11_rp.c ${PDP11D}/pdp11_tu.c ${PDP11D}/pdp11_hk.c \
${PDP11D}/pdp11_io_lib.c
${PDP11D}/pdp11_vh.c ${PDP11D}/pdp11_io_lib.c
VAX780_OPT = -DVM_VAX -DVAX_780 -DUSE_INT64 -DUSE_ADDR64 -I VAX -I ${PDP11D} ${NETWORK_OPT}

4
scp.h
View File

@ -72,7 +72,10 @@ t_stat brk_cmd (int32 flag, char *ptr);
t_stat do_cmd (int32 flag, char *ptr);
t_stat goto_cmd (int32 flag, char *ptr);
t_stat return_cmd (int32 flag, char *ptr);
t_stat shift_cmd (int32 flag, char *ptr);
t_stat call_cmd (int32 flag, char *ptr);
t_stat on_cmd (int32 flag, char *ptr);
t_stat noop_cmd (int32 flag, char *ptr);
t_stat assert_cmd (int32 flag, char *ptr);
t_stat help_cmd (int32 flag, char *ptr);
t_stat spawn_cmd (int32 flag, char *ptr);
@ -83,6 +86,7 @@ t_stat echo_cmd (int32 flag, char *ptr);
t_stat sim_process_event (void);
t_stat sim_activate (UNIT *uptr, int32 interval);
t_stat sim_activate_abs (UNIT *uptr, int32 interval);
t_stat sim_activate_notbefore (UNIT *uptr, int32 rtime);
t_stat sim_cancel (UNIT *uptr);
int32 sim_is_active (UNIT *uptr);
double sim_gtime (void);

168
sim_defs.h
View File

@ -373,7 +373,6 @@ struct sim_unit {
void (*a_check_completion)(struct sim_unit *);
struct sim_unit *a_next; /* next asynch active */
int32 a_event_time;
int32 a_sim_interval;
t_stat (*a_activate_call)(struct sim_unit *, int32);
#endif
};
@ -569,35 +568,40 @@ extern pthread_mutex_t sim_asynch_lock;
extern pthread_cond_t sim_asynch_wake;
extern pthread_t sim_asynch_main_threadid;
extern struct sim_unit *sim_asynch_queue;
extern t_bool sim_idle_wait;
extern volatile t_bool sim_idle_wait;
extern t_bool sim_asynch_enabled;
extern int32 sim_asynch_check;
extern int32 sim_asynch_latency;
extern int32 sim_asynch_inst_latency;
#define AIO_LIST_END ((void *)1) /* Chosen to deliberately not be a valid pointer (alignment) */
#define AIO_INIT \
if (1) { \
sim_asynch_main_threadid = pthread_self(); \
/* Empty list/list end uses the point value (void *)-1. \
/* Empty list/list end uses the point value (void *)1. \
This allows NULL in an entry's a_next pointer to \
indicate that the entry is not currently in any list */ \
sim_asynch_queue = (void *)-1; \
sim_asynch_queue = AIO_LIST_END; \
}
#define AIO_CLEANUP \
if (1) { \
pthread_mutex_destroy(&sim_asynch_lock); \
pthread_cond_destroy(&sim_asynch_wake); \
}
#if defined(__DECC_VER)
#include <builtins>
#if defined(__IA64)
#define USE_AIO_INTRINSICS 1
#endif
#endif
#if defined(_WIN32) || defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) || defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
#define USE_AIO_INTRINSICS 1
#endif
#ifdef USE_AIO_INTRINSICS
/* This approach uses intrinsics to manage access to the link list head */
/* sim_asynch_queue. However, once the list head state has been determined */
/* a lock is used to manage the list update and entry removal. */
/* This approach avoids the ABA issues with a completly lock free approach */
/* since the ABA problem is very likely to happen with this use model, and */
/* it avoids the lock overhead for the simple list head checking. */
/* sim_asynch_queue. This implementation is a completely lock free design */
/* which avoids the potential ABA issues. */
#ifdef _WIN32
#include <winsock2.h>
#ifdef ERROR
@ -605,76 +609,90 @@ extern int32 sim_asynch_inst_latency;
#endif /* ERROR */
#elif defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) || defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8)
#define InterlockedCompareExchangePointer(Destination, Exchange, Comparand) __sync_val_compare_and_swap(Destination, Comparand, Exchange)
#define InterlockedExchangePointer(Destination, value) __sync_lock_test_and_set(Destination, value)
#elif defined(__DECC_VER)
#define InterlockedCompareExchangePointer(Destination, Exchange, Comparand) (void *)((int32)_InterlockedCompareExchange64(Destination, Exchange, Comparand))
#else
#error "Implementation of functions InterlockedCompareExchangePointer() and InterlockedExchangePointer() are needed to build with USE_AIO_INTRINSICS"
#error "Implementation of function InterlockedCompareExchangePointer() is needed to build with USE_AIO_INTRINSICS"
#endif
#define AIO_QUEUE_VAL InterlockedCompareExchangePointer(&sim_asynch_queue, sim_asynch_queue, NULL)
#define AIO_QUEUE_SET(val) InterlockedExchangePointer(&sim_asynch_queue, val)
#define AIO_QUEUE_SET(val, queue) InterlockedCompareExchangePointer(&sim_asynch_queue, val, queue)
#define AIO_UPDATE_QUEUE \
if (1) { \
UNIT *uptr; \
if (AIO_QUEUE_VAL != (void *)-1) { \
pthread_mutex_lock (&sim_asynch_lock); \
while ((uptr = AIO_QUEUE_VAL) != (void *)-1) { \
int32 a_event_time; \
AIO_QUEUE_SET(uptr->a_next); \
uptr->a_next = NULL; /* hygiene */ \
a_event_time = uptr->a_event_time-(uptr->a_sim_interval-sim_interval); \
if (a_event_time < 0) a_event_time = 0; \
uptr->a_activate_call (uptr, a_event_time); \
if (uptr->a_check_completion) { \
pthread_mutex_unlock (&sim_asynch_lock); \
uptr->a_check_completion (uptr); \
pthread_mutex_lock (&sim_asynch_lock); \
} \
} \
pthread_mutex_unlock (&sim_asynch_lock); \
if (AIO_QUEUE_VAL != AIO_LIST_END) { /* List !Empty */ \
UNIT *q, *uptr; \
int32 a_event_time; \
do \
q = AIO_QUEUE_VAL; \
while (q != AIO_QUEUE_SET(AIO_LIST_END, q)); \
while (q != AIO_LIST_END) { /* List !Empty */ \
uptr = q; \
q = q->a_next; \
uptr->a_next = NULL; /* hygiene */ \
if (uptr->a_activate_call != &sim_activate_notbefore) { \
a_event_time = uptr->a_event_time-((sim_asynch_inst_latency+1)/2); \
if (a_event_time < 0) \
a_event_time = 0; \
} \
else \
a_event_time = uptr->a_event_time; \
uptr->a_activate_call (uptr, a_event_time); \
if (uptr->a_check_completion) \
uptr->a_check_completion (uptr); \
} \
sim_asynch_check = sim_asynch_inst_latency; \
}
#define AIO_ACTIVATE(caller, uptr, event_time) \
if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) { \
pthread_mutex_lock (&sim_asynch_lock); \
if (uptr->a_next) { \
uptr->a_activate_call = sim_activate_abs; \
} else { \
uptr->a_next = AIO_QUEUE_VAL; \
uptr->a_event_time = event_time; \
uptr->a_sim_interval = sim_interval; \
uptr->a_activate_call = caller; \
AIO_QUEUE_SET(uptr); \
} \
if (sim_idle_wait) \
pthread_cond_signal (&sim_asynch_wake); \
pthread_mutex_unlock (&sim_asynch_lock); \
return SCPE_OK; \
}
} else 0
#define AIO_ACTIVATE(caller, uptr, event_time) \
if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) { \
if (uptr->a_next) { \
uptr->a_activate_call = sim_activate_abs; \
} else { \
UNIT *q, *qe; \
uptr->a_event_time = event_time; \
uptr->a_activate_call = sim_activate; \
uptr->a_next = AIO_LIST_END; /* Mark as on list */ \
do { \
do \
q = AIO_QUEUE_VAL; \
while (q != AIO_QUEUE_SET(AIO_LIST_END, q));/* Grab current list */ \
for (qe = uptr; qe->a_next != AIO_LIST_END; qe = qe->a_next); \
qe->a_next = q; /* append current list */\
do \
q = AIO_QUEUE_VAL; \
while (q != AIO_QUEUE_SET(uptr, q)); \
uptr = q; \
} while (uptr != AIO_LIST_END); \
} \
if (sim_idle_wait) \
pthread_cond_signal (&sim_asynch_wake); \
return SCPE_OK; \
} else 0
#else /* !USE_AIO_INTRINSICS */
/* This approach uses a pthread mutex to manage access to the link list */
/* head sim_asynch_queue. It will always work, but may be slower than the */
/* partially lock free approach when using USE_AIO_INTRINSICS */
#define AIO_UPDATE_QUEUE \
if (1) { \
UNIT *uptr; \
pthread_mutex_lock (&sim_asynch_lock); \
while (sim_asynch_queue != (void *)-1) { /* List !Empty */ \
int32 a_event_time; \
uptr = sim_asynch_queue; \
sim_asynch_queue = uptr->a_next; \
uptr->a_next = NULL; \
a_event_time = uptr->a_event_time-(uptr->a_sim_interval-sim_interval); \
if (a_event_time < 0) a_event_time = 0; \
uptr->a_activate_call (uptr, a_event_time); \
if (uptr->a_check_completion) { \
pthread_mutex_unlock (&sim_asynch_lock); \
uptr->a_check_completion (uptr); \
pthread_mutex_lock (&sim_asynch_lock); \
} \
} \
pthread_mutex_unlock (&sim_asynch_lock); \
sim_asynch_check = sim_asynch_inst_latency; \
}
/* lock free approach when using USE_AIO_INTRINSICS */
#define AIO_UPDATE_QUEUE \
if (1) { \
UNIT *uptr; \
pthread_mutex_lock (&sim_asynch_lock); \
while (sim_asynch_queue != AIO_LIST_END) { /* List !Empty */ \
int32 a_event_time; \
uptr = sim_asynch_queue; \
sim_asynch_queue = uptr->a_next; \
uptr->a_next = NULL; \
if (uptr->a_activate_call != &sim_activate_notbefore) { \
a_event_time = uptr->a_event_time-((sim_asynch_inst_latency+1)/2); \
if (a_event_time < 0) \
a_event_time = 0; \
} \
else \
a_event_time = uptr->a_event_time; \
uptr->a_activate_call (uptr, a_event_time); \
if (uptr->a_check_completion) { \
pthread_mutex_unlock (&sim_asynch_lock); \
uptr->a_check_completion (uptr); \
pthread_mutex_lock (&sim_asynch_lock); \
} \
} \
pthread_mutex_unlock (&sim_asynch_lock); \
} else 0
#define AIO_ACTIVATE(caller, uptr, event_time) \
if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) { \
pthread_mutex_lock (&sim_asynch_lock); \
@ -683,7 +701,6 @@ extern int32 sim_asynch_inst_latency;
} else { \
uptr->a_next = sim_asynch_queue; \
uptr->a_event_time = event_time; \
uptr->a_sim_interval = sim_interval; \
uptr->a_activate_call = caller; \
sim_asynch_queue = uptr; \
} \
@ -691,19 +708,20 @@ extern int32 sim_asynch_inst_latency;
pthread_cond_signal (&sim_asynch_wake); \
pthread_mutex_unlock (&sim_asynch_lock); \
return SCPE_OK; \
}
} else 0
#endif /* USE_AIO_INTRINSICS */
#define AIO_VALIDATE if (!pthread_equal ( pthread_self(), sim_asynch_main_threadid )) abort()
#define AIO_CHECK_EVENT \
if (0 > --sim_asynch_check) { \
AIO_UPDATE_QUEUE; \
}
sim_asynch_check = sim_asynch_inst_latency; \
} else 0
#define AIO_SET_INTERRUPT_LATENCY(instpersec) \
if (1) { \
sim_asynch_inst_latency = (int32)((((double)(instpersec))*sim_asynch_latency)/1000000000);\
if (sim_asynch_inst_latency == 0) \
sim_asynch_inst_latency = 1; \
}
} else 0
#else /* !SIM_ASYNCH_IO */
#define AIO_UPDATE_QUEUE
#define AIO_ACTIVATE(caller, uptr, event_time)

23
sim_disk.c
View File

@ -733,9 +733,11 @@ static void _sim_disk_io_flush (UNIT *uptr)
uint32 f = DK_GET_FMT (uptr);
#if defined (SIM_ASYNCH_IO)
struct disk_context *ctx = (struct disk_context *)uptr->disk_ctx;
sim_disk_clr_async (uptr);
if (sim_asynch_enabled)
sim_disk_set_async (uptr, 0);
sim_disk_set_async (uptr, ctx->asynch_io_latency);
#endif
switch (f) { /* case on format */
case DKUF_F_STD: /* Simh */
@ -760,7 +762,8 @@ return stat;
}
t_stat sim_disk_attach (UNIT *uptr, char *cptr, size_t sector_size, size_t xfer_element_size, t_bool dontautosize, uint32 dbit, const char *dtype, uint32 pdp11tracksize)
t_stat sim_disk_attach (UNIT *uptr, char *cptr, size_t sector_size, size_t xfer_element_size, t_bool dontautosize,
uint32 dbit, const char *dtype, uint32 pdp11tracksize, int completion_delay)
{
struct disk_context *ctx;
DEVICE *dptr;
@ -797,7 +800,7 @@ if (sim_switches & SWMASK ('D')) { /* create difference dis
vhd = sim_vhd_disk_create_diff (gbuf, cptr);
if (vhd) {
sim_vhd_disk_close (vhd);
return sim_disk_attach (uptr, gbuf, sector_size, xfer_element_size, dontautosize, dbit, dtype, pdp11tracksize);
return sim_disk_attach (uptr, gbuf, sector_size, xfer_element_size, dontautosize, dbit, dtype, pdp11tracksize, completion_delay);
}
return SCPE_ARG;
}
@ -816,7 +819,7 @@ if (sim_switches & SWMASK ('C')) { /* create vhd disk & cop
sim_switches |= SWMASK ('R') | SWMASK ('E');
sim_quiet = TRUE;
/* First open the source of the copy operation */
r = sim_disk_attach (uptr, cptr, sector_size, xfer_element_size, dontautosize, dbit, dtype, pdp11tracksize);
r = sim_disk_attach (uptr, cptr, sector_size, xfer_element_size, dontautosize, dbit, dtype, pdp11tracksize, completion_delay);
sim_quiet = saved_sim_quiet;
if (r != SCPE_OK) {
sim_switches = saved_sim_switches;
@ -1013,7 +1016,7 @@ if (capac && (capac != (t_addr)-1))
uptr->capac = capac/ctx->capac_factor;
#if defined (SIM_ASYNCH_IO)
sim_disk_set_async (uptr, 0);
sim_disk_set_async (uptr, completion_delay);
#endif
uptr->io_flush = _sim_disk_io_flush;
@ -1070,6 +1073,16 @@ if (close_function (fileref) == EOF)
return SCPE_OK;
}
t_stat sim_disk_reset (UNIT *uptr)
{
if (!(uptr->flags & UNIT_ATT)) /* attached? */
return SCPE_OK;
_sim_disk_io_flush(uptr);
AIO_VALIDATE;
AIO_UPDATE_QUEUE;
return SCPE_OK;
}
/* Factory bad block table creation routine
This routine writes a DEC standard 044 compliant bad block table on the

4
sim_disk.h
View File

@ -64,7 +64,8 @@ typedef void (*DISK_PCALLBACK)(UNIT *unit, t_stat status);
/* Prototypes */
t_stat sim_disk_attach (UNIT *uptr, char *cptr, size_t sector_size, size_t xfer_element_size, t_bool dontautosize, uint32 debugbit, const char *drivetype, uint32 pdp11_tracksize);
t_stat sim_disk_attach (UNIT *uptr, char *cptr, size_t sector_size, size_t xfer_element_size, t_bool dontautosize,
uint32 debugbit, const char *drivetype, uint32 pdp11_tracksize, int completion_delay);
t_stat sim_disk_detach (UNIT *uptr);
t_stat sim_disk_rdsect (UNIT *uptr, t_lba lba, uint8 *buf, t_seccnt *sectsread, t_seccnt sects);
t_stat sim_disk_rdsect_a (UNIT *uptr, t_lba lba, uint8 *buf, t_seccnt *sectsread, t_seccnt sects, DISK_PCALLBACK callback);
@ -77,6 +78,7 @@ t_stat sim_disk_set_capac (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat sim_disk_show_capac (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat sim_disk_set_asynch (UNIT *uptr, int latency);
t_stat sim_disk_clr_asynch (UNIT *uptr);
t_stat sim_disk_reset (UNIT *uptr);
t_bool sim_disk_isavailable (UNIT *uptr);
t_bool sim_disk_isavailable_a (UNIT *uptr, DISK_PCALLBACK callback);
t_bool sim_disk_wrp (UNIT *uptr);

94
sim_ether.c
View File

@ -163,6 +163,7 @@
Modification history:
30-Mar-12 MP Added host NIC address determination on supported VMS platforms
01-Mar-12 MP Made host NIC address determination on *nix platforms more
robust.
01-Mar-12 MP Added host NIC address determination work when building
@ -1216,6 +1217,94 @@ static int pcap_mac_if_win32(char *AdapterName, unsigned char MACAddress[6])
#endif
return ReturnValue;
}
#endif /* defined(_WIN32) || defined(__CYGWIN__) */
#if defined (__VMS) && !defined(__VAX)
#include <descrip.h>
#include <iodef.h>
#include <ssdef.h>
#include <starlet.h>
#include <stdio.h>
#include <stsdef.h>
#include <nmadef.h>
static int pcap_mac_if_vms(char *AdapterName, unsigned char MACAddress[6])
{
char VMS_Device[16];
$DESCRIPTOR(Device, VMS_Device);
unsigned short iosb[4];
unsigned short *w;
unsigned char *pha = NULL;
unsigned char *hwa = NULL;
int tmpval;
int status;
unsigned short characteristics[512];
long chardesc[] = {sizeof(characteristics), (long)&characteristics};
unsigned short chan;
#pragma member_alignment save
#pragma nomember_alignment
static struct {
short fmt;
long val_fmt;
short pty;
long val_pty;
short pad;
long val_pad;
} setup = {
NMA$C_PCLI_FMT, NMA$C_LINFM_ETH,
NMA$C_PCLI_PTY, 0x0090,
NMA$C_PCLI_PAD, NMA$C_STATE_OFF,
};
#pragma member_alignment restore
long setupdesc[] = {sizeof(setup), (long)&setup};
/* Convert Interface Name to VMS Device Name */
/* This is a name shuffle */
/* WE0 becomes EWA0: */
/* SE1 becomes ESB0: */
/* XE0 becomes EXA0: */
tmpval = (int)(AdapterName[2]-'0');
if ((tmpval < 0) || (tmpval > 25))
return -1;
VMS_Device[0] = toupper(AdapterName[1]);
VMS_Device[1] = toupper(AdapterName[0]);
VMS_Device[2] = 'A' + tmpval;
VMS_Device[3] = '0';
VMS_Device[4] = '\0';
VMS_Device[5] = '\0';
Device.dsc$w_length = strlen(VMS_Device);
if (!$VMS_STATUS_SUCCESS( sys$assign (&Device, &chan, 0, 0, 0) ))
return -1;
status = sys$qiow (0, chan, IO$_SETMODE|IO$M_CTRL|IO$M_STARTUP, &iosb, 0, 0,
0, &setupdesc, 0, 0, 0, 0);
if ((!$VMS_STATUS_SUCCESS(status)) || (!$VMS_STATUS_SUCCESS(iosb[0]))) {
sys$dassgn(chan);
return -1;
}
status = sys$qiow (0, chan, IO$_SENSEMODE|IO$M_CTRL, &iosb, 0, 0,
0, &chardesc, 0, 0, 0, 0);
sys$dassgn(chan);
if ((!$VMS_STATUS_SUCCESS(status)) || (!$VMS_STATUS_SUCCESS(iosb[0])))
return -1;
for (w=characteristics; w < &characteristics[iosb[1]]; ) {
if ((((*w)&0xFFF) == NMA$C_PCLI_HWA) && (6 == *(w+1)))
hwa = (unsigned char *)(w + 2);
if ((((*w)&0xFFF) == NMA$C_PCLI_PHA) && (6 == *(w+1)))
pha = (unsigned char *)(w + 2);
if (((*w)&0x1000) == 0)
w += 3; /* Skip over Longword Parameter */
else
w += (2 + ((1 + *(w+1))/2)); /* Skip over String Parameter */
}
if (pha != NULL) /* Prefer Physical Address */
memcpy(MACAddress, pha, 6);
else
if (hwa != NULL) /* Fallback to Hardware Address */
memcpy(MACAddress, hwa, 6);
else
return -1;
return 0;
}
#endif
static void eth_get_nic_hw_addr(ETH_DEV* dev, char *devname)
@ -1225,7 +1314,10 @@ static void eth_get_nic_hw_addr(ETH_DEV* dev, char *devname)
#if defined(_WIN32) || defined(__CYGWIN__)
if (!pcap_mac_if_win32(devname, dev->host_nic_phy_hw_addr))
dev->have_host_nic_phy_addr = 1;
#elif !defined (__VMS) && !defined(__CYGWIN__)
#elif defined (__VMS) && !defined(__VAX)
if (!pcap_mac_if_vms(devname, dev->host_nic_phy_hw_addr))
dev->have_host_nic_phy_addr = 1;
#elif !defined(__CYGWIN__) && !defined(__VMS)
if (1) {
char command[1024];
FILE *f;

17
sim_tape.c
View File

@ -151,6 +151,7 @@ if ((!callback) || !ctx->asynch_io)
struct tape_context *ctx = \
(struct tape_context *)uptr->tape_ctx; \
\
pthread_mutex_lock (&ctx->io_lock); \
\
sim_debug (ctx->dbit, ctx->dptr, \
"sim_tape AIO_CALL(op=%d, unit=%d)\n", op, uptr-ctx->dptr->units);\
@ -168,6 +169,7 @@ if ((!callback) || !ctx->asynch_io)
ctx->objupdate = _obj; \
ctx->callback = _callback; \
pthread_cond_signal (&ctx->io_cond); \
pthread_mutex_unlock (&ctx->io_lock); \
} \
else \
if (_callback) \
@ -367,9 +369,11 @@ return SCPE_OK;
static void _sim_tape_io_flush (UNIT *uptr)
{
#if defined (SIM_ASYNCH_IO)
struct tape_context *ctx = (struct tape_context *)uptr->tape_ctx;
sim_tape_clr_async (uptr);
if (sim_asynch_enabled)
sim_tape_set_async (uptr, 0);
sim_tape_set_async (uptr, ctx->asynch_io_latency);
#endif
fflush (uptr->fileref);
}
@ -378,10 +382,10 @@ fflush (uptr->fileref);
t_stat sim_tape_attach (UNIT *uptr, char *cptr)
{
return sim_tape_attach_ex (uptr, cptr, 0);
return sim_tape_attach_ex (uptr, cptr, 0, 0);
}
t_stat sim_tape_attach_ex (UNIT *uptr, char *cptr, uint32 dbit)
t_stat sim_tape_attach_ex (UNIT *uptr, char *cptr, uint32 dbit, int completion_delay)
{
struct tape_context *ctx;
uint32 objc;
@ -429,7 +433,7 @@ ctx->dbit = dbit; /* save debug bit */
sim_tape_rewind (uptr);
#if defined (SIM_ASYNCH_IO)
sim_tape_set_async (uptr, 0);
sim_tape_set_async (uptr, completion_delay);
#endif
uptr->io_flush = _sim_tape_io_flush;
@ -1711,6 +1715,11 @@ return r;
t_stat sim_tape_reset (UNIT *uptr)
{
MT_CLR_PNU (uptr);
if (!(uptr->flags & UNIT_ATT)) /* attached? */
return SCPE_OK;
_sim_tape_io_flush(uptr);
AIO_VALIDATE;
AIO_UPDATE_QUEUE;
return SCPE_OK;
}

2
sim_tape.h
View File

@ -121,7 +121,7 @@ typedef void (*TAPE_PCALLBACK)(UNIT *unit, t_stat status);
/* Prototypes */
t_stat sim_tape_attach_ex (UNIT *uptr, char *cptr, uint32 dbit);
t_stat sim_tape_attach_ex (UNIT *uptr, char *cptr, uint32 dbit, int completion_delay);
t_stat sim_tape_attach (UNIT *uptr, char *cptr);
t_stat sim_tape_detach (UNIT *uptr);
t_stat sim_tape_rdrecf (UNIT *uptr, uint8 *buf, t_mtrlnt *bc, t_mtrlnt max);

5
sim_timer.c
View File

@ -80,7 +80,7 @@
#include <ctype.h>
t_bool sim_idle_enab = FALSE; /* global flag */
t_bool sim_idle_wait = FALSE; /* global flag */
volatile t_bool sim_idle_wait = FALSE; /* global flag */
static uint32 sim_idle_rate_ms = 0;
static uint32 sim_idle_stable = SIM_IDLE_STDFLT;
@ -457,7 +457,8 @@ if (done_time.tv_nsec > 1000000000) {
}
pthread_mutex_lock (&sim_asynch_lock);
sim_idle_wait = TRUE;
pthread_cond_timedwait (&sim_asynch_wake, &sim_asynch_lock, &done_time);
if (!pthread_cond_timedwait (&sim_asynch_wake, &sim_asynch_lock, &done_time))
sim_asynch_check = 0; /* force check of asynch queue now */
sim_idle_wait = FALSE;
pthread_mutex_unlock (&sim_asynch_lock);
return sim_os_msec() - start_time;