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Notes For V3.2-0
RESTRICTION: The PDP-15 FPP is only partially debugged. Do NOT enable this feature for normal operations. WARNING: The core simulator files (scp.c, sim_*.c) have been reorganized. Unzip V3.2-0 to an empty directory before attempting to compile the source. IMPORTANT: If you are compiling for UNIX, please read the notes for Ethernet very carefully. You may need to download a new version of the pcap library, or make changes to the makefile, to get Ethernet support to work. 1. New Features in 3.2-0 1.1 SCP and libraries - Added SHOW <device> RADIX command. - Added SHOW <device> MODIFIERS command. - Added SHOW <device> NAMES command. - Added SET/SHOW <device> DEBUG command. - Added sim_vm_parse_addr and sim_vm_fprint_addr optional interfaces. - Added REG_VMAD flag. - Split SCP into separate libraries for easier modification. - Added more room to the device and unit flag fields. - Changed terminal multiplexor library to support unlimited. number of async lines. 1.2 All DECtapes - Added STOP_EOR flag to enable end-of-reel error stop - Added device debug support. 1.3 Nova and Eclipse - Added QTY and ALM multiplexors (Bruce Ray). 1.4 LGP-30 - Added LGP-30/LGP-21 simulator. 1.5 PDP-11 - Added format, address increment inhibit, transfer overrun detection to RK. - Added device debug support to HK, RP, TM, TQ, TS. - Added DEUNA/DELUA (XU) support (Dave Hittner). - Add DZ per-line logging. 1.6 18b PDP's - Added support for 1-4 (PDP-9)/1-16 (PDP-15) additional terminals. 1.7 PDP-10 - Added DEUNA/DELUA (XU) support (Dave Hittner). 1.8 VAX - Added extended memory to 512MB (Mark Pizzolato). - Added RXV21 support. 2. Bugs Fixed in 3.2-0 2.1 SCP - Fixed double logging of SHOW BREAK (found by Mark Pizzolato). - Fixed implementation of REG_VMIO. 2.2 Nova and Eclipse - Fixed device enable/disable support (found by Bruce Ray). 2.3 PDP-1 - Fixed bug in LOAD (found by Mark Crispin). 2.4 PDP-10 - Fixed bug in floating point unpack. - Fixed bug in FIXR (found by Phil Stone, fixed by Chris Smith). 2.6 PDP-11 - Fixed bug in RQ interrupt control (found by Tom Evans). 2.6 PDP-18B - Fixed bug in PDP-15 XVM g_mode implementation. - Fixed bug in PDP-15 indexed address calculation. - Fixed bug in PDP-15 autoindexed address calculation. - Fixed bugs in FPP-15 instruction decode. - Fixed clock response to CAF. - Fixed bug in hardware read-in mode bootstrap. - Fixed PDP-15 XVM instruction decoding errors. 2.7 VAX - Fixed PC read fault in EXTxV. - Fixed PC write fault in INSV.
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
1da2d9452d
commit
26aa6de663
@@ -1,6 +1,6 @@
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/* id16_cpu.c: Interdata 16b CPU simulator
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Copyright (c) 2000-2003, Robert M. Supnik
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Copyright (c) 2000-2004, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -1,6 +1,6 @@
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/* id16_dboot.c: Interdata 16b simulator disk bootstrap
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Copyright (c) 2000-2003, Robert M. Supnik
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Copyright (c) 2000-2004, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -1,6 +1,6 @@
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/* id16_sys.c: Interdata 16b simulator interface
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Copyright (c) 2000-2003, Robert M. Supnik
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Copyright (c) 2000-2004, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -23,6 +23,7 @@
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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26-Mar-04 RMS Fixed warning with -std=c99
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27-Feb-03 RMS Added relative addressing support
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*/
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@@ -47,7 +48,7 @@ extern uint16 *M;
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t_stat fprint_sym_m (FILE *of, t_addr addr, t_value *val, t_bool cf);
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t_stat parse_sym_m (char *cptr, t_addr addr, t_value *val, t_bool cf);
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extern t_stat lp_load (FILE *fileref, char *cptr, char *fnam);
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extern pt_dump (FILE *of, char *cptr, char *fnam);
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extern t_stat pt_dump (FILE *of, char *cptr, char *fnam);
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/* SCP data structures and interface routines
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@@ -25,6 +25,7 @@
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cpu Interdata 32b CPU
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25-Jan-04 RMS Revised for device debug support
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31-Dec-03 RMS Fixed bug in cpu_set_hist
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22-Sep-03 RMS Added additional instruction decode types
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Added instruction history
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@@ -191,6 +192,11 @@ struct InstHistory {
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#define ABS(x) (((x) & SIGN32)? NEG (x): (x))
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#define DNEG(x,y) y = NEG (y); \
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x = (~(x) + (y == 0)) & DMASK32
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/* Logging */
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#define LOG_CPU_I 0x0001 /* intr/exception */
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#define LOG_CPU_C 0x0002 /* context change */
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uint32 GREG[16 * NRSETS] = { 0 }; /* general registers */
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uint32 *M = NULL; /* memory */
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@@ -219,7 +225,6 @@ REG *pcq_r = NULL; /* PC queue reg ptr */
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uint32 dec_flgs = 0; /* decode flags */
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uint32 fp_in_hwre = 0; /* ucode vs hwre fp */
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uint32 pawidth = PAWIDTH32; /* addr mask */
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uint32 cpu_log = 0; /* debug logging */
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uint32 hst_p = 0; /* history pointer */
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uint32 hst_lnt = 0; /* history length */
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struct InstHistory *hst = NULL; /* instruction history */
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@@ -231,7 +236,7 @@ extern int32 sim_interval;
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extern int32 sim_int_char;
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extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
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extern UNIT pic_unit, lfc_unit, pas_unit; /* timers */
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extern FILE *sim_log;
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extern FILE *sim_deb;
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uint32 ReadB (uint32 loc, uint32 rel);
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uint32 ReadH (uint32 loc, uint32 rel);
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@@ -538,7 +543,6 @@ REG cpu_reg[] = {
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{ BRDATA (PCQ, pcq, 16, 20, PCQ_SIZE), REG_RO+REG_CIRC },
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{ HRDATA (PCQP, pcq_p, 6), REG_HRO },
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{ HRDATA (WRU, sim_int_char, 8) },
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{ HRDATA (DBGLOG, cpu_log, 16), REG_HIDDEN },
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{ HRDATA (BLKIOD, blk_io.dfl, 16), REG_HRO },
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{ HRDATA (BLKIOC, blk_io.cur, 20), REG_HRO },
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{ HRDATA (BLKIOE, blk_io.end, 20), REG_HRO },
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@@ -561,12 +565,18 @@ MTAB cpu_mod[] = {
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&cpu_set_hist, &cpu_show_hist },
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{ 0 } };
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DEBTAB cpu_deb[] = {
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{ "INTEXC", LOG_CPU_I },
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{ "CONTEXT", LOG_CPU_C },
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{ NULL, 0 } };
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DEVICE cpu_dev = {
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"CPU", &cpu_unit, cpu_reg, cpu_mod,
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1, 16, 20, 1, 16, 8,
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&cpu_ex, &cpu_dep, &cpu_reset,
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NULL, NULL, NULL,
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&cpu_dib, 0 };
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&cpu_dib, DEV_DEBUG, 0,
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cpu_deb, NULL, NULL };
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t_stat sim_instr (void)
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{
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@@ -1307,7 +1317,7 @@ case 0xE1: /* SVC - RX */
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R[14] = t; /* old PSW */
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R[15] = PC; /* old PC */
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PC = ReadH (SVNPC + r1 + r1, P); /* new PC */
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if (DBG_LOG (LOG_CPU_C)) fprintf (sim_log,
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if (DEBUG_PRI (cpu_dev, LOG_CPU_C)) fprintf (sim_deb,
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">>SVC: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
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pcq[pcq_p], t, PC, PSW);
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break;
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@@ -1341,7 +1351,7 @@ case 0xE3: /* SCP - RXH */
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case 0x18: /* LPSWR - RR */
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PCQ_ENTRY; /* effective branch */
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PC = R[(r2 + 1) & 0xF] & VAMASK; /* new PC (old reg set) */
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if (DBG_LOG (LOG_CPU_C)) fprintf (sim_log,
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if (DEBUG_PRI (cpu_dev, LOG_CPU_C)) fprintf (sim_deb,
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">>LPSWR: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
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pcq[pcq_p], BUILD_PSW (cc), PC, opnd);
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cc = newPSW (opnd); /* new PSW */
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@@ -1351,7 +1361,7 @@ case 0x18: /* LPSWR - RR */
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case 0xC2: /* LPSW - RXF */
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PCQ_ENTRY; /* effective branch */
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PC = ReadF ((ea + 4) & VAMASK, VR) & VAMASK; /* new PC */
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if (DBG_LOG (LOG_CPU_C)) fprintf (sim_log,
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if (DEBUG_PRI (cpu_dev, LOG_CPU_C)) fprintf (sim_deb,
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">>LPSW: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
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pcq[pcq_p], BUILD_PSW (cc), PC, opnd);
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cc = newPSW (opnd); /* new PSW */
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@@ -1587,7 +1597,7 @@ if (cpu_unit.flags & UNIT_832) { /* 8/32? */
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R[15] = oldPC; } /* PC to new 15 */
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else { GREG[14] = oldPSW; /* 7/32, PSW to set 0 14 */
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GREG[15] = oldPC; } /* PC to set 0 15 */
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if (DBG_LOG (LOG_CPU_C)) fprintf (sim_log,
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if (DEBUG_PRI (cpu_dev, LOG_CPU_I)) fprintf (sim_deb,
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">>Exc %X: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
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loc, oldPC, oldPSW, PC, PSW | cc | flg);
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return cc | flg; /* return CC */
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@@ -1672,7 +1682,7 @@ newPSW (0x2800); /* new PSW */
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R[0] = oldPSW; /* save old PSW */
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R[1] = PC; /* save PC */
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R[2] = dev; /* set dev # */
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if (DBG_LOG (LOG_CPU_C)) fprintf (sim_log,
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if (DEBUG_PRI (cpu_dev, LOG_CPU_I)) fprintf (sim_deb,
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">>Int %X: oPC = %X, oPSW = %X, nPC = %X, nPSW = %X\n",
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dev, PC, oldPSW, vec, 0x2800);
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if (DEV_ACC (dev)) { /* dev exist? */
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@@ -1,6 +1,6 @@
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/* id32_dboot.c: Interdata 32b simulator disk bootstrap
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Copyright (c) 2000-2003, Robert M. Supnik
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Copyright (c) 2000-2004, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -1,6 +1,6 @@
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/* id32_sys.c: Interdata 32b simulator interface
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Copyright (c) 2000-2003, Robert M. Supnik
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Copyright (c) 2000-2004, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -1,6 +1,6 @@
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/* id_defs.h: Interdata 16b/32b simulator definitions
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Copyright (c) 2000-2003, Robert M. Supnik
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Copyright (c) 2000-2004, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -26,6 +26,7 @@
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The author gratefully acknowledges the help of Carl Friend and Al Kossow,
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who provided key documents about the Interdata product line.
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25-Jan-04 RMS Removed local logging support
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22-Sep-03 RMS Added additional instruction decode types
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21-Jun-03 RMS Changed subroutine argument for ARM compiler conflict
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25-Apr-03 RMS Revised for extended file support
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@@ -457,17 +458,6 @@ typedef struct interdib DIB;
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#define MIN(x,y) (((x) < (y))? (x): (y))
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#define MAX(x,y) (((x) > (y))? (x): (y))
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/* Logging */
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#define LOG_CPU_I 0x0001 /* instructions */
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#define LOG_CPU_C 0x0002 /* context change */
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#define LOG_DP 0x0010
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#define LOG_IDC 0x0020
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#define LOG_MT 0x0040
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#define LOG_FD 0x0080
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#define DBG_LOG(x) (sim_log && (cpu_log & (x)))
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/* Function prototypes */
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int32 int_chg (uint32 irq, int32 dat, int32 armdis);
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@@ -1,14 +1,14 @@
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To: Users
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From: Bob Supnik
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Subj: Interdata 16b/32b Simulator Usage
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Date: 15-Jul-2003
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Date: 15-Feb-2004
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COPYRIGHT NOTICE
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The following copyright notice applies to both the SIMH source and binary:
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Original code published in 1993-2003, written by Robert M Supnik
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Copyright (c) 1993-2003, Robert M Supnik
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Original code published in 1993-2004, written by Robert M Supnik
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Copyright (c) 1993-2004, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -36,15 +36,21 @@ This memorandum documents the Interdata 16b and 32b simulators.
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1. Simulator Files
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sim/ sim_defs.h
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sim/ scp.h
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sim_console.h
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sim_defs.h
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sim_fio.h
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sim_rev.h
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sim_sock.h
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sim_tape.h
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sim_timer.h
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sim_tmxr.h
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scp.c
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scp_tty.c
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sim_console.c
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sim_fio.c
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sim_sock.c
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sim_tape.c
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sim_timer.c
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sim_tmxr.c
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sim/interdata/ id_defs.h
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@@ -596,7 +602,13 @@ automatically to upper case. In 7B mode, input and output characters are
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masked to 7 bits. In 8B mode, characters are not modified. The default
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mode is UC. Each line (each unit of PASL) can also be set for modem
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control with the command SET PASLn DATASET. The defaults are 7b mode
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and DATASET disabled.
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and DATASET disabled. Finally, each line supports output logging.
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The SET PASLn LOG command enables logging on a line:
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SET PASLn LOG=filename log output of line n to filename
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The SET PASLn NOLOG command disables logging and closes the open log
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file, if any.
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Once PAS is attached and the simulator is running, the terminals listen
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for connections on the specified port. They assume that the incoming
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@@ -1,6 +1,6 @@
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/* id_dp.c: Interdata 2.5MB/10MB cartridge disk simulator
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Copyright (c) 2001-2003, Robert M. Supnik
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Copyright (c) 2001-2004, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -25,6 +25,7 @@
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dp M46-421 2.5MB/10MB cartridge disk
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25-Jan-04 RMS Revised for device debug support
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25-Apr-03 RMS Revised for extended file support
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16-Feb-03 RMS Fixed read to test transfer ok before selch operation
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*/
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@@ -136,7 +137,7 @@ static struct drvtyp drv_tab[] = {
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{ 0 } };
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extern uint32 int_req[INTSZ], int_enb[INTSZ];
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extern FILE *sim_log;
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extern FILE *sim_deb;
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uint8 dpxb[DP_NUMBY]; /* xfer buffer */
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uint32 dp_bptr = 0; /* buffer ptr */
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@@ -152,7 +153,6 @@ uint32 dpd_arm[DP_NUMDR] = { 0 }; /* drives armed */
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int32 dp_stime = 100; /* seek latency */
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int32 dp_rtime = 100; /* rotate latency */
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int32 dp_wtime = 1; /* word time */
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uint32 dp_log = 0; /* debug log */
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uint8 dp_tplte[(2 * DP_NUMDR) + 2]; /* fix/rmv + ctrl + end */
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DEVICE dp_dev;
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@@ -213,7 +213,6 @@ REG dp_reg[] = {
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DP_NUMDR, REG_RO) },
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{ URDATA (CAPAC, dp_unit[0].capac, 10, T_ADDR_W, 0,
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DP_NUMDR, PV_LEFT | REG_HRO) },
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{ FLDATA (LOG, dp_log, 0), REG_HIDDEN },
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{ HRDATA (DEVNO, dp_dib.dno, 8), REG_HRO },
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{ HRDATA (SELCH, dp_dib.sch, 2), REG_HRO },
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{ NULL } };
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@@ -246,7 +245,7 @@ DEVICE dp_dev = {
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DP_NUMDR, 16, 24, 1, 16, 8,
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NULL, NULL, &dp_reset,
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&id_dboot, &dp_attach, &dp_detach,
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&dp_dib, DEV_DISABLE };
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&dp_dib, DEV_DISABLE | DEV_DEBUG };
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/* Controller: IO routine */
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@@ -266,7 +265,7 @@ case IO_RD: /* read data */
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else dp_sta = dp_sta | STA_BSY; /* xfr? set busy */
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return dp_db; /* return data */
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case IO_WD: /* write data */
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if (sim_log && dp_log) fprintf (sim_log,
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if (DEBUG_PRS (dp_dev)) fprintf (sim_deb,
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">>DPC WD = %02X, STA = %02X\n", dat, dp_sta);
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if (dp_sta & STC_IDL) dp_hdsc = dat & HS_MASK; /* idle? hdsc */
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else { /* data xfer */
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@@ -278,7 +277,7 @@ case IO_SS: /* status */
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if (t & SETC_EX) t = t | STA_EX; /* test for EX */
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return t;
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case IO_OC: /* command */
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if (sim_log && dp_log) fprintf (sim_log,
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if (DEBUG_PRS (dp_dev)) fprintf (sim_deb,
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">>DPC OC = %02X, STA = %02X\n", dat, dp_sta);
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f = dat & CMC_MASK; /* get cmd */
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if (f & CMC_CLR) { /* clear? */
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@@ -315,7 +314,7 @@ case IO_ADR: /* select */
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if (dp_sta & STC_IDL) dp_svun = dev; /* idle? save unit */
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return BY; /* byte only */
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case IO_WD: /* write data */
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if (sim_log && dp_log) fprintf (sim_log,
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if (DEBUG_PRS (dp_dev)) fprintf (sim_deb,
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">>DP%d WD = %02X, STA = %02X\n", u, dat, dp_sta);
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if (GET_DTYPE (uptr->flags) == TYPE_2315) /* 2.5MB drive? */
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dp_cyl = dat & 0xFF; /* cyl is 8b */
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@@ -330,7 +329,7 @@ case IO_SS: /* status */
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if (t & SETD_EX) t = t | STA_EX; /* test for ex */
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return t;
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case IO_OC: /* command */
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if (sim_log && dp_log) fprintf (sim_log,
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if (DEBUG_PRS (dp_dev)) fprintf (sim_deb,
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">>DP%d OC = %02X, STA = %02X\n", u, dat, dp_sta);
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dpd_arm[u] = int_chg (v_DPC + u + 1, dat, dpd_arm[u]);
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if (dat & CMD_SK) t = dp_cyl; /* seek? get cyl */
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@@ -1,6 +1,6 @@
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/* id_fd.c: Interdata floppy disk simulator
|
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Copyright (c) 2001-2003, Robert M Supnik
|
||||
Copyright (c) 2001-2004, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* id_fp.c: Interdata floating point instructions
|
||||
|
||||
Copyright (c) 2000-2003, Robert M. Supnik
|
||||
Copyright (c) 2000-2004, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* id_idc.c: Interdata MSM/IDC disk controller simulator
|
||||
|
||||
Copyright (c) 2001-2003, Robert M. Supnik
|
||||
Copyright (c) 2001-2004, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* id_io.c: Interdata CPU-independent I/O routines
|
||||
|
||||
Copyright (c) 2001-2003, Robert M. Supnik
|
||||
Copyright (c) 2001-2004, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* id_lp.c: Interdata line printer
|
||||
|
||||
Copyright (c) 2001-2003, Robert M. Supnik
|
||||
Copyright (c) 2001-2004, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* id_mt.c: Interdata magnetic tape simulator
|
||||
|
||||
Copyright (c) 2001-2003, Robert M Supnik
|
||||
Copyright (c) 2001-2004, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* id_pas.c: Interdata programmable async line adapter simulator
|
||||
|
||||
Copyright (c) 2001-2003, Robert M Supnik
|
||||
Copyright (c) 2001-2004, Robert M Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -25,6 +25,7 @@
|
||||
|
||||
pas Programmable asynchronous line adapter(s)
|
||||
|
||||
05-Jan-04 RMS Revised for tmxr library changes
|
||||
09-May-03 RMS Added network device flag
|
||||
|
||||
This module implements up to 32 individual serial interfaces, representing
|
||||
@@ -100,7 +101,7 @@ uint32 pas_tps = 50; /* polls/second */
|
||||
uint8 pas_tplte[PAS_LINES * 2 + 1]; /* template */
|
||||
|
||||
TMLN pas_ldsc[PAS_LINES] = { 0 }; /* line descriptors */
|
||||
TMXR pas_desc = { 8, 0, 0, &pas_ldsc[0], NULL }; /* mux descriptor */
|
||||
TMXR pas_desc = { 8, 0, 0, pas_ldsc }; /* mux descriptor */
|
||||
#define PAS_ENAB pas_desc.lines
|
||||
|
||||
uint32 pas (uint32 dev, uint32 op, uint32 dat);
|
||||
@@ -145,16 +146,16 @@ REG pas_reg[] = {
|
||||
|
||||
MTAB pas_mod[] = {
|
||||
{ MTAB_XTD | MTAB_VDV | MTAB_VAL, 0, "lines", "LINES",
|
||||
&pas_vlines, NULL, &pas_nlreg },
|
||||
&pas_vlines, NULL, &pas_nlreg },
|
||||
{ MTAB_XTD | MTAB_VDV, 1, NULL, "DISCONNECT",
|
||||
&tmxr_dscln, NULL, &pas_desc },
|
||||
&tmxr_dscln, NULL, &pas_desc },
|
||||
{ UNIT_ATT, UNIT_ATT, "connections", NULL, NULL, &pas_summ },
|
||||
{ MTAB_XTD | MTAB_VDV | MTAB_NMO, 1, "CONNECTIONS", NULL,
|
||||
NULL, &pas_show, NULL },
|
||||
NULL, &pas_show, NULL },
|
||||
{ MTAB_XTD | MTAB_VDV | MTAB_NMO, 0, "STATISTICS", NULL,
|
||||
NULL, &pas_show, NULL },
|
||||
NULL, &pas_show, NULL },
|
||||
{ MTAB_XTD|MTAB_VDV, 0, "DEVNO", "DEVNO",
|
||||
&set_dev, &show_dev, NULL },
|
||||
&set_dev, &show_dev, NULL },
|
||||
{ 0 } };
|
||||
|
||||
DEVICE pas_dev = {
|
||||
@@ -212,6 +213,10 @@ MTAB pasl_mod[] = {
|
||||
{ UNIT_UC+UNIT_8B, UNIT_8B, "8b", "8B", NULL },
|
||||
{ UNIT_MDM, 0, "no dataset", "NODATASET", NULL },
|
||||
{ UNIT_MDM, UNIT_MDM, "dataset", "DATASET", NULL },
|
||||
{ MTAB_XTD|MTAB_VUN|MTAB_NC, 0, "LOG", "LOG",
|
||||
&tmxr_set_log, &tmxr_show_log, &pas_desc },
|
||||
{ MTAB_XTD|MTAB_VUN|MTAB_NC, 0, NULL, "NOLOG",
|
||||
&tmxr_set_nolog, NULL, &pas_desc },
|
||||
{ 0 } };
|
||||
|
||||
REG pasl_reg[] = {
|
||||
@@ -270,7 +275,7 @@ case IO_OC: /* command */
|
||||
if ((pas_cmd[ln] & CMD_DTR) && (pas_sta[ln] & STA_RING))
|
||||
pas_sta[ln] = pas_sta[ln] & ~(STA_CROF | STA_RING);
|
||||
if (old_cmd & ~pas_cmd[ln] & CMD_DTR) {
|
||||
tmxr_msg (pas_ldsc[ln].conn, "\r\nLine hangup\r\n");
|
||||
tmxr_linemsg (&pas_ldsc[ln], "\r\nLine hangup\r\n");
|
||||
tmxr_reset_ln (&pas_ldsc[ln]); /* reset line */
|
||||
pas_sta[ln] = pas_sta[ln] | STA_CROF; /* no carrier */
|
||||
if (pas_rarm[ln]) SET_INT (v_PAS + ln + ln); } }
|
||||
@@ -424,9 +429,7 @@ if (pas_unit.flags & UNIT_ATT) { /* master att? */
|
||||
t = sim_rtcn_init (pas_unit.wait, TMR_PAS);
|
||||
sim_activate (&pas_unit, t); } } /* activate */
|
||||
else sim_cancel (&pas_unit); /* else stop */
|
||||
for (i = 0; i < PAS_LINES; i++) {
|
||||
pas_desc.ldsc[i] = &pas_ldsc[i];
|
||||
pas_reset_ln (i); }
|
||||
for (i = 0; i < PAS_LINES; i++) pas_reset_ln (i);
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
@@ -501,7 +504,7 @@ if (newln < PAS_ENAB) {
|
||||
return SCPE_OK;
|
||||
for (i = newln; i < PAS_ENAB; i++) {
|
||||
if (pas_ldsc[i].conn) {
|
||||
tmxr_msg (pas_ldsc[i].conn, "\r\nOperator disconnected line\r\n");
|
||||
tmxr_linemsg (&pas_ldsc[i], "\r\nOperator disconnected line\r\n");
|
||||
tmxr_reset_ln (&pas_ldsc[i]); } /* reset line */
|
||||
pasl_unit[i].flags = pasl_unit[i].flags | UNIT_DIS;
|
||||
pas_reset_ln (i); }
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* id_pt.c: Interdata paper tape reader
|
||||
|
||||
Copyright (c) 2000-2003, Robert M. Supnik
|
||||
Copyright (c) 2000-2004, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
@@ -332,7 +332,7 @@ char *tptr;
|
||||
extern DEVICE cpu_dev;
|
||||
|
||||
if ((cptr == NULL) || (*cptr == 0)) return SCPE_2FARG;
|
||||
tptr = get_range (cptr, &lo, &hi, cpu_dev.aradix, 0xFFFF, 0);
|
||||
tptr = get_range (NULL, cptr, &lo, &hi, cpu_dev.aradix, 0xFFFF, 0);
|
||||
if ((tptr == NULL) || (lo < INTSVT)) return SCPE_ARG;
|
||||
if (*tptr != 0) return SCPE_2MARG;
|
||||
for (i = lo, cs = 0; i <= hi; i++) cs = cs ^ IOReadB (i);
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* id_tt.c: Interdata teletype
|
||||
|
||||
Copyright (c) 2000-2003, Robert M. Supnik
|
||||
Copyright (c) 2000-2004, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
/* id_uvc.c: Interdata universal clock
|
||||
|
||||
Copyright (c) 2001-2003, Robert M. Supnik
|
||||
Copyright (c) 2001-2004, Robert M. Supnik
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
|
||||
Reference in New Issue
Block a user