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Notes For V2.10-2

Browse Source 
1. New Features in 2.10-2

The build procedures have changed.  There is only one UNIX makefile.
To compile without Ethernet support, simply type

	gmake {target|all}

To compile with Ethernet support, type

	gmake USE_NETWORK=1 {target|all}

The Mingw batch files require Mingw release 2 and invoke the Unix
makefile.  There are still separate batch files for compilation
with or without Ethernet support.

1.1 SCP and Libraries

- The EVAL command will evaluate a symbolic type-in and display
  it in numeric form.
- The ! command (with no arguments) will launch the host operating
  system command shell.  The ! command (with an argument) executes
  the argument as a host operating system command.  (Code from
  Mark Pizzolato)
- Telnet sessions now recognize BREAK.  How a BREAK is transmitted
  dependent on the particular Telnet client.  (Code from Mark
  Pizzolato)
- The sockets library includes code for active connections as
  well as listening connections.
- The RESTORE command will restore saved memory size, if the
  simulator supports dynamic memory resizing.

1.2 PDP-1

- The PDP-1 supports the Type 24 serial drum (based on recently
  discovered documents).

1.3 18b PDP's

- The PDP-4 supports the Type 24 serial drum (based on recently
  discovered documents).

1.4 PDP-11

- The PDP-11 implements a stub DEUNA/DELUA (XU).  The real XU
  module will be included in a later release.

1.5 PDP-10

- The PDP-10 implements a stub DEUNA/DELUA (XU).  The real XU
  module will be included in a later release.

1.6 HP 2100

- The IOP microinstruction set is supported for the 21MX as well
  as the 2100.
- The HP2100 supports the Access Interprocessor Link (IPL).

1.7 VAX

- If the VAX console is attached to a Telnet session, BREAK is
  interpreted as console halt.
- The SET/SHOW HISTORY commands enable and display a history of
  the most recently executed instructions.  (Code from Mark
  Pizzolato)

1.8 Terminals Multiplexors

- BREAK detection was added to the HP, DEC, and Interdata terminal
  multiplexors.

1.9 Interdata 16b and 32b

- First release.  UNIX is not yet working.

1.10 SDS 940

- First release.

2. Bugs Fixed in 2.10-2

- PDP-11 console must default to 7b for early UNIX compatibility.
- PDP-11/VAX TMSCP emulator was using the wrong packet length for
  read/write end packets.
- Telnet IAC+IAC processing was fixed, both for input and output
  (found by Mark Pizzolato).
- PDP-11/VAX Ethernet setting flag bits wrong for chained
  descriptors (found by Mark Pizzolato).

3. New Features in 2.10 vs prior releases

3.1 SCP and Libraries

- The VT emulation package has been replaced by the capability
  to remote the console to a Telnet session.  Telnet clients
  typically have more complete and robust VT100 emulation.
- Simulated devices may now have statically allocated buffers,
  in addition to dynamically allocated buffers or disk-based
  data stores.
- The DO command now takes substitutable arguments (max 9).
  In command files, %n represents substitutable argument n.
- The initial command line is now interpreted as the command
  name and substitutable arguments for a DO command.  This is
  backward compatible to prior versions.
- The initial command line parses switches.  -Q is interpreted
  as quiet mode; informational messages are suppressed.
- The HELP command now takes an optional argument.  HELP <cmd>
  types help on the specified command.
- Hooks have been added for implementing GUI-based consoles,
  as well as simulator-specific command extensions.  A few
  internal data structures and definitions have changed.
- Two new routines (tmxr_open_master, tmxr_close_master) have
  been added to sim_tmxr.c.  The calling sequence for
  sim_accept_conn has been changed in sim_sock.c.
- The calling sequence for the VM boot routine has been modified
  to add an additional parameter.
- SAVE now saves, and GET now restores, controller and unit flags.
- Library sim_ether.c has been added for Ethernet support.

3.2 VAX

- Non-volatile RAM (NVR) can behave either like a memory or like
  a disk-based peripheral.  If unattached, it behaves like memory
  and is saved and restored by SAVE and RESTORE, respectively.
  If attached, its contents are loaded from disk by ATTACH and
  written back to disk at DETACH and EXIT.
- SHOW <device> VECTOR displays the device's interrupt vector.
  A few devices allow the vector to be changed with SET
  <device> VECTOR=nnn.
- SHOW CPU IOSPACE displays the I/O space address map.
- The TK50 (TMSCP tape) has been added.
- The DEQNA/DELQA (Qbus Ethernet controllers) have been added.
- Autoconfiguration support has been added.
- The paper tape reader has been removed from vax_stddev.c and
  now references a common implementation file, dec_pt.h.
- Examine and deposit switches now work on all devices, not just
  the CPU.
- Device address conflicts are not detected until simulation starts.

3.3 PDP-11

- SHOW <device> VECTOR displays the device's interrupt vector.
  Most devices allow the vector to be changed with SET
  <device> VECTOR=nnn.
- SHOW CPU IOSPACE displays the I/O space address map.
- The TK50 (TMSCP tape), RK611/RK06/RK07 (cartridge disk),
  RX211 (double density floppy), and KW11P programmable clock
  have been added.
- The DEQNA/DELQA (Qbus Ethernet controllers) have been added.
- Autoconfiguration support has been added.
- The paper tape reader has been removed from pdp11_stddev.c and
  now references a common implementation file, dec_pt.h.
- Device bootstraps now use the actual CSR specified by the
  SET ADDRESS command, rather than just the default CSR.  Note
  that PDP-11 operating systems may NOT support booting with
  non-standard addresses.
- Specifying more than 256KB of memory, or changing the bus
  configuration, causes all peripherals that are not compatible
  with the current bus configuration to be disabled.
- Device address conflicts are not detected until simulation starts.

3.4 PDP-10

- SHOW <device> VECTOR displays the device's interrupt vector.
  A few devices allow the vector to be changed with SET
  <device> VECTOR=nnn.
- SHOW CPU IOSPACE displays the I/O space address map.
- The RX211 (double density floppy) has been added; it is off
  by default.
- The paper tape now references a common implementation file,
  dec_pt.h.
- Device address conflicts are not detected until simulation starts.

3.5 PDP-1

- DECtape (then known as MicroTape) support has been added.
- The line printer and DECtape can be disabled and enabled.

3.6 PDP-8

- The RX28 (double density floppy) has been added as an option to
  the existing RX8E controller.
- SHOW <device> DEVNO displays the device's device number.  Most
  devices allow the device number to be changed with SET <device>
  DEVNO=nnn.
- Device number conflicts are not detected until simulation starts.

3.7 IBM 1620

- The IBM 1620 simulator has been released.

3.8 AltairZ80

- A hard drive has been added for increased storage.
- Several bugs have been fixed.

3.9 HP 2100

- The 12845A has been added and made the default line printer (LPT).
  The 12653A has been renamed LPS and is off by default.  It also
  supports the diagnostic functions needed to run the DCPC and DMS
  diagnostics.
- The 12557A/13210A disk defaults to the 13210A (7900/7901).
- The 12559A magtape is off by default.
- New CPU options (EAU/NOEAU) enable/disable the extended arithmetic
  instructions for the 2116.  These instructions are standard on
  the 2100 and 21MX.
- New CPU options (MPR/NOMPR) enable/disable memory protect for the
  2100 and 21MX.
- New CPU options (DMS/NODMS) enable/disable the dynamic mapping
  instructions for the 21MX.
- The 12539 timebase generator autocalibrates.

3.10 Simulated Magtapes

- Simulated magtapes recognize end of file and the marker
  0xFFFFFFFF as end of medium.  Only the TMSCP tape simulator
  can generate an end of medium marker.
- The error handling in simulated magtapes was overhauled to be
  consistent through all simulators.

3.11 Simulated DECtapes

- Added support for RT11 image file format (256 x 16b) to DECtapes.

4. Bugs Fixed in 2.10 vs prior releases

- TS11/TSV05 was not simulating the XS0_MOT bit, causing failures
  under VMS.  In addition, two of the CTL options were coded
  interchanged.
- IBM 1401 tape was not setting a word mark under group mark for
  load mode reads.  This caused the diagnostics to crash.
- SCP bugs in ssh_break and set_logon were fixed (found by Dave
  Hittner).
- Numerous bugs in the HP 2100 extended arithmetic, floating point,
  21MX, DMS, and IOP instructions were fixed.  Bugs were also fixed
  in the memory protect and DMS functions.  The moving head disks
  (DP, DQ) were revised to simulate the hardware more accurately.
  Missing functions in DQ (address skip, read address) were added.
- PDP-10 tape wouldn't boot, and then wouldn't read (reported by
  Michael Thompson and Harris Newman, respectively)
- PDP-1 typewriter is half duplex, with only one shift state for
  both input and output (found by Derek Peschel)

5. General Notes

WARNING: V2.10 has reorganized and renamed some of the definition
files for the PDP-10, PDP-11, and VAX.  Be sure to delete all
previous source files before you unpack the Zip archive, or
unpack it into a new directory structure.

WARNING: V2.10 has a new, more comprehensive save file format.
Restoring save files from previous releases will cause 'invalid
register' errors and loss of CPU option flags, device enable/
disable flags, unit online/offline flags, and unit writelock
flags.

WARNING: If you are using Visual Studio .NET through the IDE,
be sure to turn off the /Wp64 flag in the project settings, or
dozens of spurious errors will be generated.

WARNING: Compiling Ethernet support under Windows requires
extra steps; see the Ethernet readme file.  Ethernet support is
currently available only for Windows, Linux, NetBSD, and OpenBSD.
This commit is contained in:
Bob Supnik
2003-01-17 18:35:00 -08:00
committed by Mark Pizzolato
parent 4ea745b3ad
commit 2bcd1e7c4c
206 changed files with 30253 additions and 12114 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
NOVA/eclipse_tt.c
View File

@@ -26,7 +26,7 @@ t_stat tti_svc (UNIT *uptr);
t_stat tto_svc (UNIT *uptr);
t_stat tti_reset (DEVICE *dptr);
t_stat tto_reset (DEVICE *dptr);
t_stat ttx_setmod (UNIT *uptr, int32 value);
t_stat ttx_setmod (UNIT *uptr, int32 value, char *cptr, void *desc);
void translate_in();
int32 translate_out(int32 c);
int32 putseq(char *seq);
@@ -386,7 +386,7 @@ sim_cancel (&tto_unit); /* deactivate unit */
return SCPE_OK;
}
t_stat ttx_setmod (UNIT *uptr, int32 value)
t_stat ttx_setmod (UNIT *uptr, int32 value, char *cptr, void *desc)
{
tti_unit.flags = (tti_unit.flags & ~UNIT_DASHER) | value;
tto_unit.flags = (tto_unit.flags & ~UNIT_DASHER) | value;

4
NOVA/nova_clk.c
View File

@@ -89,8 +89,8 @@ case iopS: /* start */
dev_done = dev_done & ~INT_CLK; /* clear done, int */
int_req = int_req & ~INT_CLK;
if (!sim_is_active (&clk_unit)) /* not running? */
sim_activate (&clk_unit, /* activate */
sim_rtc_init (clk_time[clk_sel])); /* init calibr */
sim_activate (&clk_unit, /* activate */
sim_rtc_init (clk_time[clk_sel])); /* init calibr */
break;
case iopC: /* clear */
dev_busy = dev_busy & ~INT_CLK; /* clear busy */

587
NOVA/nova_cpu.c
View File

@@ -348,14 +348,14 @@ if (int_req > INT_PENDING) { /* interrupt? */
PCQ_ENTRY; /* save old PC */
M[INT_SAV] = PC;
if (int_req & INT_STK) { /* stack overflow? */
int_req = int_req & ~INT_STK; /* clear */
MA = STK_JMP; } /* jmp @3 */
int_req = int_req & ~INT_STK; /* clear */
MA = STK_JMP; } /* jmp @3 */
else MA = INT_JMP; /* intr: jmp @1 */
for (i = 0, indf = 1; indf && (i < ind_max); i++) {
indf = IND_STEP (MA); } /* indirect loop */
indf = IND_STEP (MA); } /* indirect loop */
if (i >= ind_max) {
reason = STOP_IND_INT;
break; }
reason = STOP_IND_INT;
break; }
PC = MA; } /* end interrupt */
if (sim_brk_summ && sim_brk_test (PC, SWMASK ('E'))) { /* breakpoint? */
@@ -375,96 +375,96 @@ if (IR & I_OPR) { /* operate? */
dstAC = I_GETDST (IR);
switch (I_GETCRY (IR)) { /* decode carry */
case 0: /* load */
src = AC[srcAC] | C;
break;
src = AC[srcAC] | C;
break;
case 1: /* clear */
src = AC[srcAC];
break;
src = AC[srcAC];
break;
case 2: /* set */
src = AC[srcAC] | CBIT;
break;
src = AC[srcAC] | CBIT;
break;
case 3: /* complement */
src = AC[srcAC] | (C ^ CBIT);
break; } /* end switch carry */
src = AC[srcAC] | (C ^ CBIT);
break; } /* end switch carry */
switch (I_GETALU (IR)) { /* decode ALU */
case 0: /* COM */
src = src ^ DMASK;
break;
src = src ^ DMASK;
break;
case 1: /* NEG */
src = ((src ^ DMASK) + 1) & CMASK;
break;
src = ((src ^ DMASK) + 1) & CMASK;
break;
case 2: /* MOV */
break;
break;
case 3: /* INC */
src = (src + 1) & CMASK;
break;
src = (src + 1) & CMASK;
break;
case 4: /* ADC */
src = ((src ^ DMASK) + AC[dstAC]) & CMASK;
break;
src = ((src ^ DMASK) + AC[dstAC]) & CMASK;
break;
case 5: /* SUB */
src = ((src ^ DMASK) + AC[dstAC] + 1) & CMASK;
break;
src = ((src ^ DMASK) + AC[dstAC] + 1) & CMASK;
break;
case 6: /* ADD */
src = (src + AC[dstAC]) & CMASK;
break;
src = (src + AC[dstAC]) & CMASK;
break;
case 7: /* AND */
src = src & (AC[dstAC] | CBIT);
break; } /* end switch oper */
src = src & (AC[dstAC] | CBIT);
break; } /* end switch oper */
/* Operate, continued */
switch (I_GETSHF (IR)) { /* decode shift */
case 0: /* nop */
break;
break;
case 1: /* L */
src = ((src << 1) | (src >> 16)) & CMASK;
break;
src = ((src << 1) | (src >> 16)) & CMASK;
break;
case 2: /* R */
src = ((src >> 1) | (src << 16)) & CMASK;
break;
src = ((src >> 1) | (src << 16)) & CMASK;
break;
case 3: /* S */
src = ((src & 0377) << 8) | ((src >> 8) & 0377) |
(src & CBIT);
break; } /* end switch shift */
src = ((src & 0377) << 8) | ((src >> 8) & 0377) |
(src & CBIT);
break; } /* end switch shift */
switch (I_GETSKP (IR)) { /* decode skip */
case 0: /* nop */
if ((IR & I_NLD) && (cpu_unit.flags & UNIT_STK)) {
int32 indf, MA; /* Nova 3 or 4 trap */
PCQ_ENTRY; /* save old PC */
M[TRP_SAV] = (PC - 1) & AMASK;
MA = TRP_JMP; /* jmp @47 */
for (i = 0, indf = 1; indf && (i < ind_max); i++) {
indf = IND_STEP (MA); } /* resolve ind */
if (i >= ind_max) { /* indirect loop? */
reason = STOP_IND_TRP;
break; }
PC = MA; /* new PC */
break; }
break;
if ((IR & I_NLD) && (cpu_unit.flags & UNIT_STK)) {
int32 indf, MA; /* Nova 3 or 4 trap */
PCQ_ENTRY; /* save old PC */
M[TRP_SAV] = (PC - 1) & AMASK;
MA = TRP_JMP; /* jmp @47 */
for (i = 0, indf = 1; indf && (i < ind_max); i++) {
indf = IND_STEP (MA); } /* resolve ind */
if (i >= ind_max) { /* indirect loop? */
reason = STOP_IND_TRP;
break; }
PC = MA; /* new PC */
break; }
break;
case 1: /* SKP */
PC = (PC + 1) & AMASK;
break;
PC = (PC + 1) & AMASK;
break;
case 2: /* SZC */
if (src < CBIT) PC = (PC + 1) & AMASK;
break;
if (src < CBIT) PC = (PC + 1) & AMASK;
break;
case 3: /* SNC */
if (src >= CBIT) PC = (PC + 1) & AMASK;
break;
if (src >= CBIT) PC = (PC + 1) & AMASK;
break;
case 4: /* SZR */
if ((src & DMASK) == 0) PC = (PC + 1) & AMASK;
break;
if ((src & DMASK) == 0) PC = (PC + 1) & AMASK;
break;
case 5: /* SNR */
if ((src & DMASK) != 0) PC = (PC + 1) & AMASK;
break;
if ((src & DMASK) != 0) PC = (PC + 1) & AMASK;
break;
case 6: /* SEZ */
if (src <= CBIT) PC = (PC + 1) & AMASK;
break;
if (src <= CBIT) PC = (PC + 1) & AMASK;
break;
case 7: /* SBN */
if (src > CBIT) PC = (PC + 1) & AMASK;
break; } /* end switch skip */
if (src > CBIT) PC = (PC + 1) & AMASK;
break; } /* end switch skip */
if ((IR & I_NLD) == 0) { /* load? */
AC[dstAC] = src & DMASK;
C = src & CBIT; } /* end if load */
AC[dstAC] = src & DMASK;
C = src & CBIT; } /* end if load */
} /* end if operate */
/* Memory reference instructions */
@@ -474,70 +474,70 @@ else if (IR < 060000) { /* mem ref? */
MA = I_GETDISP (IR); /* get disp */
switch (I_GETMODE (IR)) { /* decode mode */
case 0: /* page zero */
break;
break;
case 1: /* PC relative */
if (MA & DISPSIGN) MA = 077400 | MA;
MA = (MA + PC - 1) & AMASK;
break;
if (MA & DISPSIGN) MA = 077400 | MA;
MA = (MA + PC - 1) & AMASK;
break;
case 2: /* AC2 relative */
if (MA & DISPSIGN) MA = 077400 | MA;
MA = (MA + AC[2]) & AMASK;
break;
if (MA & DISPSIGN) MA = 077400 | MA;
MA = (MA + AC[2]) & AMASK;
break;
case 3: /* AC3 relative */
if (MA & DISPSIGN) MA = 077400 | MA;
MA = (MA + AC[3]) & AMASK;
break; } /* end switch mode */
if (MA & DISPSIGN) MA = 077400 | MA;
MA = (MA + AC[3]) & AMASK;
break; } /* end switch mode */
if (indf = IR & I_IND) { /* indirect? */
for (i = 0; indf && (i < ind_max); i++) { /* count */
indf = IND_STEP (MA); } /* resolve indirect */
if (i >= ind_max) { /* too many? */
reason = STOP_IND;
break; } }
for (i = 0; indf && (i < ind_max); i++) { /* count */
indf = IND_STEP (MA); } /* resolve indirect */
if (i >= ind_max) { /* too many? */
reason = STOP_IND;
break; } }
/* Memory reference, continued */
switch (I_GETOPAC (IR)) { /* decode op + AC */
case 001: /* JSR */
AC[3] = PC;
AC[3] = PC;
case 000: /* JMP */
PCQ_ENTRY;
PC = MA;
break;
PCQ_ENTRY;
PC = MA;
break;
case 002: /* ISZ */
src = (M[MA] + 1) & DMASK;
if (MEM_ADDR_OK (MA)) M[MA] = src;
if (src == 0) PC = (PC + 1) & AMASK;
break;
src = (M[MA] + 1) & DMASK;
if (MEM_ADDR_OK (MA)) M[MA] = src;
if (src == 0) PC = (PC + 1) & AMASK;
break;
case 003: /* DSZ */
src = (M[MA] - 1) & DMASK;
if (MEM_ADDR_OK (MA)) M[MA] = src;
if (src == 0) PC = (PC + 1) & AMASK;
break;
src = (M[MA] - 1) & DMASK;
if (MEM_ADDR_OK (MA)) M[MA] = src;
if (src == 0) PC = (PC + 1) & AMASK;
break;
case 004: /* LDA 0 */
AC[0] = M[MA];
break;
AC[0] = M[MA];
break;
case 005: /* LDA 1 */
AC[1] = M[MA];
break;
AC[1] = M[MA];
break;
case 006: /* LDA 2 */
AC[2] = M[MA];
break;
AC[2] = M[MA];
break;
case 007: /* LDA 3 */
AC[3] = M[MA];
break;
AC[3] = M[MA];
break;
case 010: /* STA 0 */
if (MEM_ADDR_OK (MA)) M[MA] = AC[0];
break;
if (MEM_ADDR_OK (MA)) M[MA] = AC[0];
break;
case 011: /* STA 1 */
if (MEM_ADDR_OK (MA)) M[MA] = AC[1];
break;
if (MEM_ADDR_OK (MA)) M[MA] = AC[1];
break;
case 012: /* STA 2 */
if (MEM_ADDR_OK (MA)) M[MA] = AC[2];
break;
if (MEM_ADDR_OK (MA)) M[MA] = AC[2];
break;
case 013: /* STA 3 */
if (MEM_ADDR_OK (MA)) M[MA] = AC[3];
break; } /* end switch */
if (MEM_ADDR_OK (MA)) M[MA] = AC[3];
break; } /* end switch */
} /* end mem ref */
/* IOT instruction */
@@ -549,200 +549,199 @@ else { /* IOT */
pulse = I_GETPULSE (IR);
device = I_GETDEV (IR);
if (code == ioSKP) { /* IO skip? */
switch (pulse) { /* decode IR<8:9> */
case 0: /* skip if busy */
if ((device == DEV_CPU)? (int_req & INT_ION) != 0:
(dev_busy & dev_table[device].mask) != 0)
PC = (PC + 1) & AMASK;
break;
case 1: /* skip if not busy */
if ((device == DEV_CPU)? (int_req & INT_ION) == 0:
(dev_busy & dev_table[device].mask) == 0)
PC = (PC + 1) & AMASK;
break;
case 2: /* skip if done */
if ((device == DEV_CPU)? pwr_low != 0:
(dev_done & dev_table[device].mask) != 0)
PC = (PC + 1) & AMASK;
break;
case 3: /* skip if not done */
if ((device == DEV_CPU)? pwr_low == 0:
(dev_done & dev_table[device].mask) == 0)
PC = (PC + 1) & AMASK;
break; } /* end switch */
} /* end IO skip */
switch (pulse) { /* decode IR<8:9> */
case 0: /* skip if busy */
if ((device == DEV_CPU)? (int_req & INT_ION) != 0:
(dev_busy & dev_table[device].mask) != 0)
PC = (PC + 1) & AMASK;
break;
case 1: /* skip if not busy */
if ((device == DEV_CPU)? (int_req & INT_ION) == 0:
(dev_busy & dev_table[device].mask) == 0)
PC = (PC + 1) & AMASK;
break;
case 2: /* skip if done */
if ((device == DEV_CPU)? pwr_low != 0:
(dev_done & dev_table[device].mask) != 0)
PC = (PC + 1) & AMASK;
break;
case 3: /* skip if not done */
if ((device == DEV_CPU)? pwr_low == 0:
(dev_done & dev_table[device].mask) == 0)
PC = (PC + 1) & AMASK;
break; } /* end switch */
} /* end IO skip */
/* IOT, continued */
else if (device == DEV_MDV) {
switch (code) { /* case on opcode */
case ioNIO: /* frame ptr */
if (cpu_unit.flags & UNIT_STK) {
if (pulse == iopN) FP = AC[dstAC] & AMASK;
if (pulse == iopC) AC[dstAC] = FP; }
break;
case ioDIA: /* load byte */
if (cpu_unit.flags & UNIT_BYT)
AC[dstAC] = (M[AC[pulse] >> 1] >>
((AC[pulse] & 1)? 0: 8)) & 0377;
else AC[dstAC] = 0;
break;
case ioDOA: /* stack ptr */
if (cpu_unit.flags & UNIT_STK) {
if (pulse == iopN) SP = AC[dstAC] & AMASK;
if (pulse == iopC) AC[dstAC] = SP; }
break;
case ioDIB: /* push, pop */
if (cpu_unit.flags & UNIT_STK) {
if (pulse == iopN) { /* push */
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[dstAC];
STK_CHECK (SP, 1); }
if (pulse == iopC) { /* pop */
AC[dstAC] = M[SP];
SP = DECA (SP); }
if ((pulse == iopP) && /* Nova 4 pshn */
(cpu_unit.flags & UNIT_BYT)) {
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[dstAC];
if (SP > M[042]) int_req = int_req | INT_STK ;
}
}
break;
case ioDOB: /* store byte */
if (cpu_unit.flags & UNIT_BYT) {
int32 MA, val;
MA = AC[pulse] >> 1;
val = AC[dstAC] & 0377;
if (MEM_ADDR_OK (MA)) M[MA] = (AC[pulse] & 1)?
((M[MA] & ~0377) | val):
((M[MA] & 0377) | (val << 8)); }
break;
case ioDIC: /* save, return */
if (cpu_unit.flags & UNIT_STK) {
if (pulse == iopN) { /* save */
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[0];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[1];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[2];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = FP;
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = (C >> 1) |
(AC[3] & AMASK);
AC[3] = FP = SP & AMASK;
STK_CHECK (SP, 5); }
if (pulse == iopC) { /* retn */
PCQ_ENTRY;
SP = FP & AMASK;
C = (M[SP] << 1) & CBIT;
PC = M[SP] & AMASK;
SP = DECA (SP);
AC[3] = M[SP];
SP = DECA (SP);
AC[2] = M[SP];
SP = DECA (SP);
AC[1] = M[SP];
SP = DECA (SP);
AC[0] = M[SP];
SP = DECA (SP);
FP = AC[3] & AMASK; }
if ((pulse == iopP) && /* Nova 4 saven */
(cpu_unit.flags & UNIT_BYT)) {
int32 frameSz = M[PC] ;
PC = INCA (PC) ;
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[0];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[1];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[2];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = FP;
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = (C >> 1) |
(AC[3] & AMASK);
AC[3] = FP = SP & AMASK ;
SP = (SP + frameSz) & AMASK ;
if (SP > M[042]) int_req = int_req | INT_STK;
}
}
break;
case ioDOC:
if ((dstAC == 2) && (cpu_unit.flags & UNIT_MDV)) {
uint32 mddata, uAC0, uAC1, uAC2;
uAC0 = (unsigned int32) AC[0];
uAC1 = (unsigned int32) AC[1];
uAC2 = (unsigned int32) AC[2];
if (pulse == iopP) { /* mul */
mddata = (uAC1 * uAC2) + uAC0;
AC[0] = (mddata >> 16) & DMASK;
AC[1] = mddata & DMASK; }
if (pulse == iopS) { /* div */
if ((uAC0 >= uAC2) || (uAC2 == 0))
C = CBIT;
else { C = 0;
mddata = (uAC0 << 16) | uAC1;
AC[1] = mddata / uAC2;
AC[0] = mddata % uAC2; } } }
if ((dstAC == 3) && (cpu_unit.flags & UNIT_BYT)) {
int32 mddata;
if (pulse == iopC) { /* muls */
mddata = (SEXT (AC[1]) * SEXT (AC[2])) +
SEXT (AC[0]);
AC[0] = (mddata >> 16) & DMASK;
AC[1] = mddata & DMASK; }
if (pulse == iopN) { /* divs */
if (AC[2] == 0) C = CBIT;
else { mddata = (SEXT (AC[0]) << 16) | AC[1];
AC[1] = mddata / SEXT (AC[2]);
AC[0] = mddata % SEXT (AC[2]);
if ((AC[1] > 077777) || (AC[1] < -0100000))
C = CBIT;
else C = 0;
AC[0] = AC[0] & DMASK; } } }
break; } /* end case code */
} /* end if mul/div */
switch (code) { /* case on opcode */
case ioNIO: /* frame ptr */
if (cpu_unit.flags & UNIT_STK) {
if (pulse == iopN) FP = AC[dstAC] & AMASK;
if (pulse == iopC) AC[dstAC] = FP; }
break;
case ioDIA: /* load byte */
if (cpu_unit.flags & UNIT_BYT)
AC[dstAC] = (M[AC[pulse] >> 1] >>
((AC[pulse] & 1)? 0: 8)) & 0377;
else AC[dstAC] = 0;
break;
case ioDOA: /* stack ptr */
if (cpu_unit.flags & UNIT_STK) {
if (pulse == iopN) SP = AC[dstAC] & AMASK;
if (pulse == iopC) AC[dstAC] = SP; }
break;
case ioDIB: /* push, pop */
if (cpu_unit.flags & UNIT_STK) {
if (pulse == iopN) { /* push */
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[dstAC];
STK_CHECK (SP, 1); }
if (pulse == iopC) { /* pop */
AC[dstAC] = M[SP];
SP = DECA (SP); }
if ((pulse == iopP) && /* Nova 4 pshn */
(cpu_unit.flags & UNIT_BYT)) {
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[dstAC];
if (SP > M[042]) int_req = int_req | INT_STK ;
}
}
break;
case ioDOB: /* store byte */
if (cpu_unit.flags & UNIT_BYT) {
int32 MA, val;
MA = AC[pulse] >> 1;
val = AC[dstAC] & 0377;
if (MEM_ADDR_OK (MA)) M[MA] = (AC[pulse] & 1)?
((M[MA] & ~0377) | val):
((M[MA] & 0377) | (val << 8)); }
break;
case ioDIC: /* save, return */
if (cpu_unit.flags & UNIT_STK) {
if (pulse == iopN) { /* save */
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[0];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[1];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[2];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = FP;
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = (C >> 1) |
(AC[3] & AMASK);
AC[3] = FP = SP & AMASK;
STK_CHECK (SP, 5); }
if (pulse == iopC) { /* retn */
PCQ_ENTRY;
SP = FP & AMASK;
C = (M[SP] << 1) & CBIT;
PC = M[SP] & AMASK;
SP = DECA (SP);
AC[3] = M[SP];
SP = DECA (SP);
AC[2] = M[SP];
SP = DECA (SP);
AC[1] = M[SP];
SP = DECA (SP);
AC[0] = M[SP];
SP = DECA (SP);
FP = AC[3] & AMASK; }
if ((pulse == iopP) && /* Nova 4 saven */
(cpu_unit.flags & UNIT_BYT)) {
int32 frameSz = M[PC] ;
PC = INCA (PC) ;
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[0];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[1];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[2];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = FP;
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = (C >> 1) |
(AC[3] & AMASK);
AC[3] = FP = SP & AMASK ;
SP = (SP + frameSz) & AMASK ;
if (SP > M[042]) int_req = int_req | INT_STK;
}
}
break;
case ioDOC:
if ((dstAC == 2) && (cpu_unit.flags & UNIT_MDV)) {
uint32 mddata, uAC0, uAC1, uAC2;
uAC0 = (unsigned int32) AC[0];
uAC1 = (unsigned int32) AC[1];
uAC2 = (unsigned int32) AC[2];
if (pulse == iopP) { /* mul */
mddata = (uAC1 * uAC2) + uAC0;
AC[0] = (mddata >> 16) & DMASK;
AC[1] = mddata & DMASK; }
if (pulse == iopS) { /* div */
if ((uAC0 >= uAC2) || (uAC2 == 0)) C = CBIT;
else {
C = 0;
mddata = (uAC0 << 16) | uAC1;
AC[1] = mddata / uAC2;
AC[0] = mddata % uAC2; } } }
if ((dstAC == 3) && (cpu_unit.flags & UNIT_BYT)) {
int32 mddata;
if (pulse == iopC) { /* muls */
mddata = (SEXT (AC[1]) * SEXT (AC[2])) + SEXT (AC[0]);
AC[0] = (mddata >> 16) & DMASK;
AC[1] = mddata & DMASK; }
if (pulse == iopN) { /* divs */
if (AC[2] == 0) C = CBIT;
else {
mddata = (SEXT (AC[0]) << 16) | AC[1];
AC[1] = mddata / SEXT (AC[2]);
AC[0] = mddata % SEXT (AC[2]);
if ((AC[1] > 077777) || (AC[1] < -0100000))
C = CBIT;
else C = 0;
AC[0] = AC[0] & DMASK; } } }
break; } /* end case code */
} /* end if mul/div */
/* IOT, continued */
else if (device == DEV_CPU) { /* CPU control */
switch (code) { /* decode IR<5:7> */
case ioDIA: /* read switches */
AC[dstAC] = SR;
break;
case ioDIB: /* int ack */
AC[dstAC] = 0;
int_req = (int_req & ~INT_DEV) |
(dev_done & ~dev_disable);
iodata = int_req & (-int_req);
for (i = DEV_LOW; i <= DEV_HIGH; i++) {
if (iodata & dev_table[i].mask) {
AC[dstAC] = i; break; } }
break;
case ioDOB: /* mask out */
mask_out (pimask = AC[dstAC]);
break;
case ioDIC: /* io reset */
reset_all (0); /* reset devices */
break;
case ioDOC: /* halt */
reason = STOP_HALT;
break; } /* end switch code */
switch (pulse) { /* decode IR<8:9> */
case iopS: /* ion */
int_req = (int_req | INT_ION) & ~INT_NO_ION_PENDING;
break;
case iopC: /* iof */
int_req = int_req & ~INT_ION;
break; } /* end switch pulse */
} /* end CPU control */
switch (code) { /* decode IR<5:7> */
case ioDIA: /* read switches */
AC[dstAC] = SR;
break;
case ioDIB: /* int ack */
AC[dstAC] = 0;
int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable);
iodata = int_req & (-int_req);
for (i = DEV_LOW; i <= DEV_HIGH; i++) {
if (iodata & dev_table[i].mask) {
AC[dstAC] = i; break; } }
break;
case ioDOB: /* mask out */
mask_out (pimask = AC[dstAC]);
break;
case ioDIC: /* io reset */
reset_all (0); /* reset devices */
break;
case ioDOC: /* halt */
reason = STOP_HALT;
break; } /* end switch code */
switch (pulse) { /* decode IR<8:9> */
case iopS: /* ion */
int_req = (int_req | INT_ION) & ~INT_NO_ION_PENDING;
break;
case iopC: /* iof */
int_req = int_req & ~INT_ION;
break; } /* end switch pulse */
} /* end CPU control */
else if (dev_table[device].routine) { /* normal device */
iodata = dev_table[device].routine (pulse, code, AC[dstAC]);
reason = iodata >> IOT_V_REASON;
if (code & 1) AC[dstAC] = iodata & 0177777; }
iodata = dev_table[device].routine (pulse, code, AC[dstAC]);
reason = iodata >> IOT_V_REASON;
if (code & 1) AC[dstAC] = iodata & 0177777; }
else reason = stop_dev;
} /* end if IOT */
} /* end while */
@@ -763,7 +762,7 @@ int32 i;
dev_disable = 0;
for (i = DEV_LOW; i <= DEV_HIGH; i++) {
if (newmask & dev_table[i].pi)
dev_disable = dev_disable | dev_table[i].mask; }
dev_disable = dev_disable | dev_table[i].mask; }
int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable);
return;
}

34
NOVA/nova_dkp.c
View File

@@ -446,21 +446,21 @@ case ioDIA: /* DIA */
dkp_sta = dkp_sta & ~STA_DYN; /* clear dynamic */
if (uptr->flags & UNIT_ATT) dkp_sta = dkp_sta | STA_DRDY;
if (uptr->CYL >= drv_tab[dtype].cyl)
dkp_sta = dkp_sta | STA_CYL; /* bad cylinder? */
dkp_sta = dkp_sta | STA_CYL; /* bad cylinder? */
if (dkp_sta & STA_EFLGS) dkp_sta = dkp_sta | STA_ERR;
rval = dkp_sta;
break;
case ioDOA: /* DOA */
if ((dev_busy & INT_DKP) == 0) {
dkp_fccy = AC; /* save cmd, cyl */
dkp_sta = dkp_sta & ~(AC & FCCY_FLAGS); }
dkp_fccy = AC; /* save cmd, cyl */
dkp_sta = dkp_sta & ~(AC & FCCY_FLAGS); }
break;
case ioDIB: /* DIB */
rval = dkp_ma; /* return buf addr */
break;
case ioDOB: /* DOB */
if ((dev_busy & INT_DKP) == 0) dkp_ma =
AC & (drv_tab[dtype].new? DMASK: AMASK);
AC & (drv_tab[dtype].new? DMASK: AMASK);
break;
case ioDIC: /* DIC */
rval = dkp_ussc; /* return unit, sect */
@@ -559,12 +559,12 @@ rval = SCPE_OK;
dtype = GET_DTYPE (uptr->flags); /* get drive type */
if (uptr->FUNC == FCCY_SEEK) { /* seek? */
if (uptr->CYL >= drv_tab[dtype].cyl) /* bad cylinder? */
dkp_sta = dkp_sta | STA_ERR | STA_CYL;
dkp_sta = dkp_sta | STA_ERR | STA_CYL;
dev_done = dev_done | INT_DKP; /* set done */
int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable);
u = uptr - dkp_dev.units; /* get unit number */
dkp_sta = (dkp_sta | (STA_SKDN0 >> u)) /* set seek done */
& ~(STA_SEEK0 >> u); /* clear seeking */
& ~(STA_SEEK0 >> u); /* clear seeking */
return SCPE_OK; }
if (((uptr->flags & UNIT_ATT) == 0) || /* not attached? */
@@ -581,11 +581,11 @@ else if (GET_CYL (dkp_fccy, dtype) != uptr->CYL) /* address error? */
else { sc = 16 - GET_COUNT (dkp_ussc); /* get sector count */
sa = GET_SA (uptr->CYL, GET_SURF (dkp_ussc, dtype),
GET_SECT (dkp_ussc, dtype), dtype); /* get disk block */
GET_SECT (dkp_ussc, dtype), dtype); /* get disk block */
xcsa = GET_SA (uptr->CYL + 1, 0, 0, dtype); /* get next cyl addr */
if ((sa + sc) > xcsa ) { /* across cylinder? */
sc = xcsa - sa; /* limit transfer */
dkp_sta = dkp_sta | STA_XCY; } /* xcyl error */
sc = xcsa - sa; /* limit transfer */
dkp_sta = dkp_sta | STA_XCY; } /* xcyl error */
bda = sa * DKP_NUMWD * sizeof (short); /* to words, bytes */
err = fseek (uptr->fileref, bda, SEEK_SET); /* position drive */
@@ -610,17 +610,17 @@ else { sc = 16 - GET_COUNT (dkp_ussc); /* get sector count */
if (err = ferror (uptr->fileref)) break; } }
if (err != 0) {
perror ("DKP I/O error");
rval = SCPE_IOERR; }
perror ("DKP I/O error");
rval = SCPE_IOERR; }
clearerr (uptr->fileref);
sa = sa + sc; /* update sector addr */
newsect = sa % drv_tab[dtype].sect;
newsurf = (sa / drv_tab[dtype].sect) % drv_tab[dtype].surf;
dkp_ussc = (dkp_ussc & USSC_UNIT) | ((dkp_ussc + sc) & USSC_M_COUNT) |
((drv_tab[dtype].new)?
((newsurf << USSC_V_NSURFACE) | (newsect << USSC_V_NSECTOR)):
((newsurf << USSC_V_OSURFACE) | (newsect << USSC_V_OSECTOR)) );
((drv_tab[dtype].new)?
((newsurf << USSC_V_NSURFACE) | (newsect << USSC_V_NSECTOR)):
((newsurf << USSC_V_OSURFACE) | (newsect << USSC_V_OSECTOR)) );
dkp_sta = dkp_sta | STA_DONE; } /* set status */
dev_busy = dev_busy & ~INT_DKP; /* clear busy */
@@ -661,9 +661,9 @@ if (fseek (uptr->fileref, 0, SEEK_END)) return SCPE_OK;
if ((p = ftell (uptr->fileref)) == 0) return SCPE_OK;
for (i = 0; drv_tab[i].sect != 0; i++) {
if (p <= (drv_tab[i].size * (int) sizeof (short))) {
uptr->flags = (uptr->flags & ~UNIT_DTYPE) | (i << UNIT_V_DTYPE);
uptr->capac = drv_tab[i].size;
return SCPE_OK; } }
uptr->flags = (uptr->flags & ~UNIT_DTYPE) | (i << UNIT_V_DTYPE);
uptr->capac = drv_tab[i].size;
return SCPE_OK; } }
return SCPE_OK;
}

12
NOVA/nova_doc.txt
View File

@@ -441,12 +441,12 @@ All drives have 256 16b words per sector. The other disk parameters are:
D44 408 4 12 5.014 4234, 6045
C111 203 10 6 3.118 4048
C114 203 20 12 12.472 4057, 2314
6225 20 2 245 2.508
6099 32 4 192 6.291
6227 20 6 245 7.526
6070 24 4 408 10.027
6103 32 8 192 12.583
4231 23 19 411 45.979
6225 245 2 20 2.508
6099 192 4 32 6.291
6227 245 6 20 7.526
6070 408 4 24 10.027
6103 192 8 32 12.583
4231 411 19 23 45.979
The moving head disk controller implements these registers:

20
NOVA/nova_dsk.c
View File

@@ -164,10 +164,10 @@ if ((pulse == iopP) && ((dsk_wlk >> GET_DISK (dsk_da)) & 1)) { /* wrt lock? */
if (pulse & 1) { /* read or write? */
if (((t_addr) (dsk_da * DSK_NUMWD)) >= dsk_unit.capac) { /* inv sev? */
dev_done = dev_done | INT_DSK; /* set done */
int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable);
dsk_stat = DSKS_ERR + DSKS_NSD; /* set status */
return rval; } /* done */
dev_done = dev_done | INT_DSK; /* set done */
int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable);
dsk_stat = DSKS_ERR + DSKS_NSD; /* set status */
return rval; } /* done */
dsk_unit.FUNC = pulse; /* save command */
dev_busy = dev_busy | INT_DSK; /* set busy */
t = sector_map[dsk_da & DSK_MMASK] - GET_SECTOR (dsk_time);
@@ -193,16 +193,16 @@ if ((uptr->flags & UNIT_BUF) == 0) { /* not buf? abort */
da = dsk_da * DSK_NUMWD; /* calc disk addr */
if (uptr->FUNC == iopS) { /* read? */
for (i = 0; i < DSK_NUMWD; i++) { /* copy sector */
pa = MapAddr (0, (dsk_ma + i) & AMASK); /* map address */
if (MEM_ADDR_OK (pa)) M[pa] =
*(((int16 *) uptr->filebuf) + da + i); }
pa = MapAddr (0, (dsk_ma + i) & AMASK); /* map address */
if (MEM_ADDR_OK (pa)) M[pa] =
*(((int16 *) uptr->filebuf) + da + i); }
dsk_ma = (dsk_ma + DSK_NUMWD) & AMASK; }
if (uptr->FUNC == iopP) { /* write? */
for (i = 0; i < DSK_NUMWD; i++) { /* copy sector */
pa = MapAddr (0, (dsk_ma + i) & AMASK); /* map address */
*(((int16 *) uptr->filebuf) + da + i) = M[pa]; }
pa = MapAddr (0, (dsk_ma + i) & AMASK); /* map address */
*(((int16 *) uptr->filebuf) + da + i) = M[pa]; }
if (((t_addr) (da + i)) >= uptr->hwmark) /* past end? */
uptr->hwmark = da + i + 1; /* upd hwmark */
uptr->hwmark = da + i + 1; /* upd hwmark */
dsk_ma = (dsk_ma + DSK_NUMWD + 3) & AMASK; }
dsk_stat = 0; /* set status */

2
NOVA/nova_lp.c
View File

@@ -81,7 +81,7 @@ case iopS: /* start */
int_req = int_req & ~INT_LPT;
if ((lpt_unit.buf != 015) && (lpt_unit.buf != 014) &&
(lpt_unit.buf != 012))
return (lpt_svc (&lpt_unit) << IOT_V_REASON);
return (lpt_svc (&lpt_unit) << IOT_V_REASON);
sim_activate (&lpt_unit, lpt_unit.wait);
break;
case iopC: /* clear */

105
NOVA/nova_mta.c
View File

@@ -261,31 +261,33 @@ case iopS: /* start */
c = GET_CMD (mta_cu); /* get command */
if (dev_busy & INT_MTA) break; /* ignore if busy */
if ((uptr->USTAT & STA_RDY) == 0) { /* drive not ready? */
mta_sta = mta_sta | STA_ILL; /* illegal op */
dev_busy = dev_busy & ~INT_MTA; /* clear busy */
dev_done = dev_done | INT_MTA; /* set done */
int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable); }
mta_sta = mta_sta | STA_ILL; /* illegal op */
dev_busy = dev_busy & ~INT_MTA; /* clear busy */
dev_done = dev_done | INT_MTA; /* set done */
int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable); }
else if ((c == CU_REWIND) || (c == CU_UNLOAD)) { /* rewind, unload? */
mta_upddsta (uptr, (uptr->USTAT & /* update status */
~(STA_BOT | STA_EOF | STA_EOT | STA_RDY)) | STA_REW);
sim_activate (uptr, mta_rwait); /* start IO */
if (c == CU_UNLOAD) detach_unit (uptr); }
else { mta_sta = 0; /* clear errors */
dev_busy = dev_busy | INT_MTA; /* set busy */
dev_done = dev_done & ~INT_MTA; /* clear done */
int_req = int_req & ~INT_MTA; /* clear int */
if (ctype[c]) sim_activate (uptr, mta_cwait);
else { mta_upddsta (uptr, uptr->USTAT &
~(STA_BOT | STA_EOF | STA_EOT | STA_RDY));
sim_activate (uptr, mta_rwait); } }
mta_upddsta (uptr, (uptr->USTAT & /* update status */
~(STA_BOT | STA_EOF | STA_EOT | STA_RDY)) | STA_REW);
sim_activate (uptr, mta_rwait); /* start IO */
if (c == CU_UNLOAD) detach_unit (uptr); }
else {
mta_sta = 0; /* clear errors */
dev_busy = dev_busy | INT_MTA; /* set busy */
dev_done = dev_done & ~INT_MTA; /* clear done */
int_req = int_req & ~INT_MTA; /* clear int */
if (ctype[c]) sim_activate (uptr, mta_cwait);
else {
mta_upddsta (uptr, uptr->USTAT &
~(STA_BOT | STA_EOF | STA_EOT | STA_RDY));
sim_activate (uptr, mta_rwait); } }
mta_updcsta (uptr); /* update status */
break;
case iopC: /* clear */
for (u = 0; u < MTA_NUMDR; u++) { /* loop thru units */
uptr = mta_dev.units + u; /* cancel IO */
if (sim_is_active (uptr) && !(uptr->USTAT & STA_REW)) {
mta_upddsta (uptr, uptr->USTAT | STA_RDY);
sim_cancel (uptr); } }
uptr = mta_dev.units + u; /* cancel IO */
if (sim_is_active (uptr) && !(uptr->USTAT & STA_REW)) {
mta_upddsta (uptr, uptr->USTAT | STA_RDY);
sim_cancel (uptr); } }
dev_busy = dev_busy & ~INT_MTA; /* clear busy */
dev_done = dev_done & ~INT_MTA; /* clear done */
int_req = int_req & ~INT_MTA; /* clear int */
@@ -338,7 +340,7 @@ case CU_CMODE: /* controller mode */
case CU_DMODE: /* drive mode */
if (uptr->pos) mta_sta = mta_sta | STA_ILL; /* must be BOT */
else mta_upddsta (uptr, (mta_cu & CU_PE)? /* update drv status */
uptr->USTAT | STA_PEM: uptr->USTAT & ~ STA_PEM);
uptr->USTAT | STA_PEM: uptr->USTAT & ~ STA_PEM);
break;
/* Unit service, continued */
@@ -350,23 +352,24 @@ case CU_READNS: /* read non-stop */
cbc = wc * 2; /* expected bc */
if (tbc & 1) mta_sta = mta_sta | STA_ODD; /* odd byte count? */
if (tbc > cbc) mta_sta = mta_sta | STA_WCO; /* too big? */
else { cbc = tbc; /* no, use it */
wc = (cbc + 1) / 2; } /* adjust wc */
else {
cbc = tbc; /* no, use it */
wc = (cbc + 1) / 2; } /* adjust wc */
i = fxread (dbuf, sizeof (int8), cbc, uptr->fileref);
for ( ; i < cbc; i++) dbuf[i] = 0;
mta_upddsta (uptr, uptr->USTAT | STA_RDY);
if (err = ferror (uptr->fileref)) { /* error? */
MT_SET_PNU (uptr); /* pos not upd */
break; }
MT_SET_PNU (uptr); /* pos not upd */
break; }
for (i = p = 0; i < wc; i++) { /* copy buf to mem */
c1 = dbuf[p++];
c2 = dbuf[p++];
pa = MapAddr (0, mta_ma); /* map address */
if (MEM_ADDR_OK (pa)) M[pa] = (c1 << 8) | c2;
mta_ma = (mta_ma + 1) & AMASK; }
c1 = dbuf[p++];
c2 = dbuf[p++];
pa = MapAddr (0, mta_ma); /* map address */
if (MEM_ADDR_OK (pa)) M[pa] = (c1 << 8) | c2;
mta_ma = (mta_ma + 1) & AMASK; }
mta_wc = (mta_wc + wc) & DMASK;
uptr->pos = uptr->pos + ((tbc + 1) & ~1) +
(2 * sizeof (t_mtrlnt));
(2 * sizeof (t_mtrlnt));
break;
case CU_WRITE: /* write */
@@ -374,16 +377,17 @@ case CU_WRITE: /* write */
tbc = wc * 2; /* io byte count */
fxwrite (&tbc, sizeof (t_mtrlnt), 1, uptr->fileref);
for (i = p = 0; i < wc; i++) { /* copy to buffer */
pa = MapAddr (0, mta_ma); /* map address */
dbuf[p++] = (M[pa] >> 8) & 0377;
dbuf[p++] = M[pa] & 0377;
mta_ma = (mta_ma + 1) & AMASK; }
pa = MapAddr (0, mta_ma); /* map address */
dbuf[p++] = (M[pa] >> 8) & 0377;
dbuf[p++] = M[pa] & 0377;
mta_ma = (mta_ma + 1) & AMASK; }
fxwrite (dbuf, sizeof (int8), tbc, uptr->fileref);
fxwrite (&tbc, sizeof (t_mtrlnt), 1, uptr->fileref);
mta_upddsta (uptr, uptr->USTAT | STA_RDY);
if (err = ferror (uptr->fileref)) MT_SET_PNU (uptr); /* error? */
else { mta_wc = 0;
uptr->pos = uptr->pos + tbc + (2 * sizeof (t_mtrlnt)); }
else {
mta_wc = 0;
uptr->pos = uptr->pos + tbc + (2 * sizeof (t_mtrlnt)); }
break;
/* Unit service, continued */
@@ -401,20 +405,23 @@ case CU_ERASE: /* erase */
break;
case CU_SPACEF: /* space forward */
do { mta_wc = (mta_wc + 1) & DMASK; /* incr wc */
if (mta_rdlntf (uptr, &tbc, &err)) break; /* read rec lnt, err? */
uptr->pos = uptr->pos + ((tbc + 1) & ~1) +
(2 * sizeof (t_mtrlnt)); }
do {
mta_wc = (mta_wc + 1) & DMASK; /* incr wc */
if (mta_rdlntf (uptr, &tbc, &err)) break; /* read rec lnt, err? */
uptr->pos = uptr->pos + ((tbc + 1) & ~1) +
(2 * sizeof (t_mtrlnt)); }
while (mta_wc != 0);
mta_upddsta (uptr, uptr->USTAT | STA_RDY);
break;
case CU_SPACER: /* space reverse */
do { mta_wc = (mta_wc + 1) & DMASK; /* incr wc */
if (pnu) pnu = 0; /* pos not upd? */
else { if (mta_rdlntr (uptr, &tbc, &err)) break;
uptr->pos = uptr->pos - ((tbc + 1) & ~1) -
(2 * sizeof (t_mtrlnt)); } }
do {
mta_wc = (mta_wc + 1) & DMASK; /* incr wc */
if (pnu) pnu = 0; /* pos not upd? */
else {
if (mta_rdlntr (uptr, &tbc, &err)) break;
uptr->pos = uptr->pos - ((tbc + 1) & ~1) -
(2 * sizeof (t_mtrlnt)); } }
while (mta_wc != 0);
mta_upddsta (uptr, uptr->USTAT | STA_RDY);
break;
@@ -537,9 +544,9 @@ for (u = 0; u < MTA_NUMDR; u++) { /* loop thru units */
MT_CLR_PNU (uptr); /* clear pos flag */
sim_cancel (uptr); /* cancel activity */
if (uptr->flags & UNIT_ATT) uptr->USTAT = STA_RDY |
(uptr->USTAT & STA_PEM) |
((uptr->flags & UNIT_WPRT)? STA_WLK: 0) |
((uptr->pos)? 0: STA_BOT);
(uptr->USTAT & STA_PEM) |
((uptr->flags & UNIT_WPRT)? STA_WLK: 0) |
((uptr->pos)? 0: STA_BOT);
else uptr->USTAT = 0; }
mta_updcsta (&mta_unit[0]); /* update status */
return SCPE_OK;

4
NOVA/nova_pt.c
View File

@@ -138,8 +138,8 @@ if ((ptr_unit.flags & UNIT_ATT) == 0) /* attached? */
return IORETURN (ptr_stopioe, SCPE_UNATT);
if ((temp = getc (ptr_unit.fileref)) == EOF) { /* end of file? */
if (feof (ptr_unit.fileref)) {
if (ptr_stopioe) printf ("PTR end of file\n");
else return SCPE_OK; }
if (ptr_stopioe) printf ("PTR end of file\n");
else return SCPE_OK; }
else perror ("PTR I/O error");
clearerr (ptr_unit.fileref);
return SCPE_IOERR; }

224
NOVA/nova_sys.c
View File

@@ -134,64 +134,64 @@ state = 0;
while ((i = getc (fileref)) != EOF) {
switch (state) {
case 0: /* leader */
count = i;
state = (count != 0);
break;
count = i;
state = (count != 0);
break;
case 1: /* high count */
csum = count = (i << 8) | count;
state = 2;
break;
csum = count = (i << 8) | count;
state = 2;
break;
case 2: /* low origin */
origin = i;
state = 3;
break;
origin = i;
state = 3;
break;
case 3: /* high origin */
origin = (i << 8) | origin;
csum = csum + origin;
state = 4;
break;
origin = (i << 8) | origin;
csum = csum + origin;
state = 4;
break;
case 4: /* low checksum */
csum = csum + i;
state = 5;
break;
csum = csum + i;
state = 5;
break;
case 5: /* high checksum */
csum = csum + (i << 8);
if (count == 1) saved_PC = origin; /* count = 1? */
if (count <= 1) { /* count = 0/1? */
if (csum & 0177777) return SCPE_CSUM;
state = 0;
break; }
if (count < 0100000) { /* count > 1 */
state = 8;
break; }
count = 0200000 - count;
state = 6;
break;
csum = csum + (i << 8);
if (count == 1) saved_PC = origin; /* count = 1? */
if (count <= 1) { /* count = 0/1? */
if (csum & 0177777) return SCPE_CSUM;
state = 0;
break; }
if (count < 0100000) { /* count > 1 */
state = 8;
break; }
count = 0200000 - count;
state = 6;
break;
case 6: /* low data */
data = i;
state = 7;
break;
data = i;
state = 7;
break;
case 7: /* high data */
data = (i << 8) | data;
csum = csum + data;
if (count > 20) { /* large block */
for (count = count - 1; count == 1; count--) {
if (origin >= MEMSIZE) return SCPE_NXM;
M[origin] = data;
origin = origin + 1; } }
if (origin >= MEMSIZE) return SCPE_NXM;
M[origin] = data;
origin = origin + 1;
count = count - 1;
if (count == 0) {
if (csum & 0177777) return SCPE_CSUM;
state = 0;
break; }
state = 6;
break;
data = (i << 8) | data;
csum = csum + data;
if (count > 20) { /* large block */
for (count = count - 1; count == 1; count--) {
if (origin >= MEMSIZE) return SCPE_NXM;
M[origin] = data;
origin = origin + 1; } }
if (origin >= MEMSIZE) return SCPE_NXM;
M[origin] = data;
origin = origin + 1;
count = count - 1;
if (count == 0) {
if (csum & 0177777) return SCPE_CSUM;
state = 0;
break; }
state = 6;
break;
case 8: /* error block */
if (i == 0377) state = 0;
break; } /* end switch */
if (i == 0377) state = 0;
break; } /* end switch */
} /* end while */
/* Ok to find end of tape between blocks or in error state */
@@ -542,10 +542,11 @@ case 0: /* absolute */
break;
case 1: /* PC rel */
if (disp & dsign) {
if (cflag) fprintf (of, "%-o", (addr - (dmax - disp)) & AMASK);
else fprintf (of, ".-%-o", dmax - disp); }
else { if (cflag) fprintf (of, "%-o", (addr + disp) & AMASK);
else fprintf (of, ".+%-o", disp); }
if (cflag) fprintf (of, "%-o", (addr - (dmax - disp)) & AMASK);
else fprintf (of, ".-%-o", dmax - disp); }
else {
if (cflag) fprintf (of, "%-o", (addr + disp) & AMASK);
else fprintf (of, ".+%-o", disp); }
break;
case 2: /* AC2 rel */
if (disp & dsign) fprintf (of, "-%-o,2", dmax - disp);
@@ -610,67 +611,67 @@ for (i = 0; opc_val[i] >= 0; i++) { /* loop thru ops */
switch (j) { /* switch on class */
case I_V_NPN: /* no operands */
fprintf (of, "%s", opcode[i]); /* opcode */
break;
fprintf (of, "%s", opcode[i]); /* opcode */
break;
case I_V_R: /* reg only */
fprintf (of, "%s %-o", opcode[i], dst);
break;
fprintf (of, "%s %-o", opcode[i], dst);
break;
case I_V_D: /* dev only */
if (dev_val[dv] >= 0)
fprintf (of, "%s %s", opcode[i], device[dv]);
else fprintf (of, "%s %-o", opcode[i], dev);
break;
if (dev_val[dv] >= 0)
fprintf (of, "%s %s", opcode[i], device[dv]);
else fprintf (of, "%s %-o", opcode[i], dev);
break;
case I_V_RD: /* reg, dev */
if (dev_val[dv] >= 0)
fprintf (of, "%s %-o,%s", opcode[i], dst, device[dv]);
else fprintf (of, "%s %-o,%-o", opcode[i], dst, dev);
break;
if (dev_val[dv] >= 0)
fprintf (of, "%s %-o,%s", opcode[i], dst, device[dv]);
else fprintf (of, "%s %-o,%-o", opcode[i], dst, dev);
break;
case I_V_M: /* addr only */
fprintf (of, "%s ", opcode[i]);
fprint_addr (of, addr, ind, mode, disp, FALSE, cflag);
break;
fprintf (of, "%s ", opcode[i]);
fprint_addr (of, addr, ind, mode, disp, FALSE, cflag);
break;
case I_V_RM: /* reg, addr */
fprintf (of, "%s %-o,", opcode[i], dst);
fprint_addr (of, addr, ind, mode, disp, FALSE, cflag);
break;
fprintf (of, "%s %-o,", opcode[i], dst);
fprint_addr (of, addr, ind, mode, disp, FALSE, cflag);
break;
case I_V_RR: /* operate */
fprintf (of, "%s %-o,%-o", opcode[i], src, dst);
if (skp) fprintf (of, ",%s", skip[skp-1]);
break;
fprintf (of, "%s %-o,%-o", opcode[i], src, dst);
if (skp) fprintf (of, ",%s", skip[skp-1]);
break;
case I_V_BY: /* byte */
fprintf (of, "%s %-o,%-o", opcode[i], byac, dst);
break;
fprintf (of, "%s %-o,%-o", opcode[i], byac, dst);
break;
case I_V_2AC: /* reg, reg */
fprintf (of, "%s %-o,%-o", opcode[i], src, dst);
break;
fprintf (of, "%s %-o,%-o", opcode[i], src, dst);
break;
case I_V_RSI: /* reg, short imm */
fprintf (of, "%s %-o,%-o", opcode[i], src + 1, dst);
break;
fprintf (of, "%s %-o,%-o", opcode[i], src + 1, dst);
break;
case I_V_LI: /* long imm */
fprintf (of, "%s %-o", opcode[i], val[1]);
return -1;
fprintf (of, "%s %-o", opcode[i], val[1]);
return -1;
case I_V_RLI: /* reg, long imm */
fprintf (of, "%s %-o,%-o", opcode[i], val[1], dst);
return -1;
fprintf (of, "%s %-o,%-o", opcode[i], val[1], dst);
return -1;
case I_V_LM: /* long addr */
fprintf (of, "%s ", opcode[i]);
fprint_addr (of, addr, extind, mode, extdisp, TRUE, cflag);
return -1;
fprintf (of, "%s ", opcode[i]);
fprint_addr (of, addr, extind, mode, extdisp, TRUE, cflag);
return -1;
case I_V_RLM: /* reg, long addr */
fprintf (of, "%s %-o,", opcode[i], dst);
fprint_addr (of, addr, extind, mode, extdisp, TRUE, cflag);
return -1;
fprintf (of, "%s %-o,", opcode[i], dst);
fprint_addr (of, addr, extind, mode, extdisp, TRUE, cflag);
return -1;
case I_V_FRM: /* flt reg, long addr */
fprintf (of, "%s %-o,", opcode[i], dst);
fprint_addr (of, addr, extind, src, extdisp, TRUE, cflag);
return -1;
fprintf (of, "%s %-o,", opcode[i], dst);
fprint_addr (of, addr, extind, src, extdisp, TRUE, cflag);
return -1;
case I_V_FST: /* flt status */
fprintf (of, "%s ", opcode[i]);
fprint_addr (of, addr, extind, dst, extdisp, AMASK + 1, cflag);
return -1;
fprintf (of, "%s ", opcode[i]);
fprint_addr (of, addr, extind, dst, extdisp, AMASK + 1, cflag);
return -1;
case I_V_XP: /* XOP */
fprintf (of, "%s %-o,%-o,%-o", opcode[i], src, dst, xop);
break; } /* end case */
fprintf (of, "%s %-o,%-o,%-o", opcode[i], src, dst, xop);
break; } /* end case */
return SCPE_OK; } /* end if */
} /* end for */
return SCPE_ARG;
@@ -746,8 +747,8 @@ case A_NUM+A_FL: case A_NUM+A_SI+A_FL: /* CPU, (+)num */
else if (((d >= (((int32) addr - dsign) & AMASK)) &&
(d < (((int32) addr + dsign) & AMASK))) ||
(d >= ((int32) addr + (-dsign & AMASK)))) {
val[1] = 1; /* PC rel */
val[2] = (d - addr) & (dmax - 1); }
val[1] = 1; /* PC rel */
val[2] = (d - addr) & (dmax - 1); }
else return NULL;
break;
case A_PER: case A_PER+A_FL: /* . */
@@ -847,12 +848,13 @@ case I_V_RD: /* IOT reg,dev */
val[0] = val[0] | (d << I_V_DST); /* put in place */
case I_V_D: /* IOT dev */
cptr = get_glyph (cptr, gbuf, 0); /* get device */
for (i = 0; (device[i] != NULL) && (strcmp (device[i], gbuf) != 0);
i++);
for (i = 0; (device[i] != NULL) &&
(strcmp (device[i], gbuf) != 0); i++);
if (device[i] != NULL) val[0] = val[0] | dev_val[i];
else { d = get_uint (gbuf, 8, I_M_DEV, &r);
if (r != SCPE_OK) return SCPE_ARG;
val[0] = val[0] | (d << I_V_DEV); }
else {
d = get_uint (gbuf, 8, I_M_DEV, &r);
if (r != SCPE_OK) return SCPE_ARG;
val[0] = val[0] | (d << I_V_DEV); }
break;
case I_V_RM: /* reg, addr */
cptr = get_glyph (cptr, gbuf, ','); /* get register */
@@ -869,11 +871,11 @@ case I_V_RR: /* operate */
if (cptr == NULL) return SCPE_ARG;
val[0] = val[0] | (amd[0] << I_V_SRC) | (amd[1] << I_V_DST);
if (*cptr != 0) { /* skip? */
cptr = get_glyph (cptr, gbuf, 0); /* get skip */
for (i = 0; (skip[i] != NULL) &&
(strcmp (skip[i], gbuf) != 0); i++) ;
if (skip[i] == NULL) return SCPE_ARG;
val[0] = val[0] | (i + 1); } /* end for */
cptr = get_glyph (cptr, gbuf, 0); /* get skip */
for (i = 0; (skip[i] != NULL) &&
(strcmp (skip[i], gbuf) != 0); i++) ;
if (skip[i] == NULL) return SCPE_ARG;
val[0] = val[0] | (i + 1); } /* end for */
break;
case I_V_BY: /* byte */
cptr = get_2reg (cptr, 0, amd); /* get 2 reg */

7
NOVA/nova_tt.c
View File

@@ -1,6 +1,6 @@
/* nova_tt.c: NOVA console terminal simulator
Copyright (c) 1993-2002, Robert M. Supnik
Copyright (c) 1993-2003, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
@@ -26,6 +26,7 @@
tti terminal input
tto terminal output
05-Jan-02 RMS Fixed calling sequence for setmod
03-Oct-02 RMS Added DIBs
30-May-02 RMS Widened POS to 32b
30-Nov-01 RMS Added extended SET/SHOW support
@@ -46,7 +47,7 @@ t_stat tti_svc (UNIT *uptr);
t_stat tto_svc (UNIT *uptr);
t_stat tti_reset (DEVICE *dptr);
t_stat tto_reset (DEVICE *dptr);
t_stat ttx_setmod (UNIT *uptr, int32 val, char *cptr);
t_stat ttx_setmod (UNIT *uptr, int32 val, char *cptr, void *desc);
/* TTI data structures
@@ -210,7 +211,7 @@ sim_cancel (&tto_unit); /* deactivate unit */
return SCPE_OK;
}
t_stat ttx_setmod (UNIT *uptr, int32 val, char *cptr)
t_stat ttx_setmod (UNIT *uptr, int32 val, char *cptr, void *desc)
{
tti_unit.flags = (tti_unit.flags & ~UNIT_DASHER) | val;
tto_unit.flags = (tto_unit.flags & ~UNIT_DASHER) | val;

7
NOVA/nova_tt1.c
View File

@@ -1,6 +1,6 @@
/* nova_tt1.c: NOVA second terminal simulator
Copyright (c) 1993-2002, Robert M. Supnik
Copyright (c) 1993-2003, Robert M. Supnik
Written by Bruce Ray and used with his gracious permission.
Permission is hereby granted, free of charge, to any person obtaining a
@@ -27,6 +27,7 @@
tti1 second terminal input
tto1 second terminal output
05-Jan-03 RMS Fixed calling sequence for setmod
03-Oct-02 RMS Added DIBs
22-Aug-02 RMS Updated for changes in sim_tmxr
30-May-02 RMS Widened POS to 32b
@@ -58,7 +59,7 @@ t_stat tti1_svc (UNIT *uptr);
t_stat tto1_svc (UNIT *uptr);
t_stat tti1_reset (DEVICE *dptr);
t_stat tto1_reset (DEVICE *dptr);
t_stat ttx1_setmod (UNIT *uptr, int32 val, char *cptr);
t_stat ttx1_setmod (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat tti1_attach (UNIT *uptr, char *cptr);
t_stat tti1_detach (UNIT *uptr);
t_stat tti1_summ (FILE *st, UNIT *uptr, int32 val, void *desc);
@@ -259,7 +260,7 @@ sim_cancel (&tto1_unit); /* deactivate unit */
return SCPE_OK;
}
t_stat ttx1_setmod (UNIT *uptr, int32 val, char *cptr)
t_stat ttx1_setmod (UNIT *uptr, int32 val, char *cptr, void *desc)
{
tti1_unit.flags = (tti1_unit.flags & ~UNIT_DASHER) | val;
tto1_unit.flags = (tto1_unit.flags & ~UNIT_DASHER) | val;