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Notes For V2.10-0
WARNING: V2.10 has reorganized and renamed some of the definition files for the PDP-10, PDP-11, and VAX. Be sure to delete all previous source files before you unpack the Zip archive, or unpack it into a new directory structure. WARNING: V2.10 has a new, more comprehensive save file format. Restoring save files from previous releases will cause 'invalid register' errors and loss of CPU option flags, device enable/ disable flags, unit online/offline flags, and unit writelock flags. WARNING: If you are using Visual Studio .NET through the IDE, be sure to turn off the /Wp64 flag in the project settings, or dozens of spurious errors will be generated. WARNING: Compiling Ethernet support under Windows requires extra steps; see the Ethernet readme file. Ethernet support is currently available only for Windows, Linux, NetBSD, and OpenBSD. 1. New Features 1.1 SCP and Libraries - The VT emulation package has been replaced by the capability to remote the console to a Telnet session. Telnet clients typically have more complete and robust VT100 emulation. - Simulated devices may now have statically allocated buffers, in addition to dynamically allocated buffers or disk-based data stores. - The DO command now takes substitutable arguments (max 9). In command files, %n represents substitutable argument n. - The initial command line is now interpreted as the command name and substitutable arguments for a DO command. This is backward compatible to prior versions. - The initial command line parses switches. -Q is interpreted as quiet mode; informational messages are suppressed. - The HELP command now takes an optional argument. HELP <cmd> types help on the specified command. - Hooks have been added for implementing GUI-based consoles, as well as simulator-specific command extensions. A few internal data structures and definitions have changed. - Two new routines (tmxr_open_master, tmxr_close_master) have been added to sim_tmxr.c. The calling sequence for sim_accept_conn has been changed in sim_sock.c. - The calling sequence for the VM boot routine has been modified to add an additional parameter. - SAVE now saves, and GET now restores, controller and unit flags. - Library sim_ether.c has been added for Ethernet support. 1.2 VAX - Non-volatile RAM (NVR) can behave either like a memory or like a disk-based peripheral. If unattached, it behaves like memory and is saved and restored by SAVE and RESTORE, respectively. If attached, its contents are loaded from disk by ATTACH and written back to disk at DETACH and EXIT. - SHOW <device> VECTOR displays the device's interrupt vector. A few devices allow the vector to be changed with SET <device> VECTOR=nnn. - SHOW CPU IOSPACE displays the I/O space address map. - The TK50 (TMSCP tape) has been added. - The DEQNA/DELQA (Qbus Ethernet controllers) have been added. - Autoconfiguration support has been added. - The paper tape reader has been removed from vax_stddev.c and now references a common implementation file, dec_pt.h. - Examine and deposit switches now work on all devices, not just the CPU. - Device address conflicts are not detected until simulation starts. 1.3 PDP-11 - SHOW <device> VECTOR displays the device's interrupt vector. Most devices allow the vector to be changed with SET <device> VECTOR=nnn. - SHOW CPU IOSPACE displays the I/O space address map. - The TK50 (TMSCP tape), RK611/RK06/RK07 (cartridge disk), RX211 (double density floppy), and KW11P programmable clock have been added. - The DEQNA/DELQA (Qbus Ethernet controllers) have been added. - Autoconfiguration support has been added. - The paper tape reader has been removed from pdp11_stddev.c and now references a common implementation file, dec_pt.h. - Device bootstraps now use the actual CSR specified by the SET ADDRESS command, rather than just the default CSR. Note that PDP-11 operating systems may NOT support booting with non-standard addresses. - Specifying more than 256KB of memory, or changing the bus configuration, causes all peripherals that are not compatible with the current bus configuration to be disabled. - Device address conflicts are not detected until simulation starts. 1.4 PDP-10 - SHOW <device> VECTOR displays the device's interrupt vector. A few devices allow the vector to be changed with SET <device> VECTOR=nnn. - SHOW CPU IOSPACE displays the I/O space address map. - The RX211 (double density floppy) has been added; it is off by default. - The paper tape now references a common implementation file, dec_pt.h. - Device address conflicts are not detected until simulation starts. 1.5 PDP-1 - DECtape (then known as MicroTape) support has been added. - The line printer and DECtape can be disabled and enabled. 1.6 PDP-8 - The RX28 (double density floppy) has been added as an option to the existing RX8E controller. - SHOW <device> DEVNO displays the device's device number. Most devices allow the device number to be changed with SET <device> DEVNO=nnn. - Device number conflicts are not detected until simulation starts. 1.7 IBM 1620 - The IBM 1620 simulator has been released. 1.8 AltairZ80 - A hard drive has been added for increased storage. - Several bugs have been fixed. 1.9 HP 2100 - The 12845A has been added and made the default line printer (LPT). The 12653A has been renamed LPS and is off by default. It also supports the diagnostic functions needed to run the DCPC and DMS diagnostics. - The 12557A/13210A disk defaults to the 13210A (7900/7901). - The 12559A magtape is off by default. - New CPU options (EAU/NOEAU) enable/disable the extended arithmetic instructions for the 2116. These instructions are standard on the 2100 and 21MX. - New CPU options (MPR/NOMPR) enable/disable memory protect for the 2100 and 21MX. - New CPU options (DMS/NODMS) enable/disable the dynamic mapping instructions for the 21MX. - The 12539 timebase generator autocalibrates. 1.10 Simulated Magtapes - Simulated magtapes recognize end of file and the marker 0xFFFFFFFF as end of medium. Only the TMSCP tape simulator can generate an end of medium marker. - The error handling in simulated magtapes was overhauled to be consistent through all simulators. 1.11 Simulated DECtapes - Added support for RT11 image file format (256 x 16b) to DECtapes. 2. Release Notes 2.1 Bugs Fixed - TS11/TSV05 was not simulating the XS0_MOT bit, causing failures under VMS. In addition, two of the CTL options were coded interchanged. - IBM 1401 tape was not setting a word mark under group mark for load mode reads. This caused the diagnostics to crash. - SCP bugs in ssh_break and set_logon were fixed (found by Dave Hittner). - Numerous bugs in the HP 2100 extended arithmetic, floating point, 21MX, DMS, and IOP instructions were fixed. Bugs were also fixed in the memory protect and DMS functions. The moving head disks (DP, DQ) were revised to simulate the hardware more accurately. Missing functions in DQ (address skip, read address) were added. 2.2 HP 2100 Debugging - The HP 2100 CPU nows runs all of the CPU diagnostics. - The peripherals run most of the peripheral diagnostics. There is still a problem in overlapped seek operation on the disks. See the file hp2100_diag.txt for details. 3. In Progress These simulators are not finished and are available in a separate Zip archive distribution. - Interdata 16b/32b: coded, partially tested. See the file id_diag.txt for details. - SDS 940: coded, partially tested.
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
df6475181c
commit
2c2dd5ea33
416
PDP11/pdp11_io.c
416
PDP11/pdp11_io.c
@@ -23,6 +23,10 @@
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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08-Oct-02 RMS Trimmed I/O bus addresses
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Added support for dynamic tables
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Added show I/O space, autoconfigure routines
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12-Sep-02 RMS Added support for TMSCP, KW11P, RX211
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26-Jan-02 RMS Revised for multiple DZ's
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06-Jan-02 RMS Revised I/O access, enable/disable support
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11-Dec-01 RMS Moved interrupt debug code
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@@ -35,76 +39,36 @@ extern uint16 *M;
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extern int32 int_req[IPL_HLVL];
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extern int32 ub_map[UBM_LNT_LW];
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extern UNIT cpu_unit;
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extern int32 cpu_bme, cpu_ubm;
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extern int32 cpu_bme, cpu_18b, cpu_ubm;
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extern int32 trap_req, ipl;
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extern int32 cpu_log;
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extern FILE *sim_log;
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extern DEVICE *sim_devices[];
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int32 calc_ints (int32 nipl, int32 trq);
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extern DIB cpu0_dib, cpu1_dib, cpu2_dib;
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extern DIB cpu3_dib, cpu4_dib, ubm_dib;
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extern DIB pt_dib, tt_dib, clk_dib;
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extern DIB lpt_dib, dz_dib;
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extern DIB rk_dib, rl_dib;
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extern DIB rp_dib, rq_dib;
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extern DIB rx_dib, dt_dib;
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extern DIB tm_dib, ts_dib;
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extern int32 rk_inta (void);
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extern int32 rp_inta (void);
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extern int32 rq_inta (void);
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extern int32 dz_rxinta (void);
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extern int32 dz_txinta (void);
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t_bool dev_conflict (uint32 nba, DIB *curr);
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/* I/O data structures */
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DIB *dib_tab[] = {
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DIB *dib_tab[DIB_MAX]; /* run time DIBs */
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int32 int_vec[IPL_HLVL][32]; /* int req to vector */
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int32 (*int_ack[IPL_HLVL][32])(void); /* int ack routines */
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static DIB *std_dib[] = { /* standard DIBs */
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&cpu0_dib,
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&cpu1_dib,
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&cpu2_dib,
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&cpu3_dib,
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&cpu4_dib,
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&ubm_dib,
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&pt_dib,
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&tt_dib,
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&clk_dib,
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&lpt_dib,
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&dz_dib,
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&rk_dib,
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&rl_dib,
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&rp_dib,
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&rq_dib,
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&rx_dib,
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&dt_dib,
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&tm_dib,
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&ts_dib,
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NULL };
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int32 int_vec[IPL_HLVL][32] = { /* int req to vector */
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{ 0 }, /* IPL 0 */
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{ VEC_PIRQ }, /* IPL 1 */
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{ VEC_PIRQ }, /* IPL 2 */
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{ VEC_PIRQ }, /* IPL 3 */
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{ VEC_TTI, VEC_TTO, VEC_PTR, VEC_PTP, /* IPL 4 */
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VEC_LPT, VEC_PIRQ },
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{ VEC_RK, VEC_RL, VEC_RX, VEC_TM, /* IPL 5 */
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VEC_RP, VEC_TS, VEC_RK6, VEC_RQ,
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VEC_DZRX, VEC_DZTX, VEC_PIRQ },
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{ VEC_CLK, VEC_DTA, VEC_PIRQ }, /* IPL 6 */
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{ VEC_PIRQ } }; /* IPL 7 */
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int32 (*int_ack[IPL_HLVL][32])() = { /* int ack routines */
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{ NULL }, /* IPL 0 */
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{ NULL }, /* IPL 1 */
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{ NULL }, /* IPL 2 */
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{ NULL }, /* IPL 3 */
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{ NULL }, /* IPL 4 */
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{ &rk_inta, NULL, NULL, NULL, /* IPL 5 */
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&rp_inta, NULL, NULL, &rq_inta,
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&dz_rxinta, &dz_txinta, NULL },
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{ NULL }, /* IPL 6 */
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{ NULL } }; /* IPL 7 */
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static int32 pirq_vloc[7] = {
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IVCL (PIR7), IVCL (PIR6), IVCL (PIR5), IVCL (PIR4),
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IVCL (PIR3), IVCL (PIR2), IVCL (PIR1) };
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/* I/O page lookup and linkage routines
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@@ -124,9 +88,9 @@ DIB *dibp;
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t_stat stat;
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for (i = 0; dibp = dib_tab[i]; i++ ) {
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if (dibp -> enb && (pa >= dibp -> ba) &&
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(pa < (dibp -> ba + dibp -> lnt))) {
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stat = dibp -> rd (data, pa, access);
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if ((pa >= dibp->ba) &&
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(pa < (dibp->ba + dibp->lnt))) {
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stat = dibp->rd (data, pa, access);
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trap_req = calc_ints (ipl, trap_req);
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return stat; } }
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return SCPE_NXM;
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@@ -139,9 +103,9 @@ DIB *dibp;
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t_stat stat;
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for (i = 0; dibp = dib_tab[i]; i++ ) {
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if (dibp -> enb && (pa >= dibp -> ba) &&
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(pa < (dibp -> ba + dibp -> lnt))) {
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stat = dibp -> wr (data, pa, access);
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if ((pa >= dibp->ba) &&
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(pa < (dibp->ba + dibp->lnt))) {
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stat = dibp->wr (data, pa, access);
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trap_req = calc_ints (ipl, trap_req);
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return stat; } }
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return SCPE_NXM;
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@@ -217,6 +181,8 @@ return SCPE_NXM;
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/* Mapped memory access routines for DMA devices */
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#define BUSMASK(m) ((cpu_18b || (cpu_ubm && (m)))? UNIMASK: PAMASK)
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/* Map I/O address to memory address */
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t_bool Map_Addr (t_addr ba, t_addr *ma)
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@@ -239,12 +205,13 @@ return TRUE;
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Map_WriteW - store word buffer into memory
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*/
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int32 Map_ReadB (t_addr ba, int32 bc, uint8 *buf, t_bool ub)
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int32 Map_ReadB (t_addr ba, int32 bc, uint8 *buf, t_bool map)
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{
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t_addr alim, lim, ma;
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ba = ba & BUSMASK (map); /* trim address */
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lim = ba + bc;
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if (ub && cpu_bme) { /* UB, map on? */
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if (map && cpu_bme) { /* map req & on? */
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for ( ; ba < lim; ba++) { /* by bytes */
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Map_Addr (ba, &ma); /* map addr */
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if (!ADDR_IS_MEM (ma)) return (lim - ba); /* NXM? err */
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@@ -261,13 +228,13 @@ else { /* physical */
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return (lim - alim); }
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}
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int32 Map_ReadW (t_addr ba, int32 bc, uint16 *buf, t_bool ub)
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int32 Map_ReadW (t_addr ba, int32 bc, uint16 *buf, t_bool map)
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{
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t_addr alim, lim, ma;
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ba = ba & ~01; /* align start */
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ba = (ba & BUSMASK (map)) & ~01; /* trim, align addr */
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lim = ba + (bc & ~01);
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if (ub && cpu_bme) { /* UB, map on? */
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if (map && cpu_bme) { /* map req & on? */
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for (; ba < lim; ba = ba + 2) { /* by words */
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Map_Addr (ba, &ma); /* map addr */
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if (!ADDR_IS_MEM (ma)) return (lim - ba); /* NXM? err */
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@@ -282,12 +249,13 @@ else { /* physical */
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return (lim - alim); }
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}
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int32 Map_WriteB (t_addr ba, int32 bc, uint8 *buf, t_bool ub)
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int32 Map_WriteB (t_addr ba, int32 bc, uint8 *buf, t_bool map)
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{
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t_addr alim, lim, ma;
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ba = ba & BUSMASK (map); /* trim address */
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lim = ba + bc;
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if (ub && cpu_bme) { /* UB, map on? */
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if (map && cpu_bme) { /* map req & on? */
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for ( ; ba < lim; ba++) { /* by bytes */
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Map_Addr (ba, &ma); /* map addr */
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if (!ADDR_IS_MEM (ma)) return (lim - ba); /* NXM? err */
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@@ -306,13 +274,13 @@ else { /* physical */
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return (lim - alim); }
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}
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int32 Map_WriteW (t_addr ba, int32 bc, uint16 *buf, t_bool ub)
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int32 Map_WriteW (t_addr ba, int32 bc, uint16 *buf, t_bool map)
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{
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t_addr alim, lim, ma;
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ba = ba & ~01; /* align start */
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ba = (ba & BUSMASK (map)) & ~01; /* trim, align addr */
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lim = ba + (bc & ~01);
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if (ub && cpu_bme) { /* UB, map on? */
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if (map && cpu_bme) { /* map req & on? */
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for (; ba < lim; ba = ba + 2) { /* by words */
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Map_Addr (ba, &ma); /* map addr */
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if (!ADDR_IS_MEM (ma)) return (lim - ba); /* NXM? err */
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@@ -327,85 +295,305 @@ else { /* physical */
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return (lim - alim); }
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}
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/* Change device number for a device */
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/* Change device address */
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t_stat set_addr (UNIT *uptr, int32 val, char *cptr, void *desc)
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{
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DEVICE *dptr;
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DIB *dibp;
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uint32 newba;
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t_stat r;
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if (cptr == NULL) return SCPE_ARG;
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if ((val == 0) || (desc == NULL)) return SCPE_IERR;
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dibp = (DIB *) desc;
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if ((val == 0) || (uptr == NULL)) return SCPE_IERR;
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dptr = find_dev_from_unit (uptr);
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if (dptr == NULL) return SCPE_IERR;
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dibp = (DIB *) dptr->ctxt;
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if (dibp == NULL) return SCPE_IERR;
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newba = get_uint (cptr, 8, PAMASK, &r); /* get new */
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if ((r != SCPE_OK) || (newba == dibp -> ba)) return r;
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if (newba <= IOPAGEBASE) return SCPE_ARG; /* > IO page base? */
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if (newba % ((uint32) val)) return SCPE_ARG; /* check modulus */
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if (dev_conflict (newba, dibp)) return SCPE_OK;
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dibp -> ba = newba; /* store */
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return SCPE_OK;
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if (r != SCPE_OK) return r; /* error? */
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if ((newba <= IOPAGEBASE) || /* > IO page base? */
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(newba % ((uint32) val))) return SCPE_ARG; /* check modulus */
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dibp->ba = newba; /* store */
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dptr->flags = dptr->flags & ~DEV_FLTA; /* not floating */
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return auto_config (0, 0); /* autoconfigure */
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}
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/* Show device address */
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t_stat show_addr (FILE *st, UNIT *uptr, int32 val, void *desc)
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{
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DEVICE *dptr;
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DIB *dibp;
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if (desc == NULL) return SCPE_IERR;
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dibp = (DIB *) desc;
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if (dibp -> ba <= IOPAGEBASE) return SCPE_IERR;
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fprintf (st, "address=%08o", dibp -> ba);
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if (dibp -> lnt > 1)
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fprintf (st, "-%08o", dibp -> ba + dibp -> lnt - 1);
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if (uptr == NULL) return SCPE_IERR;
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dptr = find_dev_from_unit (uptr);
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if (dptr == NULL) return SCPE_IERR;
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dibp = (DIB *) dptr->ctxt;
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if ((dibp == NULL) || (dibp->ba <= IOPAGEBASE)) return SCPE_IERR;
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fprintf (st, "address=%08o", dibp->ba);
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if (dibp->lnt > 1)
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fprintf (st, "-%08o", dibp->ba + dibp->lnt - 1);
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if (dptr->flags & DEV_FLTA) fprintf (st, "*");
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return SCPE_OK;
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}
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/* Enable or disable a device */
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/* Set address floating */
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t_stat set_enbdis (UNIT *uptr, int32 val, char *cptr, void *desc)
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t_stat set_addr_flt (UNIT *uptr, int32 val, char *cptr, void *desc)
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{
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int32 i;
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DEVICE *dptr;
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DIB *dibp;
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UNIT *up;
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if (cptr != NULL) return SCPE_ARG;
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if ((uptr == NULL) || (desc == NULL)) return SCPE_IERR;
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dptr = find_dev_from_unit (uptr); /* find device */
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if (uptr == NULL) return SCPE_IERR;
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dptr = find_dev_from_unit (uptr);
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if (dptr == NULL) return SCPE_IERR;
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dibp = (DIB *) desc;
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if ((val ^ dibp -> enb) == 0) return SCPE_OK; /* enable chg? */
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if (val) { /* enable? */
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if (dev_conflict (dibp -> ba, dibp)) return SCPE_OK; }
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else { /* disable */
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for (i = 0; i < dptr -> numunits; i++) { /* check units */
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up = (dptr -> units) + i;
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if ((up -> flags & UNIT_ATT) || sim_is_active (up))
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return SCPE_NOFNC; } }
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dibp -> enb = val;
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if (dptr -> reset) return dptr -> reset (dptr);
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else return SCPE_OK;
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dptr->flags = dptr->flags | DEV_FLTA; /* floating */
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return auto_config (0, 0); /* autoconfigure */
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}
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/* Change device vector */
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t_stat set_vec (UNIT *uptr, int32 arg, char *cptr, void *desc)
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{
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DEVICE *dptr;
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DIB *dibp;
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uint32 newvec;
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t_stat r;
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if (cptr == NULL) return SCPE_ARG;
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if (uptr == NULL) return SCPE_IERR;
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dptr = find_dev_from_unit (uptr);
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if (dptr == NULL) return SCPE_IERR;
|
||||
dibp = (DIB *) dptr->ctxt;
|
||||
if (dibp == NULL) return SCPE_IERR;
|
||||
newvec = get_uint (cptr, 8, VEC_Q + 01000, &r);
|
||||
if ((r != SCPE_OK) || (newvec <= VEC_Q) ||
|
||||
((newvec + (dibp->vnum * 4)) >= (VEC_Q + 01000)) ||
|
||||
(newvec & ((dibp->vnum > 1)? 07: 03))) return SCPE_ARG;
|
||||
dibp->vec = newvec;
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Show device vector */
|
||||
|
||||
t_stat show_vec (FILE *st, UNIT *uptr, int32 arg, void *desc)
|
||||
{
|
||||
DEVICE *dptr;
|
||||
DIB *dibp;
|
||||
uint32 vec, numvec;
|
||||
|
||||
if (uptr == NULL) return SCPE_IERR;
|
||||
dptr = find_dev_from_unit (uptr);
|
||||
if (dptr == NULL) return SCPE_IERR;
|
||||
dibp = (DIB *) dptr->ctxt;
|
||||
if (dibp == NULL) return SCPE_IERR;
|
||||
vec = dibp->vec;
|
||||
if (arg) numvec = arg;
|
||||
else numvec = dibp->vnum;
|
||||
if (vec == 0) fprintf (st, "no vector");
|
||||
else { fprintf (st, "vector=%o", vec);
|
||||
if (numvec > 1) fprintf (st, "-%o", vec + (4 * (numvec - 1))); }
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Test for conflict in device addresses */
|
||||
|
||||
t_bool dev_conflict (uint32 nba, DIB *curr)
|
||||
t_bool dev_conflict (DIB *curr)
|
||||
{
|
||||
uint32 i, end;
|
||||
DEVICE *dptr;
|
||||
DIB *dibp;
|
||||
|
||||
end = nba + curr -> lnt - 1; /* get end */
|
||||
for (i = 0; dibp = dib_tab[i]; i++) { /* loop thru dev */
|
||||
if (!dibp -> enb || (dibp == curr)) continue; /* skip disabled */
|
||||
if (((nba >= dibp -> ba) && /* overlap start? */
|
||||
(nba < (dibp -> ba + dibp -> lnt))) ||
|
||||
((end >= dibp -> ba) && /* overlap end? */
|
||||
(end < (dibp -> ba + dibp -> lnt)))) {
|
||||
printf ("Device address conflict at %08o\n", dibp -> ba);
|
||||
end = curr->ba + curr->lnt - 1; /* get end */
|
||||
for (i = 0; (dptr = sim_devices[i]) != NULL; i++) { /* loop thru dev */
|
||||
dibp = (DIB *) dptr->ctxt; /* get DIB */
|
||||
if ((dibp == NULL) || (dibp == curr) ||
|
||||
(dptr->flags & DEV_DIS)) continue;
|
||||
if (((curr->ba >= dibp->ba) && /* overlap start? */
|
||||
(curr->ba < (dibp->ba + dibp->lnt))) ||
|
||||
((end >= dibp->ba) && /* overlap end? */
|
||||
(end < (dibp->ba + dibp->lnt)))) {
|
||||
printf ("Device %s address conflict at %08o\n", dptr->name, dibp->ba);
|
||||
if (sim_log) fprintf (sim_log,
|
||||
"Device number conflict at %08o\n", dibp -> ba);
|
||||
return TRUE; } }
|
||||
"Device %s address conflict at %08o\n", dptr->name, dibp->ba);
|
||||
return TRUE; } }
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/* Build interrupt tables */
|
||||
|
||||
void build_int_vec (int32 vloc, int32 ivec, int32 (*iack)(void) )
|
||||
{
|
||||
int32 ilvl = vloc / 32;
|
||||
int32 ibit = vloc % 32;
|
||||
|
||||
if (iack != NULL) int_ack[ilvl][ibit] = iack;
|
||||
else int_vec[ilvl][ibit] = ivec;
|
||||
return;
|
||||
}
|
||||
|
||||
/* Build dib_tab from device list */
|
||||
|
||||
t_stat build_dib_tab (int32 ubm)
|
||||
{
|
||||
int32 i, j, k;
|
||||
DEVICE *dptr;
|
||||
DIB *dibp;
|
||||
|
||||
for (i = 0; i < IPL_HLVL; i++) { /* clear int tables */
|
||||
for (j = 0; j < 32; j++) {
|
||||
int_vec[i][j] = 0;
|
||||
int_ack[i][j] = NULL; } }
|
||||
for (i = j = 0; (dptr = sim_devices[i]) != NULL; i++) { /* loop thru dev */
|
||||
dibp = (DIB *) dptr->ctxt; /* get DIB */
|
||||
if (dibp && !(dptr->flags & DEV_DIS)) { /* defined, enabled? */
|
||||
if (dibp->vnum > VEC_DEVMAX) return SCPE_IERR;
|
||||
for (k = 0; k < dibp->vnum; k++) /* loop thru vec */
|
||||
build_int_vec (dibp->vloc + k, /* add vector */
|
||||
dibp->vec + (k * 4), dibp->ack[k]);
|
||||
if (dibp->lnt != 0) { /* I/O addresses? */
|
||||
dib_tab[j++] = dibp; /* add DIB to dib_tab */
|
||||
if (j >= DIB_MAX) return SCPE_IERR; } /* too many? */
|
||||
} /* end if enabled */
|
||||
} /* end for */
|
||||
for (i = 0; (dibp = std_dib[i]) != NULL; i++) { /* loop thru std */
|
||||
dib_tab[j++] = dibp; /* add to dib_tab */
|
||||
if (j >= DIB_MAX) return SCPE_IERR; } /* too many? */
|
||||
if (ubm) { /* Unibus map? */
|
||||
dib_tab[j++] = &ubm_dib; /* add to dib_tab */
|
||||
if (j >= DIB_MAX) return SCPE_IERR; } /* too many? */
|
||||
dib_tab[j] = NULL; /* end with NULL */
|
||||
for (i = 0; i < 7; i++) /* add PIRQ intr */
|
||||
build_int_vec (pirq_vloc[i], VEC_PIRQ, NULL);
|
||||
for (i = 0; (dibp = dib_tab[i]) != NULL; i++) { /* test built dib_tab */
|
||||
if (dev_conflict (dibp)) {
|
||||
return SCPE_STOP; } } /* for conflicts */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Show dib_tab */
|
||||
|
||||
t_stat show_iospace (FILE *st, UNIT *uptr, int32 val, void *desc)
|
||||
{
|
||||
int32 i, j, done = 0;
|
||||
DEVICE *dptr;
|
||||
DIB *dibt;
|
||||
|
||||
build_dib_tab (cpu_ubm); /* build table */
|
||||
while (done == 0) { /* sort ascending */
|
||||
done = 1; /* assume done */
|
||||
for (i = 0; dib_tab[i + 1] != NULL; i++) { /* check table */
|
||||
if (dib_tab[i]->ba > dib_tab[i + 1]->ba) { /* out of order? */
|
||||
dibt = dib_tab[i]; /* interchange */
|
||||
dib_tab[i] = dib_tab[i + 1];
|
||||
dib_tab[i + 1] = dibt;
|
||||
done = 0; } } /* not done */
|
||||
} /* end while */
|
||||
for (i = 0; dib_tab[i] != NULL; i++) { /* print table */
|
||||
for (j = 0, dptr = NULL; sim_devices[j] != NULL; j++) {
|
||||
if (((DIB*) sim_devices[j]->ctxt) == dib_tab[i]) {
|
||||
dptr = sim_devices[j];
|
||||
break; } }
|
||||
fprintf (st, "%08o - %08o%c\t%s\n", dib_tab[i]->ba,
|
||||
dib_tab[i]->ba + dib_tab[i]->lnt - 1,
|
||||
(dptr && (dptr->flags & DEV_FLTA))? '*': ' ',
|
||||
dptr? dptr->name: "CPU");
|
||||
}
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Autoconfiguration */
|
||||
|
||||
#define AUTO_DYN 0001
|
||||
#define AUTO_VEC 0002
|
||||
#define AUTO_MAXC 4
|
||||
#define AUTO_CSRBASE 0010
|
||||
#define AUTO_VECBASE 0300
|
||||
|
||||
struct auto_con {
|
||||
uint32 amod;
|
||||
uint32 vmod;
|
||||
uint32 flags;
|
||||
uint32 num;
|
||||
uint32 fix;
|
||||
char *dnam[AUTO_MAXC]; };
|
||||
|
||||
struct auto_con auto_tab[AUTO_LNT + 1] = {
|
||||
{ 0x7, 0x7 }, /* DJ11 */
|
||||
{ 0xf, 0x7 }, /* DH11 */
|
||||
{ 0x7, 0x7 }, /* DQ11 */
|
||||
{ 0x7, 0x7 }, /* DU11 */
|
||||
{ 0x7, 0x7 }, /* DUP11 */
|
||||
{ 0x7, 0x7 }, /* LK11A */
|
||||
{ 0x7, 0x7 }, /* DMC11 */
|
||||
{ 0x7, 0x7, AUTO_VEC, DZ_MUXES, 0, { "DZ" } },
|
||||
|
||||
{ 0x7, 0x7 }, /* KMC11 */
|
||||
{ 0x7, 0x7 }, /* LPP11 */
|
||||
{ 0x7, 0x7 }, /* VMV21 */
|
||||
{ 0xf, 0x7 }, /* VMV31 */
|
||||
{ 0x7, 0x7 }, /* DWR70 */
|
||||
{ 0x7, 0x3, AUTO_DYN|AUTO_VEC, 0, IOBA_RL, { "RL", "RLB" } },
|
||||
{ 0xf, 0x7 }, /* LPA11K */
|
||||
{ 0x7, 0x7 }, /* KW11C */
|
||||
|
||||
{ 0x7, 0 }, /* reserved */
|
||||
{ 0x7, 0x3, AUTO_DYN|AUTO_VEC, 0, IOBA_RX, { "RX", "RY" } },
|
||||
{ 0x7, 0x3 }, /* DR11W */
|
||||
{ 0x7, 0x3 }, /* DR11B */
|
||||
{ 0x7, 0x7 }, /* DMP11 */
|
||||
{ 0x7, 0x7 }, /* DPV11 */
|
||||
{ 0x7, 0x7 }, /* ISB11 */
|
||||
{ 0xf, 0x7 }, /* DMV11 */
|
||||
|
||||
{ 0x7, 0x3, AUTO_DYN|AUTO_VEC, 0, IOBA_XU, { "XU", "XUB" } },
|
||||
{ 0x3, 0x3, AUTO_DYN|AUTO_VEC, 0, IOBA_RQ, { "RQ", "RQB", "RQC", "RQD" } },
|
||||
{ 0x1f, 0x3 }, /* DMF32 */
|
||||
{ 0xf, 0x7 }, /* KMS11 */
|
||||
{ 0xf, 0x3 }, /* VS100 */
|
||||
{ 0x3, 0x3, AUTO_DYN|AUTO_VEC, 0, IOBA_TQ, { "TQ", "TQB" } },
|
||||
{ 0xf, 0x7 }, /* KMV11 */
|
||||
{ 0xf, 0x7 }, /* DHU11/DHQ11 */
|
||||
|
||||
{ 0x1f, 0x7 }, /* DMZ32 */
|
||||
{ 0x1f, 0x7 }, /* CP132 */
|
||||
{ 0 }, /* padding */
|
||||
};
|
||||
|
||||
t_stat auto_config (uint32 rank, uint32 nctrl)
|
||||
{
|
||||
uint32 csr = IOPAGEBASE + AUTO_CSRBASE;
|
||||
uint32 vec = VEC_Q + AUTO_VECBASE;
|
||||
struct auto_con *autp;
|
||||
DEVICE *dptr;
|
||||
DIB *dibp;
|
||||
int32 i, j, k;
|
||||
extern DEVICE *find_dev (char *ptr);
|
||||
|
||||
if (rank > AUTO_LNT) return SCPE_IERR; /* legal rank? */
|
||||
if (rank) auto_tab[rank - 1].num = nctrl; /* update num? */
|
||||
for (i = 0, autp = auto_tab; i < AUTO_LNT; i++) { /* loop thru table */
|
||||
for (j = k = 0; (j < AUTO_MAXC) && autp->dnam[j]; j++) {
|
||||
dptr = find_dev (autp->dnam[j]); /* find ctrl */
|
||||
if ((dptr == NULL) || (dptr->flags & DEV_DIS) ||
|
||||
!(dptr->flags & DEV_FLTA)) continue; /* enabled, floating? */
|
||||
dibp = (DIB *) dptr->ctxt; /* get DIB */
|
||||
if ((k++ == 0) && autp->fix) /* 1st & fixed? */
|
||||
dibp->ba = autp->fix; /* gets fixed CSR */
|
||||
else { /* no, float */
|
||||
dibp->ba = csr; /* set CSR */
|
||||
csr = (csr + autp->amod + 1) & ~autp->amod; /* next CSR */
|
||||
if ((autp->flags & AUTO_DYN) == 0) /* static? */
|
||||
csr = csr + ((autp->num - 1) * (autp->amod + 1));
|
||||
if (autp->flags & AUTO_VEC) { /* vectors too? */
|
||||
dibp->vec = (vec + autp->vmod) & ~autp->vmod;
|
||||
if (autp->flags & AUTO_DYN) vec = vec + autp->vmod + 1;
|
||||
else vec = vec + (autp->num * (autp->vmod + 1)); }
|
||||
} /* end else flt */
|
||||
} /* end for j */
|
||||
autp++;
|
||||
csr = (csr + autp->amod + 1) & ~autp->amod; /* gap */
|
||||
} /* end for i */
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user