diff --git a/PDP11/pdp11_cpu.c b/PDP11/pdp11_cpu.c
index 6ad63be6..bc3d7a85 100644
--- a/PDP11/pdp11_cpu.c
+++ b/PDP11/pdp11_cpu.c
@@ -1,6 +1,6 @@
 /* pdp11_cpu.c: PDP-11 CPU simulator
 
-   Copyright (c) 1993-2013, Robert M Supnik
+   Copyright (c) 1993-2015, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,8 @@
 
    cpu          PDP-11 CPU
 
+   30-Dec-15    RMS     Added NOBEVENT option for 11/03, 11/23
+   29-Dec-15    RMS     Call build_dib_tab during reset (Mark Pizzolato)
    05-Dec-13    RMS     Fixed bug in CSM (John Dundas)
    23-Oct-13    RMS     Fixed PS behavior on initialization and boot
    10-Apr-13    RMS     MMR1 does not track PC changes (Johnny Billquist)
@@ -587,6 +589,8 @@ MTAB cpu_mod[] = {
     { MTAB_XTD|MTAB_VDV, OPT_CIS, NULL, "NOCIS", &cpu_clr_opt },
     { MTAB_XTD|MTAB_VDV, OPT_MMU, NULL, "MMU", &cpu_set_opt },
     { MTAB_XTD|MTAB_VDV, OPT_MMU, NULL, "NOMMU", &cpu_clr_opt },
+    { MTAB_XTD|MTAB_VDV, OPT_BVT, NULL, "BEVENT", &cpu_set_opt },
+    { MTAB_XTD|MTAB_VDV, OPT_BVT, NULL, "NOBEVENT", &cpu_clr_opt },
     { MTAB_XTD|MTAB_VDV, 0, "IDLE", "IDLE", &sim_set_idle, &sim_show_idle },
     { MTAB_XTD|MTAB_VDV, 0, NULL, "NOIDLE", &sim_clr_idle, NULL },
     { UNIT_MSIZE, 16384, NULL, "16K", &cpu_set_size},
@@ -3008,7 +3012,7 @@ if (pcq_r)
 else return SCPE_IERR;
 sim_brk_types = sim_brk_dflt = SWMASK ('E');
 set_r_display (0, MD_KER);
-return SCPE_OK;
+return build_dib_tab ();
 }
 
 /* Boot setup routine */
diff --git a/PDP11/pdp11_cpumod.c b/PDP11/pdp11_cpumod.c
index 80263765..854d885f 100644
--- a/PDP11/pdp11_cpumod.c
+++ b/PDP11/pdp11_cpumod.c
@@ -247,7 +247,8 @@ CNFTAB cnf_tab[] = {
 static const char *opt_name[] = {
     "Unibus", "Qbus", "EIS", "NOEIS", "FIS", "NOFIS",
     "FPP", "NOFPP", "CIS", "NOCIS", "MMU", "NOMMU",
-    "RH11", "RH70",     "PARITY", "NOPARITY", "Unibus map", "No map", NULL
+    "RH11", "RH70", "PARITY", "NOPARITY", "Unibus map", "No map",
+    "BEVENT enabled", "BEVENT disabled", NULL
     };
 
 static const char *jcsr_val[4] = {
diff --git a/PDP11/pdp11_cpumod.h b/PDP11/pdp11_cpumod.h
index ba8fb178..e8d8ace2 100644
--- a/PDP11/pdp11_cpumod.h
+++ b/PDP11/pdp11_cpumod.h
@@ -1,6 +1,6 @@
 /* pdp11_cpumod.h: PDP-11 CPU model definitions
 
-   Copyright (c) 2004-2008, Robert M Supnik
+   Copyright (c) 2004-2015, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -23,6 +23,7 @@
    used in advertising or otherwise to promote the sale, use or other dealings
    in this Software without prior written authorization from Robert M Supnik.
 
+   30-Dec-15    RMS     Added 11/03, 11/23 BEVENT disable
    22-Apr-08    RMS     Added 11/70 MBRK register
    30-Aug-05    RMS     Added additional 11/60 registers
 */
@@ -30,8 +31,8 @@
 #ifndef PDP11_CPUMOD_H_
 #define PDP11_CPUMOD_H_        0
 
-#define SOP_1103        (BUS_Q)
-#define OPT_1103        (OPT_EIS|OPT_FIS)
+#define SOP_1103        (BUS_Q|OPT_BVT)
+#define OPT_1103        (OPT_EIS|OPT_FIS|OPT_BVT)
 #define PSW_1103        0000377
 
 #define SOP_1104        (BUS_U)
@@ -46,8 +47,8 @@
 #define OPT_1120        0
 #define PSW_1120        0000377
 
-#define SOP_1123        (BUS_Q|OPT_EIS|OPT_FPP|OPT_MMU)
-#define OPT_1123        (OPT_FPP|OPT_CIS)
+#define SOP_1123        (BUS_Q|OPT_EIS|OPT_FPP|OPT_MMU|OPT_BVT)
+#define OPT_1123        (OPT_FPP|OPT_CIS|OPT_BVT)
 #define PSW_F           0170777
 #define PAR_F           0177777
 #define PDR_F           0077516
diff --git a/PDP11/pdp11_defs.h b/PDP11/pdp11_defs.h
index 2de2c95d..003bbd1f 100644
--- a/PDP11/pdp11_defs.h
+++ b/PDP11/pdp11_defs.h
@@ -1,6 +1,6 @@
 /* pdp11_defs.h: PDP-11 simulator definitions
 
-   Copyright (c) 1993-2013, Robert M Supnik
+   Copyright (c) 1993-2015, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -26,6 +26,7 @@
    The author gratefully acknowledges the help of Max Burnet, Megan Gentry,
    and John Wilson in resolving questions about the PDP-11
 
+   30-Dec-15    RMS     Added NOBVT option
    23-Oct-13    RMS     Added cpu_set_boot prototype
    02-Sep-13    RMS     Added third Massbus adapter and RS drive
    12-Dec-12    RMS     Fixed base address for RQB, RQC, RQD
@@ -174,6 +175,7 @@
 #define OPT_RH11        (1u << 6)                       /* RH11 */
 #define OPT_PAR         (1u << 7)                       /* parity */
 #define OPT_UBM         (1u << 8)                       /* UBM */
+#define OPT_BVT         (1u << 9)                       /* BEVENT */
 
 #define CPUT(x)         ((cpu_type & (x)) != 0)
 #define CPUO(x)         ((cpu_opt & (x)) != 0)
diff --git a/PDP11/pdp11_pt.c b/PDP11/pdp11_pt.c
index 6281bfcc..803c0a45 100644
--- a/PDP11/pdp11_pt.c
+++ b/PDP11/pdp11_pt.c
@@ -99,8 +99,8 @@ REG ptr_reg[] = {
     { DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
     { DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
     { FLDATA (STOP_IOE, ptr_stopioe, 0) },
-    { GRDATA  (DEVADDR,   ptr_dib.ba, DEV_RDX, 32, 0), REG_HRO },
-    { GRDATA  (DEVVEC,   ptr_dib.vec, DEV_RDX, 16, 0), REG_HRO },
+    { GRDATA (DEVADDR, ptr_dib.ba, DEV_RDX, 32, 0), REG_HRO },
+    { GRDATA (DEVVEC, ptr_dib.vec, DEV_RDX, 16, 0), REG_HRO },
     { NULL }
     };
 
diff --git a/PDP11/pdp11_stddev.c b/PDP11/pdp11_stddev.c
index 206b9de6..c9d39acc 100644
--- a/PDP11/pdp11_stddev.c
+++ b/PDP11/pdp11_stddev.c
@@ -1,6 +1,6 @@
 /* pdp11_stddev.c: PDP-11 standard I/O devices simulator
 
-   Copyright (c) 1993-2012, Robert M Supnik
+   Copyright (c) 1993-2015, Robert M Supnik
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
@@ -26,6 +26,7 @@
    tti,tto      DL11 terminal input/output
    clk          KW11L (and other) line frequency clock
 
+   30-Dec-15    RMS     Added NOBEVENT support
    18-Apr-12    RMS     Modified to use clock coscheduling
    20-May-08    RMS     Standardized clock delay at 1mips
    18-Jun-07    RMS     Added UNIT_IDLE flag to console input, clock
@@ -71,7 +72,7 @@
 #define CLK_DELAY       16667
 
 extern int32 int_req[IPL_HLVL];
-extern uint32 cpu_type;
+extern uint32 cpu_type, cpu_opt;
 
 int32 tti_csr = 0;                                      /* control/status */
 int32 tto_csr = 0;                                      /* control/status */
@@ -473,7 +474,10 @@ t_stat clk_reset (DEVICE *dptr)
 {
 if (CPUT (HAS_LTCR))                                    /* reg there? */
     clk_fie = clk_fnxm = 0;
-else clk_fie = clk_fnxm = 1;                            /* no, BEVENT */
+else {
+    clk_fnxm = 1;                                       /* no LTCR, set nxm */
+    clk_fie = CPUO (OPT_BVT);                           /* ie = 1 unless no BEVENT */
+    }
 clk_tps = clk_default;                                  /* set default tps */
 clk_csr = CSR_DONE;                                     /* set done */
 CLR_INT (CLK);