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TIMER: Add support for catchup clock ticks and cleaned up asynchronous clocks

Asynchronous clocks are now built for all simulators which are built with
SIM_ASYNCH_IO defined.  The default behavior has asynchronous clocks
disabled since this is still experimental, but it can be enabled with
SET TIMER ASYNC.

Catchup clock ticks are now available, but since they're experimental,
they aren't enabled by default.  Catchup ticks are only available if the
simulators clock device calls sim_rtcn_tick_ack to acknowledge processing
of clock ticks.  The VAX simulators have been modified to leverage this.
Catchup clock ticks can be enabled with SET TIMER CATCHUP

Additionally, an idle threshold is provided which can be used to
influence when clock calibration may be suppressed.  The default is not
to suppress calibration activities.

The various timer behaviors are visible with the SHOW TIMER command.

The state of the operating timer facilities is visible with: SHOW CLOCK

Timer events which are queued are visible with the SHOW QUEUE command.
This commit is contained in:
Mark Pizzolato
2016-11-16 23:50:53 -08:00
parent 32bf2629b1
commit 39d2944ede
19 changed files with 1049 additions and 679 deletions

View File

@@ -121,6 +121,20 @@ Host platforms which have libSDL available can leverage this functionality.
Asynchronous support exists for console I/O and most multiplexer
devices. (Still experimental - not currently by default)
#### Clock/Timer Enhancements
* Asynchronhous clocks ticks exist to better support modern processors
that have variable clock speeds. The initial clock calibration model
presumed a constant simulated instruction execution rate.
Modern processors have variable processor speeds which breaks this
key assumption.
* Strategies to make up for missed clock ticks are now available
(independent of asynchronous tick generation). These strategies
generate catch-up clock ticks to keep the simulator passage of
time consistent with wall clock time. Simulator time while idling
or throttling is now consistent. Reasonable idling behavior is
now possible without requiring that the host system clock tick be
10ms or less.
#### Ethernet Transport Enhancements
* UDP packet transport. Direct simulator connections to HECnet can be
made without running a local packet bridge program.