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simh 3.10-RC1a

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3.10 is mostly an attempt to get aligned with the current head of the
GitHub 4.0 sources. While the core libraries and SCP have diverged too
far for real forward and backward compatibility, enough 4.0 workalikes
have been added to allow much closer convergence of the two streams.

3.10 will provide the basis for my future simulation work.
This commit is contained in:
Bob Supnik
2018-06-04 07:59:42 -07:00
committed by Mark Pizzolato
parent 140ab5b350
commit 3fada8da5a
75 changed files with 5555 additions and 24986 deletions
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906
H316/h316_stddev_old.c
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@@ -1,906 +0,0 @@
/* h316_stddev.c: Honeywell 316/516 standard devices
Copyright (c) 1999-2008, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name of Robert M Supnik shall not be
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik.
ptr 316/516-50 paper tape reader
ptp 316/516-52 paper tape punch
tty 316/516-33 teleprinter
clk/options 316/516-12 real time clocks/internal options
09-Jun-07 RMS Fixed bug in clock increment (Theo Engel)
30-Sep-06 RMS Fixed handling of non-printable characters in KSR mode
03-Apr-06 RMS Fixed bugs in punch state handling (Theo Engel)
22-Nov-05 RMS Revised for new terminal processing routines
05-Feb-05 RMS Fixed bug in OCP '0001 (Philipp Hachtmann)
31-Jan-05 RMS Fixed bug in TTY print (Philipp Hachtmann)
01-Dec-04 RMS Fixed problem in SKS '104 (Philipp Hachtmann)
Fixed bug in SKS '504
Added PTR detach routine, stops motion
Added PTR/PTP ASCII file support
Added TTR/TTP support
24-Oct-03 RMS Added DMA/DMC support
25-Apr-03 RMS Revised for extended file support
01-Mar-03 RMS Added SET/SHOW CLK FREQ support
22-Dec-02 RMS Added break support
01-Nov-02 RMS Added 7b/8b support to terminal
30-May-02 RMS Widened POS to 32b
03-Nov-01 RMS Implemented upper case for console output
29-Nov-01 RMS Added read only unit support
07-Sep-01 RMS Moved function prototypes
The ASR-33/35 reader/punch logic, and the ASCII file support for all paper tape
devices, logic is taken, with grateful thanks, from Adrian Wise's H316 emulator.
Teletype reader transitions:
- SET TTY2 START puts the reader in RUN
- XOFF from keyboard/reader stops the reader after 1-2 more characters are read
- XON from program starts the reader
- Detach, SET TTY2 STOP, or end of file stops the reader
Teletype punch transitions:
- SET TTY3 START puts the punch in RUN
- XOFF from program stops the punch after 1 more character is punched
- TAPE from program starts the punch after 1 character delay
- Detach or SET TTY3 STOP stops the punch
*/
#include "h316_defs.h"
#include <ctype.h>
#define UNIT_V_ASC (TTUF_V_UF + 0) /* ASCII */
#define UNIT_V_UASC (TTUF_V_UF + 1) /* Unix ASCII */
#define UNIT_ASC (1 << UNIT_V_ASC)
#define UNIT_UASC (1 << UNIT_V_UASC)
#define STA u3 /* state bits */
#define LF_PEND 01 /* lf pending */
#define RUNNING 02 /* tape running */
#define XON 0021
#define TAPE 0022
#define XOFF 0023
#define RUBOUT 0377
extern uint16 M[];
extern int32 PC;
extern int32 stop_inst;
extern int32 C, dp, ext, extoff_pending, sc;
extern int32 dev_int, dev_enb;
extern int32 sim_switches;
extern UNIT cpu_unit;
uint32 ptr_motion = 0; /* read motion */
uint32 ptr_stopioe = 0; /* stop on error */
uint32 ptp_stopioe = 0;
uint32 ptp_power = 0; /* punch power, time */
int32 ptp_ptime;
uint32 ttr_stopioe = 0;
uint32 tty_mode = 0; /* input (0), output (1) */
uint32 tty_buf = 0; /* tty buffer */
uint32 ttr_xoff_read = 0;
uint32 ttp_tape_rcvd = 0;
uint32 ttp_xoff_rcvd = 0;
int32 clk_tps = 60; /* ticks per second */
int32 ptrio (int32 inst, int32 fnc, int32 dat, int32 dev);
t_stat ptr_svc (UNIT *uptr);
t_stat ptr_reset (DEVICE *dptr);
t_stat ptr_boot (int32 unitno, DEVICE *dptr);
int32 ptpio (int32 inst, int32 fnc, int32 dat, int32 dev);
t_stat ptp_svc (UNIT *uptr);
t_stat ptp_reset (DEVICE *dptr);
int32 ttyio (int32 inst, int32 fnc, int32 dat, int32 dev);
t_stat tti_svc (UNIT *uptr);
t_stat tto_svc (UNIT *uptr);
t_stat tty_reset (DEVICE *dptr);
t_stat ttio_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat ttrp_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat ttrp_set_start_stop (UNIT *uptr, int32 val, char *cptr, void *desc);
int32 clkio (int32 inst, int32 fnc, int32 dat, int32 dev);
t_stat clk_svc (UNIT *uptr);
t_stat clk_reset (DEVICE *dptr);
t_stat clk_set_freq (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat clk_show_freq (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat pt_attach (UNIT *uptr, char *cptr);
t_stat pt_detach (UNIT *uptr);
t_stat tto_write (int32 c);
t_stat ttp_write (int32 c);
/* PTR data structures
ptr_dev PTR device descriptor
ptr_unit PTR unit descriptor
ptr_mod PTR modifiers
ptr_reg PTR register list
*/
DIB ptr_dib = { PTR, IOBUS, 1, &ptrio };
UNIT ptr_unit = {
UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE, 0),
SERIAL_IN_WAIT
};
REG ptr_reg[] = {
{ ORDATA (BUF, ptr_unit.buf, 8) },
{ FLDATA (READY, dev_int, INT_V_PTR) },
{ FLDATA (ENABLE, dev_enb, INT_V_PTR) },
{ FLDATA (MOTION, ptr_motion, 0) },
{ DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
{ ORDATA (RSTATE, ptr_unit.STA, 2), REG_HIDDEN },
{ FLDATA (STOP_IOE, ptr_stopioe, 0) },
{ NULL }
};
MTAB pt_mod[] = {
{ UNIT_ATT+UNIT_ASC+UNIT_UASC, UNIT_ATT+UNIT_ASC, "ASCII", NULL },
{ UNIT_ATT+UNIT_ASC+UNIT_UASC, UNIT_ATT+UNIT_ASC+UNIT_UASC, "Unix ASCII", NULL },
{ 0 }
};
DEVICE ptr_dev = {
"PTR", &ptr_unit, ptr_reg, pt_mod,
1, 10, 31, 1, 8, 8,
NULL, NULL, &ptr_reset,
&ptr_boot, &pt_attach, &pt_detach,
&ptr_dib, 0
};
/* PTP data structures
ptp_dev PTP device descriptor
ptp_unit PTP unit descriptor
ptp_mod PTP modifiers
ptp_reg PTP register list
*/
DIB ptp_dib = { PTP, IOBUS, 1, &ptpio };
UNIT ptp_unit = {
UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE, 0), SERIAL_OUT_WAIT
};
REG ptp_reg[] = {
{ ORDATA (BUF, ptp_unit.buf, 8) },
{ FLDATA (READY, dev_int, INT_V_PTP) },
{ FLDATA (ENABLE, dev_enb, INT_V_PTP) },
{ FLDATA (POWER, ptp_power, 0) },
{ DRDATA (POS, ptp_unit.pos, T_ADDR_W), PV_LEFT },
{ ORDATA (PSTATE, ptp_unit.STA, 2), REG_HIDDEN },
{ DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT },
{ DRDATA (PWRTIME, ptp_ptime, 24), PV_LEFT },
{ FLDATA (STOP_IOE, ptp_stopioe, 0) },
{ NULL }
};
DEVICE ptp_dev = {
"PTP", &ptp_unit, ptp_reg, pt_mod,
1, 10, 31, 1, 8, 8,
NULL, NULL, &ptp_reset,
NULL, &pt_attach, NULL,
&ptp_dib, 0
};
/* TTY data structures
tty_dev TTY device descriptor
tty_unit TTY unit descriptor
tty_reg TTY register list
tty_mod TTy modifiers list
*/
#define TTI 0
#define TTO 1
#define TTR 2
#define TTP 3
DIB tty_dib = { TTY, IOBUS, 1, &ttyio };
UNIT tty_unit[] = {
{ UDATA (&tti_svc, TT_MODE_KSR, 0), KBD_POLL_WAIT },
{ UDATA (&tto_svc, TT_MODE_KSR, 0), SERIAL_OUT_WAIT },
{ UDATA (NULL, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE, 0) },
{ UDATA (NULL, UNIT_SEQ+UNIT_ATTABLE, 0) }
};
REG tty_reg[] = {
{ ORDATA (BUF, tty_buf, 8) },
{ FLDATA (MODE, tty_mode, 0) },
{ FLDATA (READY, dev_int, INT_V_TTY) },
{ FLDATA (ENABLE, dev_enb, INT_V_TTY) },
{ DRDATA (KPOS, tty_unit[TTI].pos, T_ADDR_W), PV_LEFT },
{ DRDATA (KTIME, tty_unit[TTI].wait, 24), REG_NZ + PV_LEFT },
{ DRDATA (TPOS, tty_unit[TTO].pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TTIME, tty_unit[TTO].wait, 24), REG_NZ + PV_LEFT },
{ ORDATA (RXOFF, ttr_xoff_read, 2), REG_HIDDEN },
{ ORDATA (RSTATE, tty_unit[TTR].STA, 2), REG_HIDDEN },
{ DRDATA (RPOS, tty_unit[TTR].pos, T_ADDR_W), PV_LEFT },
{ ORDATA (PTAPE, ttp_tape_rcvd, 2), REG_HIDDEN },
{ ORDATA (PXOFF, ttp_xoff_rcvd, 2), REG_HIDDEN },
{ ORDATA (PSTATE, tty_unit[TTP].STA, 2), REG_HIDDEN },
{ DRDATA (PPOS, tty_unit[TTP].pos, T_ADDR_W), PV_LEFT },
{ FLDATA (STOP_IOE, ttr_stopioe, 0) },
{ NULL }
};
MTAB tty_mod[] = {
{ TT_MODE, TT_MODE_KSR, "KSR", "KSR", &ttio_set_mode },
{ TT_MODE, TT_MODE_7B, "7b", "7B", &ttio_set_mode },
{ TT_MODE, TT_MODE_8B, "8b", "8B", &ttio_set_mode },
{ TT_MODE, TT_MODE_7P, "7p", "7P", &ttio_set_mode },
{ UNIT_ATTABLE+UNIT_ASC+UNIT_UASC, UNIT_ATTABLE, NULL, "BINARY",
&ttrp_set_mode },
{ UNIT_ATTABLE+UNIT_ASC+UNIT_UASC, UNIT_ATTABLE+UNIT_ASC, "ASCII", "ASCII",
&ttrp_set_mode },
{ UNIT_ATTABLE+UNIT_ASC+UNIT_UASC, UNIT_ATTABLE+UNIT_ASC+UNIT_UASC, "Unix ASCII", "UASCII",
&ttrp_set_mode },
{ MTAB_XTD|MTAB_VUN|MTAB_NMO, 1, NULL, "START", &ttrp_set_start_stop },
{ MTAB_XTD|MTAB_VUN|MTAB_NMO, 0, NULL, "STOP", &ttrp_set_start_stop },
{ 0 }
};
DEVICE tty_dev = {
"TTY", tty_unit, tty_reg, tty_mod,
4, 10, 31, 1, 8, 8,
NULL, NULL, &tty_reset,
NULL, &pt_attach, &pt_detach,
&tty_dib, 0
};
/* CLK data structures
clk_dev CLK device descriptor
clk_unit CLK unit descriptor
clk_mod CLK modifiers
clk_reg CLK register list
*/
DIB clk_dib = { CLK_KEYS, IOBUS, 1, &clkio };
UNIT clk_unit = { UDATA (&clk_svc, 0, 0), 16000 };
REG clk_reg[] = {
{ FLDATA (READY, dev_int, INT_V_CLK) },
{ FLDATA (ENABLE, dev_enb, INT_V_CLK) },
{ DRDATA (TIME, clk_unit.wait, 24), REG_NZ + PV_LEFT },
{ DRDATA (TPS, clk_tps, 8), PV_LEFT + REG_HRO },
{ NULL }
};
MTAB clk_mod[] = {
{ MTAB_XTD|MTAB_VDV, 50, NULL, "50HZ",
&clk_set_freq, NULL, NULL },
{ MTAB_XTD|MTAB_VDV, 60, NULL, "60HZ",
&clk_set_freq, NULL, NULL },
{ MTAB_XTD|MTAB_VDV, 0, "FREQUENCY", NULL,
NULL, &clk_show_freq, NULL },
{ 0 }
};
DEVICE clk_dev = {
"CLK", &clk_unit, clk_reg, clk_mod,
1, 0, 0, 0, 0, 0,
NULL, NULL, &clk_reset,
NULL, NULL, NULL,
&clk_dib, 0
};
/* Paper tape reader: IO routine */
int32 ptrio (int32 inst, int32 fnc, int32 dat, int32 dev)
{
switch (inst) { /* case on opcode */
case ioOCP: /* OCP */
if (fnc & 016) /* only fnc 0,1 */
return IOBADFNC (dat);
ptr_motion = fnc ^ 1;
if (fnc) /* fnc 1? stop */
sim_cancel (&ptr_unit);
else sim_activate (&ptr_unit, ptr_unit.wait); /* fnc 0? start */
break;
case ioSKS: /* SKS */
if (fnc & 013) /* only fnc 0,4 */
return IOBADFNC (dat);
if (((fnc == 000) && TST_INT (INT_PTR)) || /* fnc 0? skip rdy */
((fnc == 004) && !TST_INTREQ (INT_PTR))) /* fnc 4? skip !int */
return IOSKIP (dat);
break;
case ioINA: /* INA */
if (fnc) /* only fnc 0 */
return IOBADFNC (dat);
if (TST_INT (INT_PTR)) { /* ready? */
CLR_INT (INT_PTR); /* clear ready */
if (ptr_motion) /* if motion, restart */
sim_activate (&ptr_unit, ptr_unit.wait);
return IOSKIP (ptr_unit.buf | dat); /* ret buf, skip */
}
break;
} /* end case op */
return dat;
}
/* Unit service */
t_stat ptr_svc (UNIT *uptr)
{
int32 c;
if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
return IORETURN (ptr_stopioe, SCPE_UNATT);
if (uptr->STA & LF_PEND) { /* lf pending? */
uptr->STA &= ~LF_PEND; /* clear flag */
c = 0212; /* insert LF */
}
else {
if ((c = getc (uptr->fileref)) == EOF) { /* read byte */
if (feof (uptr->fileref)) {
if (ptr_stopioe)
printf ("PTR end of file\n");
else return SCPE_OK;
}
else perror ("PTR I/O error");
clearerr (uptr->fileref);
return SCPE_IOERR;
}
if ((uptr->flags & UNIT_UASC) && (c == '\n')) { /* Unix newline? */
c = 0215; /* insert CR */
uptr->STA |= LF_PEND; /* lf pending */
}
else if ((uptr->flags & UNIT_ASC) && (c != 0)) /* ASCII? */
c = c | 0200;
uptr->pos = ftell (uptr->fileref); /* update pos */
}
SET_INT (INT_PTR); /* set ready flag */
uptr->buf = c & 0377; /* get byte */
return SCPE_OK;
}
/* Paper tape attach routine - set or clear ASC/UASC flags if specified */
t_stat pt_attach (UNIT *uptr, char *cptr)
{
t_stat r;
if (!(uptr->flags & UNIT_ATTABLE))
return SCPE_NOFNC;
if (r = attach_unit (uptr, cptr))
return r;
if (sim_switches & SWMASK ('A')) /* -a? ASCII */
uptr->flags |= UNIT_ASC;
else if (sim_switches & SWMASK ('U')) /* -u? Unix ASCII */
uptr->flags |= (UNIT_ASC|UNIT_UASC);
else if (sim_switches & SWMASK ('B')) /* -b? binary */
uptr->flags &= ~(UNIT_ASC|UNIT_UASC);
uptr->STA = 0;
return r;
}
/* Detach routine - stop motion if not restore */
t_stat pt_detach (UNIT *uptr)
{
if (!(sim_switches & SIM_SW_REST)) sim_cancel (uptr); /* stop motion */
uptr->STA = 0;
return detach_unit (uptr);
}
/* Reset routine */
t_stat ptr_reset (DEVICE *dptr)
{
CLR_INT (INT_PTR); /* clear ready, enb */
CLR_ENB (INT_PTR);
ptr_unit.buf = 0; /* clear buffer */
ptr_unit.STA = 0;
ptr_motion = 0; /* unit stopped */
sim_cancel (&ptr_unit); /* deactivate unit */
return SCPE_OK;
}
/* Paper tape reader bootstrap routine */
#define PBOOT_START 1
#define PBOOT_SIZE (sizeof (pboot) / sizeof (int32))
static const int32 pboot[] = {
0010057, /* STA 57 */
0030001, /* OCP 1 */
0131001, /* READ, INA 1001 */
0002003, /* JMP READ */
0101040, /* SNZ */
0002003, /* JMP READ */
0010000, /* STA 0 */
0131001, /* READ1, INA 1001 */
0002010, /* JMP READ1 */
0041470, /* LGL 8 */
0130001, /* READ2, INA 1 */
0002013, /* JMP READ2 */
0110000, /* STA* 0 */
0024000, /* IRS 0 */
0100040 /* SZE */
};
t_stat ptr_boot (int32 unitno, DEVICE *dptr)
{
int32 i;
for (i = 0; i < PBOOT_SIZE; i++) /* copy bootstrap */
M[PBOOT_START + i] = pboot[i];
PC = PBOOT_START;
return SCPE_OK;
}
/* Paper tape punch: IO routine */
int32 ptpio (int32 inst, int32 fnc, int32 dat, int32 dev)
{
switch (inst) { /* case on opcode */
case ioOCP: /* OCP */
if (fnc & 016) /* only fnc 0,1 */
return IOBADFNC (dat);
if (fnc) { /* fnc 1? pwr off */
CLR_INT (INT_PTP); /* not ready */
ptp_power = 0; /* turn off power */
sim_cancel (&ptp_unit); /* stop punch */
}
else if (ptp_power == 0) /* fnc 0? start */
sim_activate (&ptp_unit, ptp_ptime);
break;
case ioSKS: /* SKS */
if ((fnc & 012) || (fnc == 005)) /* only 0, 1, 4 */
return IOBADFNC (dat);
if (((fnc == 000) && TST_INT (INT_PTP)) || /* fnc 0? skip rdy */
((fnc == 001) && /* fnc 1? skip ptp on */
(ptp_power || sim_is_active (&ptp_unit))) ||
((fnc == 004) && !TST_INTREQ (INT_PTP))) /* fnc 4? skip !int */
return IOSKIP (dat);
break;
case ioOTA: /* OTA */
if (fnc) /* only fnc 0 */
return IOBADFNC (dat);
if (TST_INT (INT_PTP)) { /* if ptp ready */
CLR_INT (INT_PTP); /* clear ready */
ptp_unit.buf = dat & 0377; /* store byte */
sim_activate (&ptp_unit, ptp_unit.wait);
return IOSKIP (dat); /* skip return */
}
break;
}
return dat;
}
/* Unit service */
t_stat ptp_svc (UNIT *uptr)
{
int32 c;
SET_INT (INT_PTP); /* set flag */
if (ptp_power == 0) { /* power on? */
ptp_power = 1; /* ptp is ready */
return SCPE_OK;
}
if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
return IORETURN (ptp_stopioe, SCPE_UNATT);
if (uptr->flags & UNIT_ASC) { /* ASCII? */
c = uptr->buf & 0177; /* mask to 7b */
if ((uptr->flags & UNIT_UASC) && (c == 015)) /* cr? drop if Unix */
return SCPE_OK;
else if (c == 012) /* lf? cvt to nl */
c = '\n';
}
else c = uptr->buf & 0377; /* no, binary */
if (putc (c, uptr->fileref) == EOF) { /* output byte */
perror ("PTP I/O error");
clearerr (uptr->fileref);
return SCPE_IOERR;
}
uptr->pos = ftell (uptr->fileref); /* update pos */
return SCPE_OK;
}
/* Reset routine */
t_stat ptp_reset (DEVICE *dptr)
{
CLR_INT (INT_PTP); /* clear ready, enb */
CLR_ENB (INT_PTP);
ptp_power = 0; /* power off */
ptp_unit.buf = 0; /* clear buffer */
ptp_unit.STA = 0;
sim_cancel (&ptp_unit); /* deactivate unit */
return SCPE_OK;
}
/* Terminal: IO routine */
int32 ttyio (int32 inst, int32 fnc, int32 dat, int32 dev)
{
switch (inst) { /* case on opcode */
case ioOCP: /* OCP */
if (fnc & 016) /* only fnc 0,1 */
return IOBADFNC (dat);
if (fnc && (tty_mode == 0)) { /* input to output? */
if (!sim_is_active (&tty_unit[TTO])) /* set ready */
SET_INT (INT_TTY);
tty_mode = 1; /* mode is output */
}
else if ((fnc == 0) && tty_mode) { /* output to input? */
CLR_INT (INT_TTY); /* clear ready */
tty_mode = 0; /* mode is input */
}
break;
case ioSKS: /* SKS */
if (fnc & 012) /* fnc 0,1,4,5 */
return IOBADFNC (dat);
if (((fnc == 000) && TST_INT (INT_TTY)) || /* fnc 0? skip rdy */
((fnc == 001) && /* fnc 1? skip !busy */
(!tty_mode || !sim_is_active (&tty_unit[TTO]))) ||
((fnc == 004) && !TST_INTREQ (INT_TTY)) || /* fnc 4? skip !int */
((fnc == 005) && (tty_mode || /* fnc 5? skip !xoff */
((tty_buf & 0177) != XOFF)))) /* input & XOFF char */
return IOSKIP (dat);
break;
case ioINA: /* INA */
if (fnc & 005) /* only 0,2 */
return IOBADFNC (dat);
if (TST_INT (INT_TTY)) { /* ready? */
if (tty_mode == 0) /* inp? clear rdy */
CLR_INT (INT_TTY);
return IOSKIP (dat |
(tty_buf & ((fnc & 002)? 077: 0377)));
}
break;
case ioOTA:
if (fnc & 015) /* only 0,2 */
return IOBADFNC (dat);
if (TST_INT (INT_TTY)) { /* ready? */
tty_buf = dat & 0377; /* store char */
if (fnc & 002) { /* binary mode? */
tty_buf = tty_buf | 0100; /* set ch 7 */
if (tty_buf & 040)
tty_buf = tty_buf & 0277;
}
if (tty_mode) {
sim_activate (&tty_unit[TTO], tty_unit[TTO].wait);
CLR_INT (INT_TTY);
}
return IOSKIP (dat);
}
break;
} /* end case op */
return dat;
}
/* Input service - keyboard and reader */
t_stat tti_svc (UNIT *uptr)
{
int32 out, c;
UNIT *ruptr = &tty_unit[TTR];
sim_activate (uptr, uptr->wait); /* continue poll */
if ((c = sim_poll_kbd ()) >= SCPE_KFLAG) { /* character? */
out = c & 0177; /* mask echo to 7b */
if (c & SCPE_BREAK) /* break? */
c = 0;
else c = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags) | TTUF_KSR);
uptr->pos = uptr->pos + 1;
}
else if (c != SCPE_OK) /* error? */
return c;
else if ((ruptr->flags & UNIT_ATT) && /* TTR attached */
(ruptr->STA & RUNNING)) { /* and running? */
if (ruptr->STA & LF_PEND) { /* lf pending? */
c = 0212; /* char is lf */
ruptr->STA &= ~LF_PEND; /* clear flag */
}
else { /* normal read */
if ((c = getc (ruptr->fileref)) == EOF) { /* read byte */
if (feof (ruptr->fileref)) { /* EOF? */
ruptr->STA &= ~RUNNING; /* stop reader */
if (ttr_stopioe)
printf ("TTR end of file\n");
else return SCPE_OK;
}
else perror ("TTR I/O error");
clearerr (ruptr->fileref);
return SCPE_IOERR;
}
if ((ruptr->flags & UNIT_UASC) && (c == '\n')) {
c = 0215; /* Unix ASCII NL? */
ruptr->STA |= LF_PEND; /* LF pending */
}
else if ((ruptr->flags & UNIT_ASC) && (c != 0))
c = c | 0200; /* ASCII nz? cvt */
ruptr->pos = ftell (ruptr->fileref);
}
if (ttr_xoff_read != 0) { /* reader stopping? */
if (c == RUBOUT) /* rubout? stop */
ttr_xoff_read = 0;
else ttr_xoff_read--; /* else decr state */
if (ttr_xoff_read == 0) /* delay done? */
ruptr->STA &= ~RUNNING; /* stop reader */
}
else if ((c & 0177) == XOFF) /* XOFF read? */
ttr_xoff_read = 2;
out = c; /* echo char */
}
else return SCPE_OK; /* no char */
if (tty_mode == 0) { /* input mode? */
tty_buf = c & 0377; /* put char in buf */
SET_INT (INT_TTY); /* set flag */
}
tto_write (out); /* echo to printer */
return ttp_write (out); /* and punch */
}
/* Output service - printer and punch */
t_stat tto_svc (UNIT *uptr)
{
uint32 c7b;
UNIT *ruptr = &tty_unit[TTR];
UNIT *puptr = &tty_unit[TTP];
t_stat r;
c7b = tty_buf & 0177;
if (ttp_tape_rcvd != 0) { /* prev = tape? */
ttp_tape_rcvd--; /* decrement state */
if ((ttp_tape_rcvd == 0) && (puptr->flags & UNIT_ATT))
puptr->STA |= RUNNING; /* start after delay */
}
else if (c7b == TAPE) /* char = TAPE? */
ttp_tape_rcvd = 2;
if (ttp_xoff_rcvd != 0) { /* prev = XOFF? */
ttp_xoff_rcvd--; /* decrement state */
if (ttp_xoff_rcvd == 0) /* stop after delay */
puptr->STA &= ~RUNNING;
}
else if (c7b == XOFF) /* char = XOFF? */
ttp_xoff_rcvd = 2;
if ((c7b == XON) && (ruptr->flags & UNIT_ATT)) { /* char = XON? */
ruptr->STA |= RUNNING; /* start reader */
ttr_xoff_read = 0; /* cancel stop */
}
if ((r = tto_write (tty_buf)) != SCPE_OK) { /* print; error? */
sim_activate (uptr, uptr->wait); /* try again */
return ((r == SCPE_STALL)? SCPE_OK: r); /* !stall? report */
}
if ((r = ttp_write (tty_buf)) != SCPE_OK) /* punch; error? */
return r;
SET_INT (INT_TTY); /* set done flag */
return SCPE_OK;
}
/* Output to printer */
t_stat tto_write (int32 c)
{
UNIT *tuptr = &tty_unit[TTO];
c = sim_tt_outcvt (c, TT_GET_MODE (tuptr->flags) | TTUF_KSR);
tuptr->pos = tuptr->pos + 1;
if (c >= 0)
return sim_putchar_s (c);
else return SCPE_OK;
}
/* Output to punch */
t_stat ttp_write (int32 c)
{
uint32 p, c7b;
UNIT *puptr = &tty_unit[TTP];
if ((puptr->flags & UNIT_ATT) && /* TTP attached */
(puptr->STA & RUNNING)) { /* and running? */
c7b = c & 0177;
if (!(puptr->flags & UNIT_UASC) || (c7b != 015)) {
if (puptr->flags & UNIT_ASC) { /* ASCII? */
if (c7b == 012) p = '\n'; /* cvt LF */
else p = c7b; /* else 7b */
}
else p = c; /* untouched */
if (putc (p, puptr->fileref) == EOF) { /* output byte */
perror ("TTP I/O error");
clearerr (puptr->fileref);
return SCPE_IOERR;
}
puptr->pos = ftell (puptr->fileref); /* update pos */
}
}
return SCPE_OK;
}
/* Reset routine */
t_stat tty_reset (DEVICE *dptr)
{
CLR_INT (INT_TTY); /* clear ready, enb */
CLR_ENB (INT_TTY);
tty_mode = 0; /* mode = input */
tty_buf = 0;
ttr_xoff_read = 0; /* clr TTR, TTP flags */
ttp_tape_rcvd = 0;
ttp_xoff_rcvd = 0;
tty_unit[TTR].STA = 0;
tty_unit[TTP].STA = 0;
sim_activate (&tty_unit[TTI], tty_unit[TTI].wait); /* activate poll */
sim_cancel (&tty_unit[TTO]); /* cancel output */
return SCPE_OK;
}
/* Set keyboard/printer mode - make sure flags agree */
t_stat ttio_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (uptr->flags & UNIT_ATTABLE) /* not TTR, TTP */
return SCPE_NOFNC;
tty_unit[TTO].flags = (tty_unit[TTO].flags & ~TT_MODE) | val;
if (val == TT_MODE_7P)
val = TT_MODE_7B;
tty_unit[TTI].flags = (tty_unit[TTI].flags & ~TT_MODE) | val;
return SCPE_OK;
}
/* Set reader/punch mode */
t_stat ttrp_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (!(uptr->flags & UNIT_ATTABLE)) /* TTR, TTP only */
return SCPE_NOFNC;
if (!(val & UNIT_UASC))
uptr->STA &= ~LF_PEND;
return SCPE_OK;
}
/* Set reader/punch start/stop */
t_stat ttrp_set_start_stop (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (!(uptr->flags & UNIT_ATTABLE)) /* TTR, TTP only */
return SCPE_NOFNC;
if (!(uptr->flags & UNIT_ATT)) /* must be attached */
return SCPE_UNATT;
if (val) /* start? set running */
uptr->STA |= RUNNING;
else uptr->STA &= ~RUNNING; /* stop? clr running */
if (uptr->flags & UNIT_ROABLE) /* TTR? cancel stop */
ttr_xoff_read = 0;
else ttp_tape_rcvd = ttp_xoff_rcvd = 0; /* TTP? cancel all */
return SCPE_OK;
}
/* Clock/options: IO routine */
int32 clkio (int32 inst, int32 fnc, int32 dat, int32 dev)
{
switch (inst) { /* case on opcode */
case ioOCP: /* OCP */
if (fnc & 015) /* only fnc 0,2 */
return IOBADFNC (dat);
CLR_INT (INT_CLK); /* reset ready */
if (fnc) /* fnc = 2? stop */
sim_cancel (&clk_unit);
else { /* fnc = 0? */
if (!sim_is_active (&clk_unit))
sim_activate (&clk_unit, /* activate */
sim_rtc_init (clk_unit.wait)); /* init calibr */
}
break;
case ioSKS: /* SKS */
if (fnc == 000) { /* clock skip !int */
if (!TST_INTREQ (INT_CLK))
return IOSKIP (dat);
}
else if ((fnc & 007) == 002) { /* mem parity? */
if (((fnc == 002) && !TST_INT (INT_MPE)) ||
((fnc == 012) && TST_INT (INT_MPE)))
return IOSKIP (dat);
}
else return IOBADFNC (dat); /* invalid fnc */
break;
case ioOTA: /* OTA */
if (fnc == 000) /* SMK */
dev_enb = dat;
else if (fnc == 010) { /* OTK */
C = (dat >> 15) & 1; /* set C */
if (cpu_unit.flags & UNIT_HSA) /* HSA included? */
dp = (dat >> 14) & 1; /* set dp */
if (cpu_unit.flags & UNIT_EXT) { /* ext opt? */
if (dat & 020000) { /* ext set? */
ext = 1; /* yes, set */
extoff_pending = 0;
}
else extoff_pending = 1; /* no, clr later */
}
sc = dat & 037; /* set sc */
}
else return IOBADFNC (dat);
break;
}
return dat;
}
/* Unit service */
t_stat clk_svc (UNIT *uptr)
{
M[M_CLK] = (M[M_CLK] + 1) & DMASK; /* increment mem ctr */
if (M[M_CLK] == 0) /* = 0? set flag */
SET_INT (INT_CLK);
sim_activate (&clk_unit, sim_rtc_calb (clk_tps)); /* reactivate */
return SCPE_OK;
}
/* Reset routine */
t_stat clk_reset (DEVICE *dptr)
{
CLR_INT (INT_CLK); /* clear ready, enb */
CLR_ENB (INT_CLK);
sim_cancel (&clk_unit); /* deactivate unit */
return SCPE_OK;
}
/* Set frequency */
t_stat clk_set_freq (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (cptr)
return SCPE_ARG;
if ((val != 50) && (val != 60))
return SCPE_IERR;
clk_tps = val;
return SCPE_OK;
}
/* Show frequency */
t_stat clk_show_freq (FILE *st, UNIT *uptr, int32 val, void *desc)
{
fprintf (st, (clk_tps == 50)? "50Hz": "60Hz");
return SCPE_OK;
}

13422
H316/tests/c-listing-ps.txt
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19
H316/tests/imp2.cmd
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@@ -1,19 +0,0 @@
;; *** IMP NODE #2 SETUP ***
; IMP #2 connects to IMP #2 via modem line 1 on both ends ...
; Set the simulator configuration ...
echo Creating standard configuration for IMP #2 ...
do impconfig.cmd
SET IMP NUM=2
; Load the IMP code ...
echo Loading IMP code ...
do impcode.cmd
; Start up the modem links!
echo Attaching modem links ...
ATTACH MI1 4421::4431
; And we're done ..
echo Type GO to start ...

22
H316/tests/imp3.cmd
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@@ -1,22 +0,0 @@
;; *** IMP NODE #3 SETUP ***
; IMP #3 connects to IMP #2 and #4 both. Modem line 1 on this end connects
; to line 1 on the IMP 2 end, and line 2 on this end connects to IMP 3 line 1.
; Set the simulator configuration ...
echo Creating standard configuration for IMP #3 ...
do impconfig.cmd
SET IMP NUM=3
; Load the IMP code ...
echo Loading IMP code ...
do impcode.cmd
; Start up the modem links!
echo Attaching modem links ...
SET MI2 ENABLED
ATTACH MI1 4431::4421
ATTACH MI2 4432::4441
; And we're done ..
echo Type GO to start ...

20
H316/tests/imp4.cmd
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@@ -1,20 +0,0 @@
;; *** IMP NODE #4 SETUP ***
; IMP #4 coneects to IMP #3 via modem line 1 on this end and modem line
; 2 on the IMP 3 end ...
; Set the simulator configuration ...
echo Creating standard configuration for IMP #4 ...
do impconfig.cmd
SET IMP NUM=4
; Load the IMP code ...
echo Loading IMP code ...
do impcode.cmd
; Start up the modem links!
echo Attaching modem links ...
ATTACH MI1 4441::4432
; And we're done ..
echo Type GO to start ...

8237
H316/tests/impcode.cmd
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65
H316/tests/impconfig.cmd
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@@ -1,65 +0,0 @@
;; ***** GENERIC IMP CONFIGURATION *****
; This simh command file sets up the H316 simulator configuration for a generic
; IMP node. Note that it doesn't load any IMP code (the caller is expected to
; do that) and it doesn't define any IMP node specific settings (e.g. modem
; links, IMP address, etc).
;
; RLA [4-Jun-13]
RESET ALL
; Define the CPU configuration ...
; NOTE - real IMPs only had 16K of memory!
SET CPU 16K NOHSA DMA=0 DMC EXTINT=16
; Disable all the devices an IMP doesn't have ...
SET LPT DISABLED
SET MT DISABLED
SET CLK DISABLED
SET FHD DISABLED
SET DP DISABLED
; Enable the IMP device but leave the station address undefined ...
SET IMP ENABLED
;;SET IMP NUM=1
; Enable the RTC to count at 50kHz (20us intervals) ...
SET RTC ENABLED
SET RTC INTERVAL=20
SET RTC QUANTUM=32
; Enable the WDT but don't ever time out (we have enough problems!)...
SET WDT ENABLED
SET WDT DELAY=0
; Enable only modem line 1 and disable all the rest ...
SET MI1 ENABLED
SET MI2 DISABLED
SET MI3 DISABLED
SET MI4 DISABLED
SET MI5 DISABLED
; Enable only one host interface and disable all the rest ...
SET HI1 ENABLED
SET HI2 DISABLED
SET HI3 DISABLED
SET HI4 DISABLED
; Just ignore I/Os to disconnected devices ...
DEPOSIT CPU STOP_DEV 0
; SS4 ON is required to run DDT!
DEPOSIT CPU SS4 1
; Set the TTY speed to realistic values (about 9600BPS in this case) ...
DEPOSIT TTY KTIME 1000
DEPOSIT TTY TTIME 1000
; Don't know for sure what SS2 does, but it appears to have something to do
; with the IMP startup. Leave it ON for now...
DEPOSIT CPU SS2 1
; All done ....
SET CPU HISTORY=65000
SET CONSOLE DEBUG=STDERR
SET WDT DEBUG=LIGHTS

21
H316/tests/implloop4.cmd
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@@ -1,21 +0,0 @@
;; *** IMP LINE FOUR (ONLY!) LOOPBACK TEST ***
; Set the simulator configuration ...
echo IMP line four loopback test...
do impconfig.cmd
SET IMP NUM=2
; Load the IMP code ...
echo Loading IMP code ...
do impcode.cmd
; Start up the modem links!
SET MI1 DISABLED
SET MI2 DISABLED
SET MI3 DISABLED
SET MI4 ENABLED
DEPOSIT MI4 LLOOP 1
SET MI5 DISABLED
; And we're done ..
echo Type GO to start ...

25
H316/tests/imploop.cmd
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@@ -1,25 +0,0 @@
;; *** IMP FIVE MODEM LINE LOOPBACK TEST ***
; Set the simulator configuration ...
echo IMP five modem line interface loopback test...
do impconfig.cmd
SET IMP NUM=2
; Load the IMP code ...
echo Loading IMP code ...
do impcode.cmd
; Start up the modem links!
SET MI1 ENABLED
SET MI1 LOOPINTERFACE
SET MI2 ENABLED
SET MI2 LOOPINTERFACE
SET MI3 ENABLED
SET MI3 LOOPINTERFACE
SET MI4 ENABLED
SET MI4 LOOPINTERFACE
SET MI5 ENABLED
SET MI5 LOOPINTERFACE
; And we're done ..
echo Type GO to start ...

21
H316/tests/imploop4.cmd
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@@ -1,21 +0,0 @@
;; *** IMP LINE FOUR (ONLY!) LOOPBACK TEST ***
; Set the simulator configuration ...
echo IMP line four loopback test...
do impconfig.cmd
SET IMP NUM=2
; Load the IMP code ...
echo Loading IMP code ...
do impcode.cmd
; Start up the modem links!
SET MI1 DISABLED
SET MI2 DISABLED
SET MI3 DISABLED
SET MI4 ENABLED
SET MI4 LOOPINTERFACE
SET MI5 DISABLED
; And we're done ..
echo Type GO to start ...

22
H316/tests/imploop4l.cmd
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@@ -1,22 +0,0 @@
;; *** IMP LINE FOUR (ONLY!) LOOPBACK TEST ***
; Set the simulator configuration ...
echo IMP line four loopback test...
do impconfig.cmd
SET IMP NUM=2
; Load the IMP code ...
echo Loading IMP code ...
do impcode.cmd
; Start up the modem links!
SET MI1 DISABLED
SET MI2 DISABLED
SET MI3 DISABLED
SET MI4 ENABLED
ATTACH MI4 4424:4434
SET MI4 LOOPLINE
SET MI5 DISABLED
; And we're done ..
echo Type GO to start ...

30
H316/tests/imploopl.cmd
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@@ -1,30 +0,0 @@
;; *** IMP FIVE MODEM LINE LOOPBACK TEST ***
; Set the simulator configuration ...
echo IMP five modem line interface loopback test...
do impconfig.cmd
SET IMP NUM=2
; Load the IMP code ...
echo Loading IMP code ...
do impcode.cmd
; Start up the modem links!
SET MI1 ENABLED
ATTACH MI1 4421:4431
SET MI1 LOOPLINE
SET MI2 ENABLED
ATTACH MI2 4422:4432
SET MI2 LOOPLINE
SET MI3 ENABLED
ATTACH MI3 4423:4433
SET MI3 LOOPLINE
SET MI4 ENABLED
ATTACH MI4 4424:4434
SET MI4 LOOPLINE
SET MI5 ENABLED
ATTACH MI5 4425:4435
SET MI5 LOOPLINE
; And we're done ..
echo Type GO to start ...

61
H316/tests/mdmtest1.cmd
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@@ -1,61 +0,0 @@
; TEST1 - send a test modem message
; Set up the configuration ...
RESET ALL
SET CPU 32K NOHSA DMA=0 DMC EXTINT=16
SET LPT DISABLED
SET MT DISABLED
SET CLK DISABLED
SET FHD DISABLED
SET DP DISABLED
SET IMP DISABLED
SET RTC DISABLED
SET WDT DISABLED
SET MI1 ENABLED
SET MI2 DISABLED
SET MI3 DISABLED
SET MI4 DISABLED
SET MI5 DISABLED
SET HI1 DISABLED
SET HI2 DISABLED
SET HI3 DISABLED
SET HI4 DISABLED
; Deposit the test message in memory at 000100..000107 ...
DEPOSIT ALL 0
DEPOSIT 100 100000
DEPOSIT 101 011111
DEPOSIT 102 122222
DEPOSIT 103 033333
DEPOSIT 104 144444
DEPOSIT 105 055555
DEPOSIT 106 166666
DEPOSIT 107 077777
; Store a little program to set up the DMC and do start modem output ..
DEPOSIT 32 100
DEPOSIT 33 107
DEPOSIT -m 10 OCP 0071
DEPOSIT -m 11 HLT
DEPOSIT P 10
; Tell the world ...
echo
echo Here are the DMC pointers before sending -
ex 32:33
echo
echo And here is the data we're sending -
ex 100:107
; Away we go!
echo
echo Starting simulation ...
ATTACH MI1 4431::4432
go
; All done...
echo
echo Here are the DMC pointers after sending ...
ex 32:33

54
H316/tests/mdmtest2.cmd
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@@ -1,54 +0,0 @@
; TEST2 - receive a test modem message
; Set up the configuration ...
RESET ALL
SET CPU 32K NOHSA DMA=0 DMC EXTINT=16
SET LPT DISABLED
SET MT DISABLED
SET CLK DISABLED
SET FHD DISABLED
SET DP DISABLED
SET IMP DISABLED
SET RTC DISABLED
SET WDT DISABLED
SET MI1 ENABLED
SET MI2 DISABLED
SET MI3 DISABLED
SET MI4 DISABLED
SET MI5 DISABLED
SET HI1 DISABLED
SET HI2 DISABLED
SET HI3 DISABLED
SET HI4 DISABLED
; Clear the receiver buffer at 000100 ...
DEPOSIT ALL 0
; Store a little program to receive the message ...
DEPOSIT 20 100
DEPOSIT 21 177
DEPOSIT -m 10 OCP 0471
DEPOSIT -m 11 SKS 0271
DEPOSIT -m 12 JMP 11
DEPOSIT -m 13 HLT
DEPOSIT P 10
; Tell the world ...
echo
echo Here are the DMC pointers before receiving -
ex 20:21
; and wait for "GO" ...
echo
echo Starting simulation ...
ATTACH MI1 4432::4431
go
; All done ...
echo
echo Here is the data we received -
ex 100:107
echo
echo And here are the DMC pointers after receiving -
ex 20:21
echo

42
H316/tests/testrtc.cmd
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@@ -1,42 +0,0 @@
; This is a super simple simh script to test the IMP RTC and verify that it is
; incrementing at the correct 100us interval. It simply waits for the clock
; count to overflow (which takes 65535 * 100us or about 6.5 seconds) and then
; repeats for a total of 10 iterations. If all is well, this loop should take
; pretty close to 65 seconds to complete.
;
; RLA [15-Jun-13]
echo
echo SIMH IMP RTC INTERVAL CALIBRATION TEST
; Turn on the RTC (this requires extended interrupt support)
set cpu extint=16
set rtc enabled
; Turn the clock on (OCP 40 ==> CLKON) ...
d 1000 030040
; Loop reading the clock register until it becomes negative ...
d 1001 131040
d -m 1002 HLT
d -m 1003 SMI
d -m 1004 JMP 1001
; Loop reading the clock register until it becomes positive again ...
d 1005 131040
d -m 1006 HLT
d -m 1007 SPL
d -m 1010 JMP 1005
; And repeat the above for ten iterations ...
d -m 1011 IRS 1015
d -m 1012 JMP 1001
d -m 1013 HLT
d -m 1014 0
d -m 1015 177766
; That's it...
d p 1000
echo Start your stopwatch and at the same moment type "GO".
echo The program should halt in exactly 65 seconds ...